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path: root/arch/arm/cpu/armv7/omap5/prcm-regs.c
AgeCommit message (Expand)AuthorFilesLines
2016-11-21arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platformsTom Rini1-1024/+0
2016-06-02dra7xx: Enable USB_PHY3 32KHz clockRoger Quadros1-0/+1
2016-04-25ARM: DRA7: Add ABB setup for all domainsNishanth Menon1-0/+10
2016-04-25ARM: OMAP5: Enable ABB configuration for MM voltage domainNishanth Menon1-0/+4
2016-04-25ARM: OMAP5/DRA7: Get rid of control_std_fuse_opp_vdd_mpu_2Nishanth Menon1-2/+0
2015-10-22omap5: omap_die_id supportPaul Kocialkowski1-0/+4
2015-08-28ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2Kishon Vijay Abraham I1-0/+2
2015-08-28ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon1-0/+9
2015-08-17ARM: OMAP5: Add functions to enable and disable EDMA3 clocksVignesh R1-0/+4
2015-06-15ARM: BeagleBoard-x15: Enable i2c5 clocksLokesh Vutla1-0/+4
2015-06-12ARM: DRA7: Add support for IO delay configurationLokesh Vutla1-0/+3
2015-04-23ARM: DRA7: Set serial number environment variableDileep Katta1-0/+4
2015-04-14ARM: DRA7: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I1-5/+5
2014-12-04arm: dra7xx: prcm: add missing registersFelipe Balbi1-0/+3
2014-05-23ARM: DRA7xx: ctrl: Fix efuse register addressesLokesh Vutla1-4/+4
2014-02-21DRA7: fix ABB efuse offset for OPP_NOMNishanth Menon1-1/+1
2014-01-24DRA7: add ABB setup for MPU voltage domainNishanth Menon1-0/+8
2013-12-04ARM: DRA7xx: Add PRCM and Control information for SATARoger Quadros1-0/+3
2013-12-04ARM: OMAP5: Add PRCM and Control information for SATARoger Quadros1-0/+4
2013-10-20usb: dra7xx: Add support for dra7xx xhci USB hostDan Murphy1-0/+1
2013-10-20ARM: OMAP5: Add registers and defines for USBOTG SSDan Murphy1-0/+4
2013-10-14Coding Style cleanup: drop some excessive empty linesWolfgang Denk1-2/+0
2013-10-07omap5: add qspi supportMatt Porter1-0/+1
2013-09-20ARM: OMAP5: Avoid writing into LDO SRAM bitsLokesh Vutla1-12/+0
2013-07-26ARM: DRA7xx: Add CPSW support to DRA7xx EVMMugunthan V N1-0/+4
2013-07-26ARM: DRA7xx: Enable GMAC clock controlMugunthan V N1-0/+2
2013-07-26ARM: DRA7xx: Lock DPLL_GMACLokesh Vutla1-0/+1
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk1-17/+1
2013-06-10OMAP5: Enable access to auxclk registersLubomir Popov1-0/+8
2013-06-10ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R1-0/+1
2013-06-10ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla1-0/+1
2013-06-10ARM: OMAP4+: Cleanup header filesLokesh Vutla1-0/+2
2013-06-10OMAP5: Fix bug in omap5_es1_prcm structLubomir Popov1-0/+1
2013-06-10OMAP5: add ABB setup for MPU voltage domainAndrii Tseglytskyi1-0/+7
2013-05-10ARM: OMAP5: Fix warm reset with USB cable connectedLokesh Vutla1-0/+2
2013-03-11arm: dra7xx: Add control module changesLokesh Vutla1-0/+72
2013-03-11arm: dra7xx: clock: Add the prcm changesLokesh Vutla1-2/+222
2013-03-11ARM: OMAP5: srcomp: enable slew rate compensation cells after powerupLokesh Vutla1-1/+4
2013-03-11ARM: OMAP5: clock: Add the prcm register changes required for ES2.0SRICHARAN R1-0/+283
2013-03-11ARM: OMAP4+: Make control module register structure genericLokesh Vutla1-0/+74
2013-03-11ARM: OMAP4+: Change the PRCM structure prototype common for all SocsSRICHARAN R1-0/+306
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