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2021-06-28Merge tag 'v2021.07-rc5' into nextTom Rini1-0/+21
Prepare v2021.07-rc5 # gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # configs/am64x_evm_r5_defconfig
2021-06-23Merge https://source.denx.de/u-boot/custodians/u-boot-x86WIP/23Jun2021Tom Rini1-0/+8
- x86: Discard .note.gnu.property sections - nvme: Skip block device creation for inactive namespaces - nvme: Convert NVMe doc to reST, and various minor fixes
2021-06-23MAINTAINER, git-mailrc: Update the mmc maintainerJaehoon Chung1-0/+1
Update to me as co-maintainer with Peng. Additionally, update the mmc alias in git-mailrc. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2021-06-23MAINTAINERS: Add an entry for NVMeBin Meng1-0/+8
This was missed when NVMe support was initially brought to U-Boot back in 2017. Add an entry for it and list myself as the maintainer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-06-17clk: k210: Move k210 clock out of its own subdirectorySean Anderson1-2/+2
Now that we have only one clock driver, we don't need to have our own subdirectory. Move the driver back with the rest of the clock drivers. The MAINTAINERS for kendryte pinctrl is also fixed since it has always been wrong. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-06-09Add EV-iMX280-NANO-X-MB boardOleh Kravchenko1-0/+2
A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09Add out4.ru O4-iMX-NANO boardOleh Kravchenko1-0/+10
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-01MAINTAINERS: Update maintainer's mail addressKever Yang1-1/+1
Philipp has change the mail and the legacy one is not available, update it to the new one. CC: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-05-31MAINTAINERS: Add allwinner/sunxi driver directoriesSamuel Holland1-0/+3
These drivers are sunxi platform-specific, and so are of interest to the sunxi maintainers. In fact, as there is no PHY driver maintainer, drivers/phy/allwinner had no maintainer at all. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-05-17MAINTAINERS, git-mailrc: socfpga: Update email address for Ley FoonWIP/2021-05-17-assorted-fixesLey Foon Tan1-1/+1
My mail address doesn't work any longer, change to gmail. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-05-14MAINTAINERS: Add a co-maintainer for RISC-VRick Chen1-0/+1
Add Leo as co-maintainer for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com>
2021-05-10MAINTAINERS: Add an entry for VirtIOBin Meng1-0/+12
This was missed when VirtIO support was initially brought to U-Boot back in 2018. Add an entry for it and list myself as the maintainer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-20Add support for stack-protectorJoel Peshkin1-0/+7
Add support for stack protector for UBOOT, SPL, and TPL as well as new pytest for stackprotector Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com> Adjust UEFI build flags. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-16doc: move README.dfu to HTML documentationHeinrich Schuchardt1-0/+1
Move README.dfu to doc/usage/dfu.rst and convert to reStructured text. In the long run this page should be split into two. One for the overview and one for the dfu command. UEFI capsule updates and dfutftp should be integrated into the overview page. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-02MAINTAINERS: Update info for Raspberry PiMatthias Brugger1-1/+3
Add RPi config files and custodian repository. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-28Correct U-Boot upstream repositoryHeinrich Schuchardt1-55/+55
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-26MAINTAINERS: assign tools/mkeficapsule.c to EFI PAYLOADHeinrich Schuchardt1-0/+1
tools/mkeficapsule.c is used to prepare test files for testing the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-01MAINTAINERS: Add maintainer to network subsystemRamon Fried1-0/+1
Add myself as co maintainer to network subsystem Acked-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2021-01-27net: phy: ca_phy: Add driver for CAxxxx SoCsAbbie Chang1-0/+2
Add phy driver support for MACs embedded inside Cortina Access SoCs Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com> CC: Aaron Tseng <aaron.tseng@cortina-access.com> Moved out PHY specific code out of Cortina NI Ethernet driver and into a Cortina Access PHY interface driver
2021-01-27net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCsAaron Tseng1-0/+4
Add Cortina Access Ethernet device driver for CAxxxx SoCs. This driver supports both legacy and DM_ETH network models. Signed-off-by: Aaron Tseng <aaron.tseng@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Abbie Chang <abbie.chang@Cortina-Access.com> CC: Tom Rini <trini@konsulko.com>
2021-01-25Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini1-0/+23
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
2021-01-25doc: document sbi commandHeinrich Schuchardt1-0/+1
Add a man-page for the sbi command. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-24MAINTAINERS: add maintainer for MediaTek MIPS platformWeijie Gao1-0/+23
Update maintainer for MediaTek MIPS platform Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18board: presidio: Add Parallel NAND supportKate Liu1-0/+1
Set environment for Nand flash (U-boot 2020.04): - add nand flash in the device tree - add new default configuration file for G3 using parallel Nand - set nand parameters in presidio_asic.h Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-18mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC supportKate Liu1-0/+2
Add Cortina Access parallel Nand support for CAxxxx SOCs Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> CC: Scott Wood <oss@buserror.net> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-05video: seps525: Add seps525 SPI driverMichal Simek1-0/+1
Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB 160x128 display. This driver has been tested through zynq-spi driver. ZynqMP> load mmc 1 100000 rainbow.bmp 61562 bytes read in 20 ms (2.9 MiB/s) ZynqMP> bmp info 100000 Image size : 160 x 128 Bits per pixel: 24 Compression : 0 ZynqMP> bmp display 100000 ZynqMP> setenv stdout vidconsole Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05video: seps525: Add dt binding descriptionVikhyat Goyal1-0/+1
Added dt binding for seps525 display driver. Signed-off-by: Vikhyat Goyal <vikhyat.goyal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-20Merge tag 'efi-2021-01-rc4' of ↵WIP/20Dec2020Tom Rini1-0/+2
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2021-01-rc4 * Provide a tool to create a file with UEFI variables to preseed UEFI variable store. * Make size of UEFI variable store configurable. * Add man pages for commands 'bootefi' and 'button'.
2020-12-20MAINTAINERS: add tools/efivar.py to EFI PAYLOADHeinrich Schuchardt1-0/+1
tools/efivar.py allows to prepare a file with UEFI variables to preseed the UEFI variable store. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20doc: man-page for bootefi commandHeinrich Schuchardt1-0/+1
Provide a description of the bootefi command. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-18spi: ca_sflash: Add CAxxxx SPI Flash ControllerPengpeng Chen1-0/+2
Add SPI Flash controller driver for Cortina Access CAxxxx SoCs Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Vignesh R <vigneshr@ti.com> CC: Tom Rini <trini@konsulko.com> [jagan: rebase on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-09MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emailsPatrice Chotard1-3/+3
Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-02MAINTAINERS: assign include/log.hHeinrich Schuchardt1-0/+1
include/log.h belongs to LOGGING. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-30lib: Add getoptSean Anderson1-0/+1
Some commands can get very unweildy if they have too many positional arguments. Adding options makes them easier to read, remember, and understand. This implementation of getopt has been taken from barebox, which has had option support for quite a while. I have made a few modifications to their version, such as the removal of opterr in favor of a separate getopt_silent function. In addition, I have moved all global variables into struct getopt_context. The getopt from barebox also re-orders the arguments passed to it so that non-options are placed last. This allows users to specify options anywhere. For example, `ls -l foo/ -R` would be re-ordered to `ls -l -R foo/` as getopt parsed the options. However, this feature conflicts with the const argv in cmd_tbl->cmd. This was originally added in 54841ab50c ("Make sure that argv[] argument pointers are not modified."). The reason stated in that commit is that hush requires argv to stay unmodified. Has this situation changed? Barebox also uses hush, and does not have this problem. Perhaps we could use their fix? I have assigned maintenance of getopt to Simon Glass, as it is currently only used by the log command. I would also be fine maintaining it. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29MAINTAINERS, git-mailrc: Update sunxi maintainersAndre Przywara1-1/+1
Maxime mentioned that he feels not having the time to be an Allwinner maintainer anymore. Take over from him. Maxime, many thanks for your great work in the past! I hope I can still relay the occasional technical question to you in the future. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-10-27rtc: provide an emulated RTCHeinrich Schuchardt1-0/+1
On a board without hardware clock this software real time clock can be used. The build time is used to initialize the RTC. So you will have to adjust the time either manually using the 'date' command or use the 'sntp' to update the RTC with the time from a network time server. See CONFIG_CMD_SNTP and CONFIG_BOOTP_NTPSERVER. The RTC time is advanced according to CPU ticks. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27MAINTAINERS: Record documentation for Xilinx platformsMichal Simek1-0/+1
Add fragment to cover documenation for Xilinx platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-26riscv: Move timer portions of SiFive CLINT to drivers/timerSean Anderson1-0/+1
Half of this driver is a DM-based timer driver, and half is RISC-V-specific IPI code. Move the timer portions in with the other timer drivers. The KConfig is not moved, since it also enables IPIs. It could also be split into two configs, but no boards use the timer but not the IPI atm, so I haven't split it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2020-10-26riscv: Move Andes PLMT driver to drivers/timerSean Anderson1-0/+1
This is a regular timer driver, and should live with the other timer drivers. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2020-10-22rng: Add Qualcomm MSM PRNG driverRobert Marko1-0/+1
Add support for the hardware pseudo random number generator found in Qualcomm SoC-s. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22net: Add IPQ40xx MDIO driverRobert Marko1-0/+1
This adds the driver for the IPQ40xx built-in MDIO. This will be needed to support future PHY driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22spi: Add Qualcomm QUP SPI controller driverRobert Marko1-0/+1
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s. Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW. FIFO and Block modes are supported, no support for DMA mode is planned. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22Merge tag 'u-boot-stm32-20201021' of ↵Tom Rini1-0/+3
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig - Fix stm32prog command: parsing of FlashLayout without partition - Update MAINTAINERS for ARM STM STM32MP - Manage eth1addr on dh board with KS8851 - Limit size of cacheable DDR in pre-reloc stage in stm32mp1 - Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
2020-10-21MAINTAINERS: Add STM32MP1 RNG driver in stm32mp platformPatrick Delaunay1-0/+1
Add the STM32MP1 RNG driver in the list of drivers supported by the STMicroelectronics STM32MP15x series. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-21MAINTAINERS: Add stm32 and stm regexp for ARM STM STM32MP platformPatrick Delaunay1-0/+2
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP" platform to avoid missing files or drivers supported by the STMicroelectronics series STM32MP15x. This patch adds the rules already used in Linux kernel for ARM/STM32 ARCHITECTURE. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-20MAINTAINERS: add USB driver to ARM MEDIATEKChunfeng Yun1-0/+3
Add MediaTek USB3 Dual-Role controller driver to ARM MEDIATEK, and add myself as a maintainer for it. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-08pinctrl: Add support for Kendryte K210 FPIOASean Anderson1-0/+2
The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08test: pinmux: Add test for pin muxingSean Anderson1-0/+1
This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06MAINTAINERS: assign doc/arch/sandbox.rstHeinrich Schuchardt1-0/+1
Add doc/arch/sandbox.rst to the scope of SANDBOX. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-15 21:49:52 +0000