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2016-03-17cmd_dhry.c: Use lldiv for vax_mips calculation as wellTom Rini1-1/+1
2016-03-17x86: Add congatec conga-QA3/E3845-4G (Bay Trail) supportStefan Roese11-0/+506
2016-03-17x86: Add support for the samus chromebookSimon Glass11-1/+876
2016-03-17x86: Support a chained-boot development flowSimon Glass1-0/+80
2016-03-17x86: dts: Drop memory SPD compatible stringSimon Glass3-3/+0
2016-03-17x86: ivybridge: Convert to use the common SDRAM codeSimon Glass1-311/+83
2016-03-17x86: Add common SDRAM-init codeSimon Glass3-0/+327
2016-03-17x86: Move common PCH code into a common placeSimon Glass6-84/+99
2016-03-17dhry: Correct dhrystone calculation for fast machinesSimon Glass1-3/+5
2016-03-17arm: Add a 64-bit division routine to the private librarySimon Glass2-1/+247
2016-03-17x86: Fix a header nit in x86-chromebook.hSimon Glass1-1/+0
2016-03-17x86: Add a function to set the IOAPIC IDSimon Glass2-0/+18
2016-03-17x86: Update README for new developmentsSimon Glass1-3/+13
2016-03-17x86: Use white on black for the console on chromebooksSimon Glass1-0/+2
2016-03-17x86: Add a default address for reference codeSimon Glass1-0/+2
2016-03-17x86: broadwell: Add video supportSimon Glass4-1/+1174
2016-03-17x86: broadwell: Add support for high-speed I/O lane with MESimon Glass2-0/+58
2016-03-17x86: broadwell: Add a GPIO driverSimon Glass3-0/+208
2016-03-17x86: broadwell: Add support for SDRAM setupSimon Glass4-0/+509
2016-03-17x86: broadwell: Add power-control supportSimon Glass3-0/+220
2016-03-17x86: broadwell: Add reference code supportSimon Glass2-0/+114
2016-03-17x86: broadwell: Add an LPC driverSimon Glass3-0/+110
2016-03-17x86: broadwell: Add a northbridge driverSimon Glass2-0/+60
2016-03-17x86: broadwell: Add a SATA driverSimon Glass2-0/+270
2016-03-17x86: broadwell: Add a pinctrl driverSimon Glass5-0/+590
2016-03-17x86: broadwell: Add a PCH driverSimon Glass4-0/+839
2016-03-17x86: Add basic support for broadwellSimon Glass10-0/+1246
2016-03-17x86: dts: Update the pinctrl binding a littleSimon Glass1-10/+11
2016-03-17x86: Add support for running Intel reference codeSimon Glass3-1/+36
2016-03-17x86: Drop all the old pin configuration codeSimon Glass13-334/+0
2016-03-17x86: gpio: Allow the pinctrl driver to set up the pin configSimon Glass6-175/+15
2016-03-17x86: Add an ICH6 pin configuration driverSimon Glass4-0/+219
2016-03-17x86: link: Add pin configuration to the device treeSimon Glass1-0/+155
2016-03-17x86: Update microcode for secondary CPUsSimon Glass5-2/+12
2016-03-17x86: ivybridge: Show microcode version for each coreSimon Glass1-1/+2
2016-03-17x86: Record the CPU details when starting each coreSimon Glass3-1/+20
2016-03-17x86: Move common MRC Kconfig options to the common fileSimon Glass2-26/+62
2016-03-17x86: Allow I/O functions to use pointersSimon Glass1-2/+10
2016-03-17x86: Add macros to clear and set I/O bitsSimon Glass1-0/+22
2016-03-17x86: ivybridge: Drop sandybridge_early_init()Simon Glass1-2/+0
2016-03-17x86: Move Intel Management Engine code to a common placeSimon Glass10-369/+418
2016-03-17x86: Rename PORT_RESET to IO_PORT_RESETSimon Glass3-5/+5
2016-03-17x86: Move common CPU code to its own placeSimon Glass6-76/+162
2016-03-17x86: Move common LPC code to its own placeSimon Glass7-85/+167
2016-03-17x86: Add the root-complex block to common intel registersSimon Glass4-7/+9
2016-03-17x86: Create a common header for Intel register accessSimon Glass6-6/+22
2016-03-17x86: Move microcode code to a common locationSimon Glass6-4/+8
2016-03-17x86: Move cache-as-RAM code into a common locationSimon Glass4-1/+8
2016-03-17x86: cpu: Add functions to return the family and steppingSimon Glass2-0/+24
2016-03-17x86: Allow use of serial soon after relocationSimon Glass2-1/+8
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