aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2017-11-29mtd: nand: automate NAND timings selectionBoris Brezillon2-4/+165
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer2-0/+13
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: convert ONFI mode into data interfaceSascha Hauer2-206/+258
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Introduce nand_data_interfaceSascha Hauer1-49/+117
Currently we have no data structure to fully describe a NAND timing. We only have struct nand_sdr_timings for NAND timings in SDR mode, but nothing for DDR mode and also no container to store both types of timing. This patch adds struct nand_data_interface which stores the timing type and a union of different timings. This can be used to pass to drivers in order to configure the timing. Add kerneldoc for struct nand_sdr_timings while touching it anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: eee64b700e26b9bcc6fce024681c31f5e12271fc] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Create a NAND reset functionSascha Hauer2-3/+22
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: remove unnecessary 'extern' from function declarationsSascha Hauer1-11/+11
'extern' is not necessary for function declarations. To prevent people from adding the keyword to new declarations remove the existing ones. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 79022591839f110f465cac0223e117b91d47d5db] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon2-0/+4
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> [Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82] [masahiro: of_property_read_bool -> fdt_getprop for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: add onfi_* stubs in case ONFI_DETECTION is disabledMasahiro Yamada1-2/+15
Add stubs to the header in case CONFIG_SYS_NAND_ONFI_DETECTION is disabled. This is much easier than adding around #ifdef to the caller side. Also, I removed the #ifdef around onfi_params. In Linux, onfi_params and jedec_params are unified as union. It will be the right thing to do. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29bitops: collect BIT macros to include/linux/bitops.hMasahiro Yamada6-11/+11
Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29ARM: openrd: set CONFIG_LOGLEVEL to 2Masahiro Yamada3-3/+3
These boards are on the boundary of "u-boot-nodtb.bin exceeds file size limit" error. Reduce the log-level to save memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-27test: Correct operation when tests passSimon Glass1-1/+2
When tests pass an error message is printed because of a variable that is not initialised. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-27spl: TI: Do not default to SPL_FIT_IMAGE_TINY being enabledTom Rini2-1/+2
This option prevents booting on am335x_evm at least along with most likely other platforms. Fixes: 337bbb629777 ("spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27Merge git://www.denx.de/git/u-boot-imxTom Rini97-1027/+2162
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27configs: icore-rqs: Enable falcon modeJagan Teki1-0/+1
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27engicam: imx6q: Return mmc dev 0 for icoreJagan Teki1-1/+2
icorem6 has sd on usdhci1 which is devno 0 so return proper devno from board_mmc_get_env_dev for icorem6 and icorem_6rqs Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6: engicam: Add imx6q/imx6ul boards for existing boardsJagan Teki30-311/+89
Add new board names for existing board support imx6q - icore and icore_rqs boards imx6ul - geam6ul and isiot boards Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27board: icore-rqs: Fix mmc get env deviceJagan Teki2-1/+6
As per USDHC boot eFUSE descriptions: USDHC3 => devno 2 USDHC4 => devno 3 Linux will detect mmc0, mmc1, mmc2 based on the status "okay" on usdhc so imx6qdl-icore-rqs.dtsi has enabled usdhc1, usdhc3 and usdhc4.But U-Boot can detect based on the aliases so add mmc1, mmc2 for usdhc3 and usdhc4 respectively and return the board_mmc_get_env_dev by subtracting -1 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6UL: icore: Add SPL_OF_CONTROL supportJagan Teki11-195/+26
Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27pinctrl: imx6ul: Fix pinctrl data overlapped with DT areaJagan Teki1-1/+6
before relocation pinctrl data BSS is overlapping DT area, when .data is using uninitialized global variable, imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID to prevent BSS overlap Suggested-by: Lokesh Vutla <lokeshvutla@ti.com> Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6Q: icore: Add SPL_OF_CONTROL supportJagan Teki9-187/+31
Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6Q: icorem6: Move spl load fit to common/splJagan Teki3-24/+16
Move spl load fit code into common/spl Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6: engicam: Move set_fdt_file to commonJagan Teki6-34/+24
setenv_fdt_file to common code and set dtb based on CONFIG_DEFAULT_DEVICE_TREE and cpu_type. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27mx6sxsabresd: Use PARTUUID to specify the rootfs locationFabio Estevam2-2/+4
mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline. Currently the rootfs location is passed via mmcblk number and the problem with this approach is that the mmcblk number for the SD card changes depending on the kernel version. In order to avoid such issue, use the UUID method to specify the rootfs location. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2017-11-27imx: Remove boolean parameter from wdog powerdown functionFabio Estevam4-8/+8
imx_set_wdog_powerdown() is always used to disable the power down enable bit, so remove the boolean parameter of the function. It is also a bit strange to write a boolean value into registers, so this new version makes explicit that we are writing 0. While at it, rename it to imx_wdog_disable_powerdown(). Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-11-27imx: Also clear powerdown enable bit for WDOG3 on i.MX6ULLFabio Estevam1-1/+1
Clear powerdown enable bit for WDOG3 on i.MX6ULL to avoid unwanted kernel reboots. Suggested-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-27mx6ull: Fix WDOG3 base addressFabio Estevam1-1/+1
i.MX6ULL has the same WDOG3 base address as i.MX6UL, so take this into account in the base address definition. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-26Merge git://git.denx.de/u-boot-rockchipTom Rini21-87/+379
2017-11-26rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode checkPhilipp Tomsich1-0/+1
The boot (and fallback/emergency boot) concept for the RK3399-Q7 differs from Rockchip's reference platforms. On the RK3399-Q7, some of this functionality is present in the bootloader itself (and configurable); some is backed in hardware by the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks (i.e. either an external boot bypassing on-module memories or falling back to the BROM for USB recovery). In summary: the ADC-based boot_mode check does not apply for the RK3399-Q7 and we therefore disable it (in this commit) by setting CONFIG_BOOT_MODE_REG to 0. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: fix turning off boot-mode via KconfigPhilipp Tomsich2-2/+15
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will show as 0x0 if a default is provided and changed via Kconfig. However, it still will show as 0, if no default is given. Consequently, the "is set to something other than 0" test in a Makefile is cumbersome. Instead this check can easily be performed in the C-code. This removes the ifeq-check from mach-rockchip/Makefile, adds a matching #if-check to boot_mode.c and fixes resulting link issues (if boot_mode.o was not included due to the Makefile check) by defining a stub function (in case the functionality is not built in) for setup_boot_mode in boot_mode.c. Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: pinctrl: rk3399: add support for I2C8Philipp Tomsich3-1/+28
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins. For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-26rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich1-6/+2
The RK3399 clk driver still has a left-over use of extract_bits, which can be replaced by using bitfield_extract from include/bitfield.h. This rewrites the invocation to use the shared function. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-sizePhilipp Tomsich3-5/+33
A minor code-size increase from the changes for tracking the os-type of FIT images and from infrastructure for recording the loadables into the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices. This change adds a new config option (enabled by default for MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these processing steps (bringing code size down to below the limit again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT (i.e. taking the code-paths intended for backward-compatibility). Note that enabling this config option precludes any useful downstream processing, such as utilising a special calling convention for ATF or OPTEE, based on the os-type of the loadables. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATFPhilipp Tomsich1-2/+1
This tracks the SPL changes for ATF for the RK3368-uQ7: * renames ATF_SUPPORT to ATF * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from the .itb file) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATFPhilipp Tomsich1-0/+2
This defconfig update makes use of the new features: * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no overlap between the M0 firmware and the ATF (we load this to DRAM and relocate it to its final location within the ATF) * tracks the ATF_SUPPORT -> ATF renaming Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26rockchip: board: lion-rk3368: update .its filePhilipp Tomsich1-2/+4
For the RK3368-uQ7, we can now update the .its file to mark the Trusted Firmware as out 'firmware' bootable and annotate both ATF and U-Boot with an OS-type. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26rockchip: board: puma-rk3399: update .its file to use new featuresPhilipp Tomsich1-5/+7
This commit updates the .its file for the RK3399-Q7 to use the new features and demonstrates how to use those: * it marks the ATF as the 'firmware' * it tracks the OS-type for U-Boot and ATF * it loads the PMU (M0) firmware to DRAM and records the location to /fit-images (where our ATF reads it from) With the handoff of the next-stage FDT to ATF in place, we can now use this to pass information about the load addresses and names of each loadables to ATF: now we can load the M0 firmware into DRAM and avoid overwriting parts of the SPL stage. This is achieved by changing our .its-file to use an available area of DRAM as the load-address. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26rockchip: defconfig: firefly-rk3399: sync up with SPL changes for ATFPhilipp Tomsich1-2/+1
This tracks the SPL changes for ATF for the Firefly: * renames ATF_SUPPORT to ATF * drops CONFIG_SPL_ATF_TEXT_BASE Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: atf: drop the SPL_ATF_TEXT_BASE configuration itemPhilipp Tomsich1-6/+0
The SPL_ATF_TEXT_BASE configuration item has become obsolete. Remove it from Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: rename config item SPL_ATF_SUPPORT to SPL_ATFPhilipp Tomsich2-2/+2
Having CONFIG_SPL_ATF seems more natural. Rename it, while it it is easy and there's few boards that use it (only RK3399 and RK3368 boards). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: atf: introduce spl_invoke_atf and make bl31_entry privatePhilipp Tomsich2-13/+82
This adds a new interface spl_invoke_atf() that takes a spl_image_info argument and then derives the necessary parameters for the ATF entry. Based on the additional information recorded (into /fit-images) from the FIT loadables, we can now easily locate the next boot stage. We now pass a pointer to a FDT as the platform-specific parameter pointer to ATF (so we don't run into the future headache of every board/platform defining their own proprietary tag-structure), as FDT access is already available in ATF. With the necessary infrastructure in place, we can now update the support for the ARM Trusted Firmware to dispatch into the spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is loaded. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: fit: implement recording of loadables into /fit-imagesPhilipp Tomsich1-14/+81
If a FDT was loaded (e.g. to append it to U-Boot image), we store it's address and record information for all loadables into this FDT. This allows us to easily keep track of images for multiple privilege levels (e.g. with ATF) or of firmware images preloaded into temporary locations (e.g. PMU firmware that may overlap the SPL stage). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: fit: implement fdt_record_loadablePhilipp Tomsich2-0/+59
During the loading of more complex FIT images (e.g. when the invoked next stage needs to find additional firmware for a power-management core... or if there are multiple images for different privilege levels started in parallel), it is helpful to create a record of what images are loaded where: if a FDT is loaded for one of the next stages, it can be used to convey the status and location of loadables. This adds a fdt_record_loadable() function that can be invoked to record the status of each loadable below the /fit-images path. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: fit: simplify logic for FDT loading for non-OS bootsPhilipp Tomsich1-30/+56
To better support bootin through an ATF or OPTEE, we need to streamline some of the logic for when the FDT is appended to an image: depending on the image type, we'd like to append the FDT not at all (the case for the OS boot), to the 'firmware' image (if it is a U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an OPTEE, or some other image-type and U-Boot is listed in the loadabled). To achieve this goal, we drop the os_boot flag and track the type of image loaded. If it is of type IH_OS_U_BOOT, we append the FDT. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: change load_addr and entry_point to uintptr_tPhilipp Tomsich1-3/+6
Mainly a stylistic change: convert the load_addr and entry_point fields of struct spl_image_info to uintptr_t (from ulong). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26spl: add a fdt_addr field to spl_image_infoPhilipp Tomsich1-0/+3
When loading a full U-Boot with detached device-tree using the SPL FIT backend, we should store the address of the FDT loaded as part of the SPL image info: this allows us to fixup the FDT with additional info we may want to propagate onward. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted FirmwarePhilipp Tomsich2-0/+2
To boot on ARMv8 systems with ARM Trusted Firmware, we need to assemble an ATF-specific parameter structure and also provide the address of the images started by ATF (e.g. BL3-3, which may be the full U-Boot). To allow us to identify an ARM Trusted Firmware contained in a FIT image, this adds the necessary definitions. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-24Merge git://git.denx.de/u-boot-arcTom Rini6-4/+135
2017-11-24arc: cache: Add required NOPs after invalidation of instruction cacheAlexey Brodkin1-0/+7
As per ARC HS databook (see chapter 5.3.3.2) it is required to add 3 NOPs after each write to IC_IVIC which we do from now on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24arc: bootm: Move slave cores kick-starting under !fakeAlexey Brodkin1-4/+4
Currently slave cores will be kick-started even if we want to dry run bootm which is not what we really want. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24ARC: HSDK: introduce CREG GPIO driverEugeniy Paltsev4-0/+124
The HSDK can manage some pins via CREG registers block. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
generated by cgit v1.1 at 2024-11-04 16:59:44 +0000