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2022-01-13cmd/Kconfig: Fix spelling of "resetting".Vagrant Cascadian1-1/+1
2022-01-13arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c: Fix spelling of ↵Vagrant Cascadian1-1/+1
"resetting".
2022-01-13drivers/usb/musb/musb_udc.c: Fix spelling of "mismatch".Vagrant Cascadian1-1/+1
2022-01-13drivers/mtd/ubispl/ubispl.c: Fix spelling of "mismatched".Vagrant Cascadian1-1/+1
2022-01-13arch/arm/mach-bcm283x/msg.c: Fix spelling of "Failed".Vagrant Cascadian1-1/+1
2022-01-13treewide: invaild -> invalidSean Anderson16-16/+16
Somewhere along the way, someone misspelt "invalid" and it got copied everywhere. Fix it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-13Merge branch '2022-01-12-assorted-updates'Tom Rini12-30/+67
- Fix binman fake blob support to write outside source directory - Azure now has stages in the pipeline - Update to latest focal tag for containers in CI. - Finish dropping LynxOS - Add migration message for timer code
2022-01-12timer: Add a migration messageSimon Glass2-0/+16
Some boards still use the old timer mechanism. Set a deadline for them to update to driver model. Point to some examples as well. This needs a bit of a strange rule to avoid an error on some boards. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12LynxOS is no longer supportedThomas Huth2-5/+1
LynxOS needed the do_bootm_lynxkdi() function that got removed in 7e713067ee ("Remove LYNX KDI remainders") - and that function needed a lynxkdi_boot() function, where the last implementation had been removed in 98f705c9ce ("powerpc: remove 4xx support") already. Looks like this OS is definitely not supported anymore, so remove it from the corresponding lists. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12binman: Write fake blobs to the output directorySimon Glass4-11/+26
At present binman writes fake blobs to the current directory. This is not very helpful, since the files serve no useful purpose once binman has finished. They clutter up the source directory and affect future runs, since the files in the current directory are often used in preference to those in the board directory. To avoid these problems, write them to the output directory instead. Move the file-creation code to the Entry base class, so it can be used by any entry type that needs it. This is required since some entry types, such as Entry_blob_ext_list, are not subclasses of Entry_blob. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12binman: Renumber the fake blob dtsSimon Glass2-10/+12
Use a unique number instead of the current 203, which is used by 203_fip as well. Reformat the code to avoid a long line. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-12CI, Dockerfile: Update to latest "focal" tagTom Rini3-3/+3
Bring us to the focal-20220105 tag and rebuild our images on top of this. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-12ci: azure: Update to use stagesTom Rini1-1/+7
Follow what we do in GitLab CI where we break the jobs up in to stages such that if earlier and often quicker sanity tests fail we don't run everything else. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-12Makefile: Add more files to clean listAdam Ford1-1/+3
When building for i.mx8m boards with binman, a few more additional files are created which should be removed when running 'make clean' Signed-off-by: Adam Ford <aford173@gmail.com>
2022-01-12Merge branch '2022-01-12-pci-updates'Tom Rini19-171/+117
- PCI code clean up and bug fixes from Pali
2022-01-12pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macroWIP/2022-01-12-pci-updatesPali Rohár1-27/+2
sh7751 platform uses standard format of Config Address for PCI Configuration Mechanism #1. Commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") which did conversion of PCI sh7751 driver to DM, broke access to config space as that commit somehow swapped device and function bits in config address. Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which calculates Config Address correctly. Also remove nonsense function sh7751_pci_addr_valid() which was introduced in commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") probably due to workarounded issues with mixing/swapping device and function bits of config address which probably resulted in non-working access to some devices. With correct composing of config address there should not be such issue anymore. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macroPali Rohár1-4/+3
mcf5445x platform uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12x86: pci: Use PCI_CONF1_ADDRESS() macroPali Rohár1-2/+2
x86 platform uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: sh7780: Use PCI_CONF1_ADDRESS() macroPali Rohár1-4/+4
PCI sh7780 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-9/+8
PCI mediatek driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-4/+6
PCI fsl driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-8/+3
PCI tegra driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address function. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-13/+4
PCI mvebu driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: msc01: Use PCI_CONF1_ADDRESS() macroPali Rohár2-14/+2
PCI msc01 driver uses standard format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár1-2/+2
PCI mpc85xx driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: gt64120: Use PCI_CONF1_ADDRESS() macroPali Rohár2-17/+2
PCI gt64120 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: Add standard PCI Config Address macrosPali Rohár1-0/+45
Lot of PCI and PCIe controllers are using standard Config Address for PCI Configuration Mechanism #1 or its extended version. So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's pci.h header file which can be suitable for most PCI and PCIe controller drivers. Drivers do not have to invent their own macros and can use these new U-Boot macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: When disabling pref MEM set all base bitsPali Rohár1-1/+1
It is common to set all base address bits to one and all limit address bits to zero for disabling address forwarding. Forwarding is disabled when base address is higher than limit address, so this change should not have any effect. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Disable I/O forwarding during autoconfiguration if unsupportedPali Rohár1-0/+8
If U-Boot does not have any I/O resource for assignment then disable I/O forwarding in PCI bridge autoconfiguration code. Default initial state of PCI bridge IO registers is unspecified, therefore they can be in enabled if U-Boot does not touch them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Fix register for determining type of IO base addressPali Rohár1-1/+1
Function dm_pciauto_prescan_setup_bridge() configures base address registers, therefore it should read type of IO from base address registers (and not from limit address registers). Note that base and limit address registers should have same type, so this change is just usage correction and has no functional change on correctly working hardware. Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macroPali Rohár1-41/+20
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macroPali Rohár1-14/+3
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-12pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macroPali Rohár1-6/+1
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2022-01-12vexpress64: Remove unused macro XR3PCI_ECAM_OFFSETPali Rohár1-4/+0
Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-11Merge https://source.denx.de/u-boot/custodians/u-boot-mmcWIP/11Jan2022Tom Rini4-396/+260
2022-01-12mmc: unconditionally define mmc_deinit()Heinrich Schuchardt1-5/+0
We want to replace '#ifdef' by 'if (IS_ENABLED(CONFIG_...))' in our code. Therefore functions should be defined unconditionally even if they are not implemented. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: dwmmc: return a proper error code when busyJohn Keeping1-1/+1
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: set sysctl register for clock initializationSean Anderson1-1/+1
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ] The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: Replace more #ifdefs by ifSean Anderson1-83/+69
This builds on the previous patch by converting yet more preprocessor macros to C ifs. This is split off so that the changes adapted from Micheal's patch may be clearly distinguished from the ones I have authored myself. MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO needs some -ENOSYS stubs when it isn't defined. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()Sean Anderson2-108/+97
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ] Make the code cleaner and drop the old-style #ifdef constructs where it is possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: simplify esdhc_setup_data()Sean Anderson1-33/+48
[ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ] First, we need the waterlevel setting for PIO mode only. Secondy, both DMA setup code is identical for both directions, except for the data pointer. Thus, unify them. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: use dma-mapping APISean Anderson1-35/+15
[ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ] Use the dma_{map,unmap}_single() calls. These will take care of the flushing and invalidation of caches. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfersSean Anderson1-27/+6
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ] SDMA can only do DMA with 32 bit addresses. This is true for all architectures (just doesn't apply to 32 bit ones). Simplify the code and remove unnecessary CONFIG_FSL_LAYERSCAPE. Also make the error message more concise. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix mmc->clock with actual clockSean Anderson1-0/+1
[ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ] Fix mmc->clock with actual clock which is divided by the controller, and record it with priv->clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: drop redundant code for non-removable featureSean Anderson1-21/+13
[ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ] Drop redundant code for non-removable feature. "non-removable" property has been read in mmc_of_parse(). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ] Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: clean up bus width configuration codeSean Anderson1-57/+26
[ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ] This patch is to clean up bus width setting code. - For DM_MMC, remove getting "bus-width" from device tree. This has been done in mmc_of_parse(). - For non-DM_MMC, move bus width configuration from fsl_esdhc_init() to fsl_esdhc_initialize() which is non-DM_MMC specific. And fix up bus width configuration to support only 1-bit, 4-bit, or 8-bit. Keep using 8-bit if it's not set because many platforms use driver without providing max bus width. - Remove bus_width member from fsl_esdhc_priv structure. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ converted if statement to switch ] Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix voltage validationSean Anderson2-28/+19
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ] Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: remove redundant DM_MMC checkingSean Anderson1-2/+0
[ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ] Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMCSean Anderson1-32/+1
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-10Merge branch 'next'WIP/10Jan2022Tom Rini1624-10859/+25229
Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-09-07 18:33:06 +0000