aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2021-10-18treewide: Remove OF_PRIOR_STAGEWIP/bisect-testingIlias Apalodimas4-25/+8
The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boardsIlias Apalodimas4-3/+8
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got introduced, in order to support a DTB handed over by an earlier stage boo loader. However we have another option in the Kconfig (OF_BOARD) which has identical semantics. So let's remove the option in an effort to simplify U-Boot's config and DTB management, and use OF_BOARD instead. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas16-23/+28
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got introduced, in order to support a DTB handed over by an earlier stage boo loader. However we have another option in the Kconfig (OF_BOARD) which has identical semantics. On RISC-V some of the boards pick up the DTB from a1 and copy it in their private gd_t. Apart from that they copy it to prior_stage_fdt_address, if the Kconfig option is selected, which is unnecessary. So let's switch the config option for those boards to OF_BOARD and define the required board_fdt_blob_setup() for them. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-17Merge tag 'u-boot-rockchip-20211015' of ↵WIP/17Oct2021Tom Rini14-100/+117
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Fix for Rockchip mmc HS400 mode; - Fix for px30 board Odroid Go; - rockchip_sfc update; - rk3568 clk update; - doc fix;
2021-10-15Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini13-308/+321
On merge, fixup order of fdtdec_add_reserved_memory parameters in arch/arm/cpu/armv8/fsl-layerscape/soc.c Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15Merge branch '2021-10-15-Kconfig-migrations'Tom Rini240-321/+38
- Assorted Kconfig migration patches
2021-10-15configs: Resync with savedefconfigTom Rini206-220/+17
Resync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15Convert CONFIG_USB_EHCI_IS_TDI to KconfigMarek Behún26-61/+8
On mvebu this is defined if and only if !ARM64. Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300). Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15Drop CONFIG_USB_EHCI_KIRKWOODMarek Behún2-2/+0
This config option doesn't do anything. nas220 uses USB_EHCI_MARVELL. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15Convert CONFIG_USB_EHCI_MXS to KconfigMarek Behún3-2/+7
This option is only used for mx23evk_defconfig mx23_olinuxino_defconfig which are the only i.MX23 boards. Add depend on ARCH_MX23 and default to y. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDIMarek Behún25-25/+25
In preparation for moving this option to Kconfig, rename it to be consistent with other USB EHCI Kconfig options. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15mmc: rockchip_sdhci: enable strobe line for HS400Yifeng Zhao1-0/+3
The default configuration of rk3399 EMMC PHY does not enable the strobe line, and EMMC controller will got data transmission error at HS400 mode. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15clk: rockchip: rk3568: update clksElaine Zhang2-3/+10
fix up ppll init freq. support tclk_emmc. add freq (26M) for mmc device. fix up the sfc clk rate unit error. Change in V2: remove change id. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15spi: rockchip_sfc: Using read_pollJon Lin1-32/+35
Using read_poll logic. Tested-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15spi: rockchip_sfc: Implement set_speed logicJon Lin1-43/+39
Set clock related processing into set_speed logic. And Optimize printing format. Tested-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15rockchip: px30: sync serial flash controller bindings with mainlineChris Morgan3-7/+7
The devicetree submitted and approved for the mainline linux kernel is slightly different than the one present here. This syncs both devicetrees (for the Rockchip SFC node at least) present on the PX30 and the Odroid Go Advance. Changes include renaming the flash node, reordering the values in the SFC node for the rk3326-odroid-go2, changing the name of the cs pinctrl node to cs0, and updating the u-boot specific tree to utilize the new flash node value. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15doc: rockchip: write all brand names with a capitalJohan Jonker1-8/+8
Brand names are supposed to be written with a capital, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15doc: rockchip: sort rockchip support list for rk3188Johan Jonker1-2/+2
In the list of mainline U-boot supported Rockchip boards rk3188 is placed below under the name rv3188. Give back it's original name and sort the list in alphabetical order. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without itPeter Robinson5-5/+0
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so drop the configs as they were likely copied over from other boards during enablement. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15rockchip: board: remove SCLK_GPU from U-Boot DTChris Morgan1-0/+10
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 would fail to probe for the Odroid Go Advance. This patch is to remove the clock for the GPU from the U-Boot specific devicetree, as that clock is not supported by the U-Boot clk_px30 driver. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15rockchip: px30: add support for setting cpll clockChris Morgan1-0/+3
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 for the Odroid Go Advance would no longer probe correctly, because setting the cpll and gpu clocks are not supported with the clk_px30 U-Boot driver. This adds support for setting the cpll clock to the clk_px30 driver. Another patch will update the U-Boot specific device-tree to remove the GPU clock which is not used by U-Boot. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15Remove unused CONFIG_CONS_NONEPatrick Delaunay2-2/+0
Remove the latest reference of CONFIG_CONS_NONE in code Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15Remove unused CONFIG_SYS_FLASH_AMD_CHECK_DQ7Patrick Delaunay3-3/+0
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15Remove unused CONFIG_NO_RELOCATIONPatrick Delaunay2-2/+0
Remove the latest reference of CONFIG_NO_RELOCATION in code Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15am33x: Remove unused define CONFIG_MUSB_HOSTPatrick Delaunay2-8/+0
This define was left over from a previous revision, and was never used. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15scripts: remove some configs in config_whitelist.txtPatrick Delaunay4-20/+5
Remove some config finishing by _ badly added by scripts/build-whitelist.sh when joker is used in comments. for example: doc/uImage.FIT/command_syntax_extensions.txt: ... #ifdef CONFIG_OF_* | ... cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \ FLASH|MMC|FAT|EXT4|\ Remove also configs only used in comments: - CONFIG_BOOGER in include/linux/kconfig.h - CONFIG_COMMANDS - CONFIG_INIT_IGNORE_ERROR - CONFIG_REG_* - CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2021-10-15Merge branch '2021-10-14-assorted-updates'Tom Rini14-34/+119
- Update to LLVM-13 in CI, assorted PCI fixes and pytest in CI improvements
2021-10-14board/km: update MAINTAINERS filesHolger Brunck4-6/+5
Update the e-mail addresses and person responsible. Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com> CC: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com> CC: Rainer Boschung <rainer.boschung@hitachienergy.com>
2021-10-14pytest: Show a message when sandbox crashesSimon Glass2-12/+52
When a test hands on a real board there is no way on the console to obtain any information about why it hung. With sandbox we can actually find out that it died and get a signal or exit code. Add this to make it easier to figure out what happened. So instead of: test/py/u_boot_spawn.py:171: in expect c = os.read(self.fd, 1024).decode(errors='replace') E OSError: [Errno 5] Input/output error We get: test/py/u_boot_spawn.py:171: in expect c = os.read(self.fd, 1024).decode(errors='replace') E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV) Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14pci: Fix printf format for regionsPali Rohár1-1/+1
Correct printf format for unsigned long long is %llx and not %llxx. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pci: Fix showing registersPali Rohár1-1/+1
Header type is 7-bit number so use all 7 bits when detecting header type and not only 2 bits. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pci: Fix showing barsPali Rohár1-0/+5
Header type is 7-bit number so properly clear upper 8th bit which indicates multifunction device. And do not try to show bars for unsupported header types. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pci: Fix configuring BARsPali Rohár1-6/+25
Number of BARs is defined by header type, not by class code. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pci: Skip configuring invalid P2P bridge devicesPali Rohár1-0/+9
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with Bridge header type (0x01). So add check before touching PCI config space to prevent misconfiguring some non-standard device. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pci: Skip configuring PCI Rom Address for unsupported header typesPali Rohár1-1/+2
PCI Rom Address is currently supported only for Normal (0x00) and Bridge (0x01) header types. Fix code accordingly. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14pytest: Shorten traceback length by defaultSimon Glass2-0/+12
This produces a lot of code output which is not very helpful and is quite annoying to wade through. Use the short format by default. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14CI: Update to LLVM-13Tom Rini3-7/+7
- Switch sources and CI scripts to install and use LLVM-13 - Update to latest "focal" tag. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-13ARM: tegra: Copy memory-region-names propertyThierry Reding1-1/+30
If multiple entries are present in the memory-region property, this new memory-region-names property can be used to specify names for each of them so that they can be more easily distinguished. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13ARM: tegra: Refactor DT update helpersThierry Reding5-355/+149
Rather than duplicate the Ethernet MAC address and carveout updating code for each board, move it to a common location and make it more reusable. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13ARM: tegra: Support EMC frequency tables on Tegra210Thierry Reding3-1/+3
The EMC frequency tables are created from a training sequence performed during early boot and passed in via a reserved memory region by nvtboot. Copy this table to the kernel DTB so that the kernel can use it to scale the EMC frequency at runtime. Note that early bootloaders store the EMC table at an address that currently intersects with the load address of the initial ramdisk. In order to avoid copying the table to a different address, simply change the load address for the initial ramdisk in U-Boot. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13ARM: tegra: Support multiple reserved memory regionsThierry Reding3-39/+126
Support multiple reserved memory regions per device to support platforms that use both a framebuffer and color conversion lookup table for early boot display splash. While at it, also pass along the name, compatible strings and flags of the carveouts. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13fdtdec: Support reserved-memory flagsThierry Reding10-34/+50
Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13fdtdec: Reorder fdtdec_set_carveout() parameters for consistencyThierry Reding7-24/+21
The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13fdtdec: Support compatible string list for reserved memoryThierry Reding10-24/+105
Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13fdtdec: Support retrieving the name of a carveoutThierry Reding6-11/+18
When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13fdtdec: Allow using fdtdec_get_carveout() in loopsThierry Reding1-1/+1
In order make it possible to use fdtdec_get_carveout() in loops, return FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles present in the given property. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13Merge branch '2021-10-12-assorted-fixes-and-updates'Tom Rini8-71/+647
- Add Macronix raw NAND controller, fastboot, spelling and nvme fixes, ds1307 fix for oscillator-stop bit and fatfs optimization.
2021-10-12nvme: invalidate correct memory range after readWIP/2021-10-12-assorted-fixes-and-updatesStefan Agner1-3/+4
The current code invalidates the range after the read buffer since the buffer pointer gets incremented in the read loop. Use a temporary pointer to make sure we have a pristine pointer to invalidate the correct memory range after read. Fixes: 704e040a51d2 ("nvme: Apply cache operations on the DMA buffers") Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-12tools/image-host.c: Fix spelling of "expected".Vagrant Cascadian1-1/+1
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12rtc: ds1307: Handle oscillator-stop bit correctlyMark Tomlinson1-52/+20
The DS1307 driver was originally based on the DS1337 driver. However, the functionality of the clock set/get functions has diverged. In the original DS1337 driver, the set/get functions did the following: 1) Setting the clock ensured the oscillator was enabled. 2) Getting the clock checked and reset the oscillator-stop flag. The DS1307 does not have an oscillator-stop flag, but the driver tried (incorrectly) to emulate this by ensuring the oscillator was running. It really makes no sense to start a stopped clock without setting it. This patch makes the DS1307 driver behave like the original DS1337 driver again. For the DS1307 itself, this is just a removal of code, since there is no oscillator-fail bit to check or reset, and the clock is started when it is set. Since the DS1307 driver can now also be used for the DS1337 and DS1340 which do have this bit, add code to handle the oscillator-stop bit in the same was the original DS1337 driver did -- i.e. report that the oscillator had stopped and clear the flag. This means that setting the date using the date command (which does both a get and a set) will now clear the oscillator-stop flag in addition to setting and starting the clock. The old-style (non-DM) code has not been updated and will be removed in a future patch. Note that this older code does not support the DS1337, as there is a separate driver for this. Also note that the original (DM) code used the wrong control-register address for the DS1337. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
generated by cgit v1.1 at 2024-10-12 15:50:19 +0000