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2024-01-31Merge https://source.denx.de/u-boot/custodians/u-boot-riscvWIP/31Jan2024Tom Rini33-28/+811
* Add RISC-V falcon mode documentation * Add Clang build support * Add cmd to detect Debug Trigger Extension support * Add PWM setting for Unmatched board * Add Milk-V Duo board support * Add new device node and enable new config option for VisionFive2 board * Add second virtio device for RISC-V QEMU
2024-01-31riscv: dts: starfive: add regulator deviceNam Cao1-0/+5
Add the axp15060 regulator device. OpenSBI uses this device to perform board reset and shutdown. Signed-off-by: Nam Cao <namcao@linutronix.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31riscv: dts: jh7110: add power management unit controller nodeNam Cao1-0/+6
JH7110 has a power management unit controller node. Add this node. This device is used by OpenSBI during board reset/shutdown. Signed-off-by: Nam Cao <namcao@linutronix.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31board: visionfive2: configure PHY pad drive strengthLukasz Tekieli1-0/+8
Configure the pad drive strength register for both PHYs. The values correspond to what can be found in the Linux DTS for VisionFive2 v1.3b. Pad drive strength configuration is required for the phy0 to work correctly with 100Mbit links. Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31net: phy: motorcomm: configure pad drive strength registerLukasz Tekieli1-0/+130
This ports the pad drive strength register configuration which can be already found in the Linux driver for this PHY. Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31doc: sophgo: milkv_duo: document Milk-V Duo boardKongyang Liu3-0/+73
Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31riscv: sophgo: milkv_duo: initial support addedKongyang Liu7-0/+87
Add support for Sophgo's Milk-V Duo board, only minimal device tree and serial console are enabled, and it can boot via vendor first stage bootloader. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31riscv: dts: sophgo: add basic device tree for Milk-V Duo boardKongyang Liu4-0/+249
Import device tree from Linux kernel to add basic support for CPU, PLIC, UART and Timer. The name cv1800b in the filename represent the chip used on Milk-V Duo board. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31configs: visionfive2: Disable ENV_IS_NOWHEREAurelien Jarno1-1/+0
The VisionFive 2 board supports saving the u-boot environment settings are saved to on-board SPI flash. However the defconfig enables both ENV_IS_NOWHERE and ENV_IS_IN_SPI_FLASH, preventing the "saveenv" command to work. Fix that by disabling ENV_IS_NOWHERE. Fixes: 7d79bed00c9e ("configs: starfive: Enable environment in SPI flash support") Reported-by: E Shattow <lucent@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31riscv: Support building with Clangkleines Filmröllchen1-1/+1
The -ffixed-gp option of GCC has an exact equivalent of -ffixed-x3 in Clang. Signed-off-by: kleines Filmröllchen <filmroellchen@serenityos.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-01-31cmd: sbi: add support for Debug Trigger ExtensionHeinrich Schuchardt2-0/+2
Detect and show if the SBI implements the Debug Trigger Extension. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31board: sifive: spl: Initialized the PWM setting in the SPL stageVincent Chen2-0/+67
LEDs and multiple fans can be controlled by SPL. This patch ensures that all fans have been enabled in the SPL stage. In addition, the LED's color will be set to yellow. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Co-developed-by: Nylon Chen <nylon.chen@sifive.com> Signed-off-by: Nylon Chen <nylon.chen@sifive.com> Co-developed-by: Zong Li <zong.li@sifve.com> Signed-off-by: Zong Li <zong.li@sifve.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31riscv: qemu: enable booting on a second virtio deviceAurelien Jarno1-0/+1
QEMU RISC-V supports multiple virtio devices, but only tries to boot to the first one. Enable support for a second virtio device, that is useful for instance to boot on a disk image + an installer. Ideally that should be made dynamic, but that's a first step. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31board: starfive: handle compatible property in dynamic DT configurationAurelien Jarno1-0/+4
The difference between the StarFive VisionFive 2 1.2A and 1.3B boards is handled dynamically by looking at the PCB version in the EEPROM in order to have a single u-boot version for both versions of the board. While the "model" property is correctly handled, the "compatible" one is always the the one of version 1.3b. This patch add support for dynamically configuring that property. Fixes: 9b7060bd15e7 ("riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B") Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31configs: andes: add the fdt blob copy address for SPLRandolph4-0/+4
Add the address to which the FDT blob is to be moved. Signed-off-by: Randolph <randolph@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31spl: riscv: falcon: move fdt blob to specified addressRandolph3-26/+16
In Falcon Boot mode, the fdt blob should be move to the RAM from kernel BSS section. To avoid being cleared by BSS initialisation. SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies. Signed-off-by: Randolph <randolph@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31doc: falcon: riscv: Falcon Mode boot on RISC-VRandolph1-0/+158
Add documentation to introduce the Falcon Mode on RISC-V. In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel. Signed-off-by: Randolph <randolph@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-30Merge tag 'clk-2024.04-rc2' of ↵WIP/30Jan2024Tom Rini104-526/+853
https://source.denx.de/u-boot/custodians/u-boot-clk Clock changes for v2024.04 This pull has the usual fixes and new (clock-adjacent) drivers. It also has some cleanups for the clock API; in particular removing the unused rfree callback. CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/19486
2024-01-29clk: clk-gpio: add actual gated clockSvyatoslav Ryhel1-5/+33
Existing gpio-gate-clock driver acts like a simple GPIO switch without any effect on gated clock. Add actual clock actions into enable/disable ops and implement get_rate op by passing gated clock if it is enabled. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20240110160956.4476-2-clamor95@gmail.com [ sorted includes ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
2024-01-29clk: Document clk_ops return codes and behaviorSean Anderson1-10/+103
Currently, clock consumers cannot take any programmatic action based on the return code of a clock function. This is because there is no standardization, and generally no way of separating e.g. "there was a major problem setting the rate for this clock" which usually should not be recovered from, from "this clock doesn't support setting its rate" or "this clock doesn't support *this* rate" which could be absolutely fine depending on the driver. This commit aims to standardize the acceptable codes which may be returned from clock operations. In general, - ENOSYS should be returned when an operation is not supported for a particular clock. - ENOENT may be returned if the clock ID is invalid. However, it is encouraged to move any checks to request() to reduce code duplication. - EINVAL should be returned for logical errors only (such as requesting an invalid rate). Each function has had specific guidance added for when to return each error code. This is just guidance for now; most of the clock subsystem does not yet conform to this standard. However, it is expected that new clock drivers return these error codes. Additionally, this commit adds expected behavior for each of the clock operations. I believe these should be mostly straightforward and correspond to existing behavior. I remember not understanding what the expected invariants were for several clock functions, so hopefully this should help out new driver authors. In the future, some of these invariants could be checked via an optional config option. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-4-seanga2@gmail.com
2024-01-29treewide: Remove clk_freeSean Anderson95-430/+71
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-29clk: Remove rfreeSean Anderson7-79/+4
Nothing uses this function. Remove it. Since clk_free no longer does anything, just stub it out. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-2-seanga2@gmail.com
2024-01-29clk: fix clk_get_rate() always return ulongJulien Masson1-6/+1
When we call clk_get_rate(), we expect to get clock rate value as ulong. In that case we should not use log_ret() macro since it use internally an int. Otherwise we may return an invalid/truncated clock rate value. Signed-off-by: Julien Masson <jmasson@baylibre.com> Fixes: 5c5992cb90c ("clk: Add debugging for return values") Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/87o7erv9p4.fsf@baylibre.com
2024-01-29clk: meson: add Hardware Clock measure driverNeil Armstrong3-0/+645
Amlogic SoCs embeds an hardware clock measure block, port it from Linux and implement it as a UCLK_CLK with only the dump op and fail-only xlate. Based on the Linux driver introduced in [1]. [1] commit 2b45ebef39a2 ("soc: amlogic: Add Meson Clock Measure driver"). Reviewed-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231218-uboot-meson-clk-msr-v3-1-acf4d90ccfee@linaro.org
2024-01-29Prepare v2024.04-rc1v2024.04-rc1Tom Rini2-6/+5
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-29Merge tag 'efi-2024-04-rc1-4' of ↵Tom Rini11-64/+77
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2024-04-rc1-4 Documentation: * uefi: remove ".py" suffix for pytest.py command * correct date in migration plan for CONFIG_DM UEFI: * fix conflicting SPDX license in RISC-V EFI linker scripts * page align EFI binary section in RISC-V EFI binaries * separate .data and .text sections of RISC-V EFI binaries * use common function to get EFI configuration table
2024-01-29tools: buildman: fix non-existing SafeConfigParser in Python 3.12+Quentin Schulz1-1/+1
SafeConfigParser was renamed back in Python 3.2 (yes, no typo) to ConfigParser[1], but it was still working as an alias until it got removed in 3.12[2]. [1] https://docs.python.org/3.8/whatsnew/3.2.html#configparser [2] https://github.com/python/cpython/pull/92503 Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-01-29video: console: Fix buffer overflow in cmd 'font list'Janne Grunau1-1/+1
vidconsole_ops.get_font is documented to return -ENOENT after the last video_fontdata entry. Signed-off-by: Janne Grunau <j@jannau.net>
2024-01-29video: Support VIDEO_X2R10G10B10 in truetype consoleJanne Grunau1-2/+8
Without explicit support for VIDEO_X2R10G10B10 VIDEO_X8R8G8B8 white will be rendered as cyan-ish. The conversion leaves to lowest 2 bits unset for more compact code. Signed-off-by: Janne Grunau <j@jannau.net>
2024-01-29env: sf: report malloc error to callerRalph Siemsen1-1/+3
In the non-redundant code for env_sf_save(), a failure to malloc() the temporary buffer produces the following output: Saving Environment to SPIFlash... OK This is misleading as the flash has neither been erased nor written. Fix it to return an error to the caller, so the output will be: Saving Environment to SPIFlash... Failed (-12) Note that there is another copy of env_sf_save() in the same file, for handling redundant environment, and it already has the same logic. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
2024-01-29video: tidss: Use DT property names for parsing nodesDevarsh Thakkar1-5/+5
Use device-tree node property names for parsing nodes instead of indexing as indexing could be different between different SoCs based on number of DSS entities available on that particular SoC. Also correct the video layer naming in driver to match to actual one being used in upstream DSS device-tree node [1]. This also fixes AM62x splash screen usage using the latest upstream DSS device-tree nodes where hard-coded indexing which driver was using before this patch was not matching the correct properties in the DT node. [1]: Upstream AM62x DSS node: https://github.com/torvalds/linux/blob/v6.8-rc1/arch/arm64/boot/dts/ti/k3-am62-main.dtsi#L774 Fixes: 5f9f816bb8 ("drivers: video: tidss: TIDSS video driver support for AM62x") Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2024-01-29common: splash_source: Don't compile ubifs splash cmd for SPL buildDevarsh Thakkar1-1/+1
Don't compile ubifs splash mount command for SPL build as this command is not supported (and also not enabled) during SPL stage. This fixes below compilation error, when CONFIG_CMD_UBIFS is enabled in defconfig along with splash screen enabled at SPL stage: "aarch64-none-linux-gnu-ld.bfd: common/cli.o: in function `run_command': u-boot-next/u-boot/common/cli.c:51: undefined reference to `parse_string_outer' u-boot-next/u-boot/common/cli.c:51:(.text.run_command+0x10): relocation truncated to fit: R_AARCH64_JUMP26 against undefined symbol `parse_string_outer' make[2]: *** [u-boot-next/u-boot/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 make[1]: *** [u-boot-next/u-boot/Makefile:2053: spl/u-boot-spl] Error 2 make[1]: Leaving directory 'u-boot-next/u-boot/out/a53' make: *** [Makefile:177: sub-make] Error 2" Fixes: eb9217dc03 ("common: Enable splash functions at SPL") Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2024-01-29Merge patch series "Move framebuffer reservation for SPL to RAM end"Tom Rini7-40/+142
Devarsh Thakkar <devarsht@ti.com> says: Move video memory reservation for SPL at end of RAM so that it does not interefere with reservations for next stage so that the next stage need not have holes in between for passed regions and instead it can maintain continuity in reservations. Also catch the bloblist before starting reservations to avoid the same problem. While at it, also fill missing fields in video handoff struct before passing it to next stage. This is as per discussions at : For moving SPL framebuffer reservation at end of RAM: https://lore.kernel.org/all/CAPnjgZ3xSoe_G3yrqwuAvoiVjUfZ+YQgkOR0ZTVXGT9VK8TwJg@mail.gmail.com/ For filling missing video handoff fields : https://lore.kernel.org/all/CAPnjgZ1Hs0rNf0JDirp6YPsOQ5=QqQSP9g9qRwLoOASUV8a4cw@mail.gmail.com/
2024-01-29doc: spl: Add info regarding memory reservationDevarsh Thakkar1-0/+28
Add details regarding scheme which need to be followed in SPL and further stages for those regions which need to be preserved across bootstages. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium>
2024-01-29doc: spl: Add info for missing KconfigsDevarsh Thakkar1-0/+9
Add info regarding splash screen, video, bloblist and GPIO related Kconfigs which were missing in the documentation. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium>
2024-01-29video: Fill video handoff in video post probeDevarsh Thakkar1-10/+20
Fill video handoff fields in video_post_probe as at this point we have full framebuffer-related information. Also fill all the fields available in video hand-off struct as those were missing earlier and U-boot framework expects them to be filled for some of the functionalities. While filling framebuffer size in video hand-off structure use the actual framebuffer region size as derived from gd->video_top and gd->video_bottom instead of directly using the size populated in video_uc_plat as it contains unaligned size. Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-29video: Skip framebuffer reservation if already reservedDevarsh Thakkar2-4/+14
Skip framebufer reservation if it was already reserved from previous stage and whose information was passed using a bloblist. Return error in case framebuffer information received from bloblist is invalid i.e NULL or empty. While at it, improve the debug message to make it more clear that address in discussion is of framebuffer and not bloblist and also match it with printing scheme followed in video_reserve function. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-29common/board_f: Catch bloblist before starting reservationsDevarsh Thakkar1-3/+30
Start reservations needed for init sequence only after catching bloblists from previous stage. This is to avoid catching bloblists in the middle causing gaps while u-boot is reserving. Adjust the relocaddr as per video hand-off information received from previous stage so that further reservations start only after regions reserved for previous stages Skip reservation for video memory if it was already filled by a bloblist. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-29board: ti: am62x: evm: Remove video_setup from spl_board_initDevarsh Thakkar1-18/+0
Remove video_setup from evm_init sequence since video memory is getting called at an earlier place to make sure video memory is reserved at the end of RAM. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-29arm: mach-k3: common: Reserve video memory from end of the RAMDevarsh Thakkar1-5/+12
Setup video memory before page table reservation using "spl_reserve_video_from_ram_top" which ensures framebuffer memory gets reserved from the end of RAM. This is done to enable the next stage to directly skip the pre-reserved area from previous stage right from the end of RAM without having to make any gaps/holes to accommodate those regions which was the case before as previous stage reserved region not from the end of RAM. Use gd->ram_top instead of local ram_top and update gd->reloc_addr after each reservation to ensure further regions are reserved properly. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2024-01-29spl: Enforce framebuffer reservation from end of RAMDevarsh Thakkar2-0/+29
Add an API which enforces framebuffer reservation from end of RAM. This is done so that next stage can directly skip this region before carrying out further reservations. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-01-29board/sunxi/MAINTAINERS: Add new defconfigsTom Rini1-0/+10
Add entries for the recently added defconfig files. I had thought I had committed these updates but lost them before pushing the branch. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-29Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini7-154/+119
- Support Infineon S28HS02GT (Takahiro)
2024-01-29Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini45-214/+1002
- Some cleanups in header files: those do not affect the generated binaries at all. - The usual update of DT files from the kernel repo, mostly adding new board files this time. On the wake of this there is one defconfig to enable a new board, some H618 TV box branded as "Transpeed". - Samuel's series to support SPL FIT image loading for 32-bit SoCs as well, so far this was restricted to ARM64 boards. I refrained from automatically enabling this everywhere, instead this requires user intervention during board configuration. This allows to ship the "crust" management processor firmware on H3 boards, which enables better power saving. - One defconfig for an older H3 board. There was a close-by defconfig for a related board, but there are some differences which deserve a separate file. - Support for the EMAC driver to work with fixed-link PHYs, which allows to directly wire the MAC to a switch IC.
2024-01-29Merge branch '2024-01-29-pytest-enhancements'Tom Rini8-2/+1983
- Update pygit2 version and add a number of additional hardware pytests
2024-01-29test/py: scsi: Add test for scsi commandsLove Kumar1-0/+92
Add a following test cases for scsi commands: scsi_reset - To reset SCSI controller scsi_info - To show available SCSI devices scsi_scan - To (re-)scan SCSI bus scsi_device - To show or set surrent device scsi_part - To print partition table of selected SCSI device Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-01-29test/py: usb: Add tests for USB deviceLove Kumar1-0/+626
Add the test cases for usb commands to test its various functionality such as start, stop, reset, info, tree, storage, dev, part, ls, load, and save. It also adds different file systems cases such as fat32, ext2 and ext4. Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-01-29test/py: mmc: Add tests for MMC deviceLove Kumar1-0/+671
Add the test cases for mmc commands to test its various functionality such as mmc list, dev, info, rescan, part, ls, load, and save. It also adds different file systems cases such as fat32, ext2 and ext4. Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-01-29test/py: secure: Add secure tests for Zynq & ZynqMPLove Kumar2-0/+294
Add test cases to verify the different type of secure boot images loaded at DDR location for AMD's ZynqMP SoC. It also adds tests authentication and decryption functionality using AES and RSA features for Zynq. Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-01-29test/py: gpio: Add gpio pins generic testLove Kumar1-0/+90
Add gpio pins generic test for the set of gpio pin list to test various gpio related functionality, such as the input, set, clear, and toggle, it also tests the input and output functionality for shorted gpio pins. This test depends on boardenv* configuration to define gpio pins names. Signed-off-by: Love Kumar <love.kumar@amd.com>
generated by cgit v1.1 at 2024-11-17 08:55:29 +0000