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2023-07-30Merge tag 'spl-2023-10-rc2' of ↵WIP/30Jun2023Tom Rini5-11/+16
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for spl-2023-10-rc2 SPL: * use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME when booting from NVMe * initialize PCI before booting
2023-07-30spl: initialize PCI before bootingHeinrich Schuchardt2-5/+7
MMC, SATA, and USB may be using PCI based controllers. Initialize the PCI sub-system before trying to boot. Remove the initialization for NVMe that is now redundant. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-07-30spl: CONFIG_SPL_PCI_PNP should depend on CONFIG_SPL_PCIHeinrich Schuchardt1-1/+2
CONFIG_SPL_PCI_PNP=y without CONFIG_SPL_PCI=y makes no sense. Fixes: 32f5e9e5c1a7 ("nvme: pci: Enable for SPL") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-30spl: blk: partition numbers are hexadecimalHeinrich Schuchardt1-1/+1
Loading u-boot.itb from device 0x00, partition 0x0f fails with: Trying to boot from NVME Device 0: Vendor: 0x4x Rev: 8.0.50 Prod: nvme-1 Type: Hard Disk Capacity: 3814.6 MB = 3.7 GB (7812500 x 512) ** Invalid partition 21 ** Couldn't find partition nvme 0:15 Like the command line interface fs_det_blk_dev() expects that the device number and the partition number are hexadecimal. Fixes: 8ce6a2e17577 ("spl: blk: Support loading images from fs") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-07-30part: check CONFIG_IS_ENABLED(ENV_SUPPORT)Heinrich Schuchardt1-3/+5
In SPL environment variables may not be enabled. Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-30spl: blk: use CONFIG_SPL_FS_LOAD_PAYLOAD_NAMEHeinrich Schuchardt1-1/+1
We should target to unify the code for different block devices in SPL to reduce code size. MMC, USB, SATA, and Semihosting use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to indicate the filename to load. NVMe uses CONFIG_SPL_PAYLOAD in spl_blk_load_image(). CONFIG_SPL_PAYLOAD is meant to define which binary to integrate into u-boot-with-spl.bin. See commit 7550dbe38b3f ("spl: Add option SPL_PAYLOAD"). Change spl_blk_load_image() to use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME. Fixes: 8ce6a2e17577 ("spl: blk: Support loading images from fs") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-07-28Merge tag 'efi-2023-10-rc2' of ↵Tom Rini32-1002/+12019
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2023-10-rc2 Documentation: * Update the documentation for TI K3 boards (use SVG images) * Update doc/sphinx/requirements.txt * Describe QEMU emulation of block devices UEFI * Fix device paths for special block devices
2023-07-28Merge branch '2023-07-27-TI-K2-K3-updates'Tom Rini55-1011/+1539
- Resync some of the K3 DTS files with the kernel, and pull in some required related updates to keep drivers in sync with the dts files now. Bring in some incremental fixes on top of one of the series I applied recently as well as updating the iot2050 platform. Also do a few small updates to the K2 platforms.
2023-07-28Merge tag 'u-boot-rockchip-20230728' of ↵WIP/28Jul2023Tom Rini111-245/+5735
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Enable pcie support for rk3568; - Add boards: rk3399: Radxa ROCK 4SE; rk3328: Orange Pi R1 Plus, Orange Pi R1 Plus LTS rk3568: FriendlyARM NanoPi R5S/R5C, Hardkernel ODROID-M1 rk3588: Edgeble Neu6B - support OP-TEE with binman; - support Winbond SPI flash; - rk3588 usbdp phy support; - dts and config updates for different boards;
2023-07-28configs: keystone2: Change to using env filesAndrew Davis11-176/+154
Move to using .env file for setting up environment variables for K2x_evm. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-28configs: keystone2: Unwind KERNEL_MTD_PARTS definitionAndrew Davis14-43/+1
This is more complex than it needs to be and makes converting these boards over to plain text env files more difficult. Remove setting mtdparts as the DTS already contain the partitions. While here also drop the conflicting definitions from the K2 defconfigs. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-28mach-k3: security: improve the checks around authenticationManorit Chawdhry1-11/+9
The following checks are more reasonable as the previous logs were a bit misleading as we could still get the logs that the authetication is being skipped but still authenticate. Move the debug prints and checks to proper locations. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-28env: ti: mmc.env: Fix overlays directory pathVignesh Raghavendra1-1/+1
Similar to get_fdt_mmc make get_overlays_mmc look at /boot/dtb/* path for overlay files. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28env: ti: mmc.env: Move mmc related args to common placeVignesh Raghavendra6-74/+14
All K3 SoCs use same set of args to load kernel for MMC. So move this to common place to avoid duplication. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28configs: am62x: add SPL_MAX_SIZE backManorit Chawdhry1-0/+1
This was regressed by the following commit and is required to build with additional configs enabled. Fixes: 14439cd71c1a ("configs: k3: make consistent bootcmd across all k3 socs") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Tested-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-28arm: k3: fix fdt_del_node_path implicit declaration and a missing includeEmanuele Ghidoli2-0/+2
Fix missing declaration of fdt_del_node_path() while compiling am625_fdt.c and missing common_fdt.h include in common_fdt.c Fixes: 70aa5a94d451 ("arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2023-07-28configs: iot2050: Enabled keyed autobootJan Kiszka1-0/+4
Only accept SPACE to stop autobooting. This is safer to avoid accidental interruptions on unattended devices. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28doc: board: siemens: iot2050: Update build env varsJan Kiszka1-2/+2
ATF is now called BL31, and OP-TEE since 3.21 suggests to use tee-raw.bin instead of (the still identical) tee-pager_v2.bin. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28boards: siemens: iot2050: Unify PG1 and PG2/M.2 configurations againJan Kiszka8-262/+138
This avoids having to maintain to defconfigs that are 99% equivalent. The approach is to use binman to generate two flash images, flash-pg1.bin and flash-pg2.bin. With the help of a template dtsi, we can avoid duplicating the common binman image definitions. Suggested-by: Andrew Davis <afd@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28iot2050: Use binman in signing scriptJan Kiszka1-7/+2
The underlying issue was fixed in the meantime. Also signing the U-Boot proper fit image now works. Just supporting custom cert templates remains a todo. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28boards: siemens: iot2050: Fix boot configurationJan Kiszka4-0/+15
The common env bits now come via ti_armv7_common.env, include it. Furthermore restore the board-specific boot targets and their ordering that is now enforced k3-wide differently. Finally, enable CONFIG_LEGACY_IMAGE_FORMAT explicitly which got lost while turning FIT_SIGNATURE on by default for k3 devices. Fixes: 53873974 ("include: armv7: Enable distroboot across all configs") Fixes: 4ae1a247 ("env: Make common bootcmd across all k3 devices") Fixes: 86fab110 ("Kconfig: Enable FIT_SIGNATURE if ARM64") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-07-28arm: dts: k3-am62: Bump dtsi from linux v6.5-rc1Nishanth Menon11-398/+1064
Update the am62 and am625 device-trees from linux v6.5-rc1. This needed the following tweaks to the u-boot specific dtsi as well: - Switch tick-timer to the main_timer as it's now defined in the main dtsi - Secure proxies are defined in SoC dtsi - Drop duplicate nodes - u-boot.dtsi is includes in r5-sk, no need for either the definitions from main.dtsi OR duplication from u-boot.dtsi Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Maxime Ripard <mripard@kernel.org> Tested-by: Maxime Ripard <mripard@kernel.org> Cc: Francesco Dolcini <francesco@dolcini.it> Cc: Sjoerd Simons <sjoerd@collabora.com> Cc: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28arm: mach-k3: am62: Add timer0 id to the dev listSjoerd Simons1-0/+1
Timer0 is used by u-boot as the tick timer; Add it to the soc devices list so it can be enabled via the k3 power controller. Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Tested-by: Maxime Ripard <mripard@kernel.org> Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Cc: Francesco Dolcini <francesco@dolcini.it> Cc: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28omap: timer: add ti,am654-timer compatibilitySjoerd Simons1-0/+1
The TI AM654 timer is compatible with the omap-timer implementation, so add it to the compatible id list. Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Maxime Ripard <mripard@kernel.org> Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Cc: Francesco Dolcini <francesco@dolcini.it> Cc: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28board: rockchip: Add Hardkernel ODROID-M1Jonas Karlman11-0/+938
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC, a slightly modified version of the RK3568 SoC. Features tested on a ODROID-M1 8GB v1.0 2022-06-13: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe/AHCI - SATA port - USB host Device tree is imported from linux v6.4. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28cmd: ini: Fix build warningJonas Karlman1-1/+1
Building U-Boot with CMD_INI=y result in following build warning: cmd/ini.c: In function 'memgets': include/linux/kernel.h:184:24: warning: comparison of distinct pointer types lacks a cast 184 | (void) (&_min1 == &_min2); \ | ^~ cmd/ini.c:92:15: note: in expansion of macro 'min' 92 | len = min((end - *mem) + newline, num); | ^~~ Fix this by adding an int cast to the pointer arithmetic result. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28ata: dwc_ahci: Fix support for other platformsJonas Karlman1-0/+4
The dwc_ahci driver use platform specific defines, place the platform specific code behind a ifdef CONFIG_ARCH_OMAP2PLUS to allow build and use of the driver on Rockchip platform. Fixes: 02a4b4297901 ("drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-07-28rockchip: px30: Define variables for compressed image supportPaul Kocialkowski1-2/+3
The standard boot path expects the kernel_comp_addr_r and kernel_comp_size variables for booting compressed kernel images. Define them using the previous kernel_addr_c value (likely initially meant for this purpose) and usual size. This was tested on the PX30 EVB to successfully boot compressed Linux kernel images. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk356x: Update PCIe config, IO and memory regionsJonas Karlman2-9/+12
Update config, IO and memory regions used based on [1] with pcie3x2 config reg address and reg size corrected. Before this change: PCI Autoconfig: Bus Memory region: [0-3eefffff], PCI Autoconfig: Bus I/O region: [3ef00000-3effffff], After this change: PCI Autoconfig: Bus Memory region: [40000000-7fffffff], PCI Autoconfig: Bus I/O region: [f0100000-f01fffff], [1] https://lore.kernel.org/lkml/20221112114125.1637543-2-aholmes@omnom.net/ Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk3568-rock-3a: Enable PCIe and NVMe supportJonas Karlman2-0/+23
Add missing pinctrl and defconfig options to enable PCIe and NVMe support on Radxa ROCK 3 Model A. Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1. The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is restored to the perstn pin, a workaround to avoid having to define a new rockchip,pins. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF supportJonas Karlman1-0/+1
Add dummy support for the CLK_PCIEPHY2_REF clock. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28regulator: fixed: Add support for gpios propJonas Karlman1-1/+3
The commit 12df2c182ccb ("regulator: dt-bindings: fixed-regulator: allow gpios property") in linux v6.3-rc1 added support for use of either a gpios or gpio prop with a fixed-regulator. This adds support for the new gpios prop to the fixed-regulator driver. gpios prop is used by vcc3v3-pcie-regulator on Radxa ROCK 3 Model A. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28pci: pcie_dw_rockchip: Disable unused BARs of the root complexJon Lin1-0/+8
The Root Complex BARs default to claim the full 1 GiB memory region on RK3568, leaving no space for any attached device. Fix this by disable the unused BAR 0 and BAR 1 of the RC. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> [jonas@kwiboo.se: Move to rk_pcie_configure and use PCI_BASE_ADDRESS_0/1 const] Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28pci: pcie_dw_rockchip: Speed up link probeJonas Karlman1-31/+37
Use a similar pattern and delay values as the linux mainline driver to speed up failing when nothing is connected. Reduce fail speed from around 5+ seconds down to around one second on a Radxa ROCK 3 Model A, where pcie2x1 is probed before pcie3x2 M2 slot. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28pci: pcie_dw_rockchip: Use regulator_set_enable_if_allowedJonas Karlman1-10/+7
The vpcie3v3 regulator is typically a fixed regulator controlled using gpio. Change to use enable and disable calls on the regulator instead of trying to set a voltage value. Also remove the delay to match linux driver, for a fixed regulator the startup-delay-us prop can be used in case a startup delay is needed. Limited testing on ROCK 3A, ROCK 5B, Quartz64, Odroid-M1 has shown that this delay was not needed. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28pci: pcie_dw_rockchip: Get config region from reg propJonas Karlman2-4/+13
Get the config region to use from the reg prop. Also update the referenced region index used in comment. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28core: read: add dev_read_addr_size_index_ptr functionJonas Karlman2-0/+32
Add dev_read_addr_size_index_ptr function with the same functionality as dev_read_addr_size_index, but instead a return pointer is given. Use map_sysmem() function as cast for the return. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: veyron: Enable Winbond SPI flashAlper Nebi Yasak4-0/+4
Some veyron boards seem to have Winbond SPI flash chips instead of GigaDevice ones. At the very least, coreboot builds for veyron boards have them enabled [1]. Enable support for them here as well. [1] https://review.coreboot.org/c/coreboot/+/9719 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28arm: rockchip: Add Radxa ROCK 4SEChristopher Obbard6-1/+179
Add board-specific devicetree/config for the RK3399T-based Radxa ROCK 4SE board. This board offers similar peripherals in a similar form-factor to the existing ROCK Pi 4B but uses the cost-optimised RK3399T processor (which has different OPP table than the RK3399) and other minimal hardware changes. Kernel tag: next-20230719 Kernel commits: - 86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE") Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28arm: rockchip: sync ROCK Pi 4 SoCs from LinuxChristopher Obbard4-5/+5
To prepare for ROCK 4 SE support, changes are needed to the common ROCK Pi 4 devicetree to move the OPP from the common devicetree to individual board devicetrees. Sync the Rockchip RK3399 ROCK Pi 4-related DTs from Linux to gain from these changes. Kernel tag: next-20230719 Kernel commits: cfa12c32b96f ("arm64: dts: rockchip: correct wifi interrupt flag in Rock \ Pi 4B") cee572756aa2 ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK Pi 4") 2bd1d2dd808c ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK 4C+") fd2762a62646 ("arm64: dts: rockchip: Move OPP table from ROCK Pi 4 dtsi") Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: evb_rk3229: Update/fix READMEAlex Bee1-24/+48
This updates the evb_rk3229's README on howto create / use the FIT image created by binman. Also fix some wrong paths and update filenames which have changed in recent upstream optee-os versions. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: RK322x: Select SPL_OPTEE_IMAGEAlex Bee1-0/+1
For RK322x series ARM SoCs the OP-TEE is non-optional, as besides the TEE it also provides the PSCI implementation, which is expected to be available by upstream linux. Select CONFIG_SPL_OPTEE_IMAGE if an FIT image is built. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28configs: evb-rk3229: Increase SPL_STACK_R_MALLOC_SIMPLE_LENAlex Bee1-1/+1
An OP-TEE FIT image will fail to extract in SPL because the malloc stack size is currently limited to 0x2000 for evb-rk3229 board. In SPL we do not have to care about size limitations, since we are no longer bound to SRAM limits after DRAM initialization has been done in TPL. Use the default value for CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN in order successfully unpack the FIT image. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: Support OP-TEE for ARM in FIT images created by binmanAlex Bee3-68/+35
CONFIG_SPL_OPTEE_IMAGE option is used during DRAM size detection for Rockchip ARM platform to indicate that an OP-TEE binary was already loaded and a Trusted Execution Environment (TEE) is available in order to block/reserve a memory-region for it. This adds a bunch of new `#if's` to u-boot-rockchip.dtsi to include the OP-TEE binary in the FIT image for ARM SOCs if CONFIG_SPL_OPTEE_IMAGE is selected. That makes it a little harder to read, but I opted for that, because all the duplicates in an extra ARM-OP-TEE-specfic .dtsi would be the greater evil, IMHO. Besides it's more likley being "forgotten" to sync when changes in u-boot-rockchip.dtsi are made. The no longer required rockchip-optee.dtsi and it's inclusions are dropped. The hardcoded load address is common across all OP-TEE implemenations for Rockchip (vendor and upstream). The OP-TEE-binary is non-optional if CONFIG_SPL_OPTEE_IMAGE is selected and there will be an error if the file does not exist and/or `TEE=` build option is missing. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28configs: rockchip: rock5b-rk3588: Enable CONFIG_PCI_INIT_RChristopher Obbard1-0/+1
Enable CONFIG_PCI_INIT_R for rock5b pci enumeration during boot in order to autodetect the PCI ethernet NIC during the boot process. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk3568: Fix alloc space exhausted in SPLJonas Karlman1-1/+1
Current SYS_MALLOC_F_LEN of 0x2000 (8 KB) used in SPL is too small for some RK3568 boards. SPL will print following during boot: alloc space exhausted Increase the default SYS_MALLOC_F_LEN to 0x20000 (128 KB) to mitigate. Fixes: 2a950e3ba506 ("rockchip: Add rk3568 architecture core") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28mtd: nand: raw: rockchip_nfc: copy hwecc PA data to oob_poi bufferJohan Jonker1-13/+21
Rockchip boot blocks are written per 4 x 512 byte sectors per page. Each page must have a page address (PA) pointer in OOB to the next page. Pages are written in a pattern depending on the NAND chip ID. This logic used to build a page pattern table is not fully disclosed and is not easy to fit in the MTD framework. The formula in rk_nfc_write_page_hwecc() function is not correct. Make hwecc and raw behavior identical. Generate boot block page address and pattern for hwecc in user space and copy PA data to/from the already reserved last 4 bytes before EEC in the chip->oob_poi data layout. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: puma: pass platform parameter to TF-AQuentin Schulz1-1/+0
Puma supports upstream TF-A and is configured to output serial on UART0 instead of the default UART2. Since U-Boot is properly configured to output on UART0, let's pass the DT to TF-A so there is no need for a custom TF-A to make the latter output to UART0 too. Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28rockchip: rk3399: pass platform parameter to TF-A by default for new RK3399 ↵Quentin Schulz29-1/+28
boards Long are gone the times TF-A couldn't handle the FDT passed by U-Boot. Specifically, since commit e7b586987c0a ("rockchip: don't crash if we get an FDT we can't parse") in TF-A, failure to parse the FDT will use the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two years ago. New boards should likely have this option disabled or explicitly enable it in their respective defconfig. Because existing boards might depend on a TF-A version that predates v2.4, let's just enable this option in all RK3399 defconfigs. Maintainers of each board can decide for themselves if they would prefer to disable this option and allow U-Boot to pass the DT to TF-A. Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28board: rockchip: Add Edgeble Neural Compute Module 6BJagan Teki5-0/+98
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module based on Rockchip RK3588J from Edgeble AI. Add support for this SoM and IO board. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.1 at 2024-11-17 13:11:32 +0000