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2019-07-17configs: am65x_hs_evm_defconfig: Enable I2C supportAndreas Dannenberg2-0/+8
Enable I2C via driver model as well as the associated set of U-Boot commands to allow us interacting with various I2C slave devices. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Andrew F. Davis <afd@ti.com>
2019-07-17configs: am65x_evm_defconfig: Enable I2C supportAndreas Dannenberg2-0/+8
Enable I2C via driver model as well as the associated set of U-Boot commands to allow us interacting with various I2C slave devices. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17arm: dts: k3-am654-base-board: Enable wkup_i2c0 across all boot stagesAndreas Dannenberg4-0/+41
To enable the use of an EEPROM-based board detection scheme we need to be able to access the I2C bus associated with the EEPROMs across all 3 stages of U-Boot: R5 SPL, A53 SPL, and A53 U-Boot (proper). So go ahead and add/update the wkup_i2c0 peripheral module DTS definitions and its associated pinmux node accordingly. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17arm: dts: k3-am65: Add I2C nodesAndreas Dannenberg4-0/+72
Add I2C DT nodes Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17arm: dts: k3-am65: Move pinctrl nodes out of U-Boot specific dtsiAndreas Dannenberg3-15/+16
Only U-Boot specifc DT properties or overrides, must be in -u-boot.dtsi. Pinctrl nodes does not belong here. Now that pinctrl nodes are in kernel DT, there is no reason to be keep these in -u-boot.dtsi. Move them to proper places so that it would ease copying DT entries from kernel DT. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17arm: omap_i2c: Remove unwanted header file inclusionVignesh R1-2/+0
There is no need for to include this header here, so drop it. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17i2c: omap24xx_i2c: Adapt driver to support K3 devicesVignesh R1-1/+1
K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be compiled for ARCH_K3. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17am65x: README: Add eMMC layout and flash instructionsFaiz Abbas1-0/+52
Add instructions for flashing boot images to the eMMC with a layout of the address where each image needs to be flashed. Also add instructions to flash filesystem partition in user partition and boot kernel from the rootfs. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17configs: am65x_hs_evm: Add Support for eMMC bootAndreas Dannenberg2-0/+4
Add configs to support RAW boot mode in eMMC. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17configs: am65x_evm: Add Support for eMMC bootFaiz Abbas3-0/+6
Add configs to support RAW boot mode in eMMC. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17configs: am65x_hs_evm_r5: All sysfw to be loaded via MMCAndreas Dannenberg1-1/+3
Enable all the relevant configs that enables support for loading sysfw via MMC. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-17configs: am65x_evm_r5: All sysfw to be loaded via MMCAndreas Dannenberg1-1/+3
Enable all the relevant configs that enables support for loading sysfw via MMC. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17armV7R: K3: am654: Load SYSFW binary and config from boot mediaAndreas Dannenberg2-1/+27
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the AM654 early initialization sequence. While at it also initialize the WKUP_UART0 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17armv7R: K3: am654: Use full malloc implementation in SPLAndreas Dannenberg3-2/+3
Switch to using the full malloc scheme in post-relocation SPL to allow better utilization of available memory for example by allowing memory to get freed. Initially allocate a 16MB-sized region in DDR starting at address 0x84000000 for this purpose. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17armV7R: K3: am654: Allow using SPL BSS pre-relocationAndreas Dannenberg1-2/+23
In order to be able to use more advanced driver functionality which often relies on having BSS initialized during early boot prior to relocation several things need to be in place: 1) Memory needs to be available for BSS to use. For this, we locate BSS at the top of the MCU SRAM area, with the stack starting right below it, 2) We need to move the initialization of BSS prior to entering board_init_f(). We will do this with a separate commit by turning on the respective CONFIG option. In this commit we also clean up the assignment of the initial SP address as part of the refactoring, taking into account the pre-decrement post- increment nature in which the SP is used on ARM. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17arm: K3: Introduce System Firmware loader frameworkAndreas Dannenberg4-0/+314
Introduce a framework that allows loading the System Firmware (SYSFW) binary as well as the associated configuration data from an image tree blob named "sysfw.itb" from an FS-based MMC boot media or from an MMC RAW mode partition or sector. To simplify the handling of and loading from the different boot media we tap into the existing U-Boot SPL framework usually used for loading U-Boot by building on an earlier commit that exposes some of that functionality. Note that this initial implementation only supports FS and RAW-based eMMC/SD card boot. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17spl: Make image loader infrastructure more universalAndreas Dannenberg3-25/+91
The current U-Boot SPL image loader infrastructure is very powerful, able to initialize and load from a variety of boot media however it is strongly geared towards loading specific types of images in a very specific way. To address the need being able to use this infrastructure to load arbitrary image files go ahead and refactor it as follows: - Refactor existing spl_mmc_load_image function into superset function, accepting additional arguments such as filenames and media load offset (same concept can also be applied toother spl_XXX_load_image functions) - Extend the loader function to "remember" their peripheral initialization status so that the init is only done once during the boot process, - Extend the FIT image loading function to allow skipping the parsing/ processing of the FIT contents (so that this can be done separately in a more customized fashion) - Populate the SPL_LOAD_IMAGE_METHOD() list with a trampoline function, invoking the newly refactored superset functions in a way to maintain compatibility with the existing behavior This refactoring initially covers MMC/SD card loading (RAW and FS-based). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17spl: Allow performing BSS init early before board_init_f()Andreas Dannenberg2-17/+46
On some platform we have sufficient memory available early on to allow setting up and using a basic BSS prior to entering board_init_f(). Doing so can for example be used to carry state over to board_init_r() without having to resort to extending U-Boot's global data structure. To support such scenarios add a Kconfig option called CONFIG_SPL_EARLY_BSS to allow moving the initialization of BSS prior to entering board_init_f(), if enabled. Note that using this option usually should go along with using CONFIG_SPL_SEPARATE_BSS and configuring BSS to be located in memory actually available prior to board_init_f(). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-17mmc: am654_sdhci: Allow driver to probe without PDs specifiedAndreas Dannenberg1-8/+8
We would like to use the driver even without power domains being specified for cases such as during early boot when the required power domains have already gotten enabled by the SoC's boot ROM and such explicit initialization is not needed and possible. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17configs: am65x_evm_a53: Add Support for creating GPT partitionsFaiz Abbas1-1/+1
Add Support for creating GPT partitions in U-boot. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17am65x_evm: Add Support for creating a filesystem GPT partition in eMMCFaiz Abbas1-2/+7
Add Support for creating a GPT partition for the filesystem in eMMC. The filesystem is created in the user partition (partition 0). Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17configs: am65x: Add configs to support environment in eMMCFaiz Abbas2-3/+12
Add configs such that U-boot environment is in eMMC by default. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17mmc: am654_sdhci: Add a platform specific set_control_reg() callbackFaiz Abbas1-1/+17
Add a platform specific set_control_reg() callback to help switch to UHS speed modes. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timingsFaiz Abbas3-37/+55
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific to arasan/zynq controllers. Add the same to sdhci.h. Also create a common API to set UHS timings in HOST_CONTROL2. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17configs: am65x_evm: Enable CONFIG_REGMAPFaiz Abbas2-0/+4
Add Support for CONFIG_REGMAP. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: am654_sdhci: Add Support for PHYFaiz Abbas2-7/+219
Add support in the driver for handling phy specific registers. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: sdhci: Make set_ios_post() return intFaiz Abbas3-3/+5
Make set_ios_post() return int to faciliate error handling in platform drivers. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17arm: dts: k3: Add phy specific properties to SD card nodeFaiz Abbas2-0/+4
With changes in the driver requiring phy related properties, add the same for the SD card node to prevent breaking boot with the driver update. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: sdhci: Make sdhci_set_clock() non staticFaiz Abbas2-1/+2
The am654_sdhci driver needs to switch the clock off before disabling its phy dll and needs to re-enable the clock before enabling the phy again. Therefore, make the sdhci_set_clock() function accessible in the am654_sdhci driver. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: sdhci: Add support for sdhci-caps-maskFaiz Abbas1-3/+15
Add Support for masking some bits in the capabilities register of a host controller. Also remove the redundant readl() into caps1. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17regmap: Add API regmap_init_mem_index()Faiz Abbas2-0/+44
In device nodes with more than one entry in the reg property, it is sometimes useful to regmap only of the entries. Add an API regmap_init_mem_index() to facilitate this. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17mmc: am654_sdhci: Remove quirksFaiz Abbas1-3/+0
The host controller works perfectly well without having to add any quirks. Remove them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17arm64: dts: k3: Sync sdhci0 node from kernel and change driver nameFaiz Abbas9-49/+116
Sync the sdhci0 node from kernel. This changes the compatible that is required to be there in the driver. Change the same for the SD card node which is not yet supported in kernel. This also syncs the main_pmx0 node as a side effect. Also change the name of the driver to match the compatible in kernel. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-16Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini165-328/+719
- Beelink-x2 STB support (Marcus) - H6 DDR3, LPDDR3 changes (Andre, Jernej) - H6 pin controller, USB PHY (Andre)
2019-07-16sunxi: H6: Enable USB for existing boardsAndre Przywara5-0/+10
So far USB was not enabled for the Allwinner H6 boards, as the PHY driver was not ready and the clock gates were missing. Since this is now fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for all existing H6 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: phy: Add USB PHY support for Allwinner H6Andre Przywara1-0/+20
The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual), which require a small addition to the USB PHY driver: In this case the second PHY is PHY3, not PHY1, so we need to skip number 1 and 2 in the code. Just use the respective code from Linux for that. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: clocks: Add H6 USB clock gates and resetsAndre Przywara1-0/+29
To enable USB support in U-Boot, add the required clock and reset gates to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will pick them up from there automatically. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: gpio: Enable support for H6 pin controllerAndre Przywara1-0/+2
The Allwinner H6 pin controller is not really special, at least not when it comes to normal GPIO operation. Add the H6 compatible strings to the list of recognised strings, to make GPIOs work for H6 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: move SUNXI_GPIO to KconfigAndre Przywara4-4/+7
Probably for no particular reason SUNXI_GPIO was still defined the "old way", in header files only. Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove another line from our dreadful config_whitelist.txt. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3 DRAM delay valuesJernej Skrabec1-6/+17
Add some basic line delay values to be used with DDR3 DRAM chips on some H6 TV boxes. Taken from a register dump after boot0 initialised the DRAM. Put them as the default delay values for DDR3 DRAM until we know better. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3-1333 timingsAndre Przywara3-0/+153
Add a routine to program the timing parameters for DDR3-1333 DRAM chips connected to the H6 DRAM controller. The values were gathered from doing back-calculations from a register dump, trying to match them up with the official JEDEC DDDR3 spec. If in doubt, the register dump values were taken for now, but the JEDEC recommendation were added as a comment. Many thanks to Jernej for contributing fixes! Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: Add DDR3 support to DRAM controller driverAndre Przywara2-28/+62
At the moment the H6 DRAM driver only supports LPDDR3 DRAM. Extend the driver to cover DDR3 DRAM as well. The changes are partly motivated by looking at the ZynqMP register documentation, partly by looking at register dumps after boot0/libdram has initialised the controller. Many thanks to Jernej for contributing some fixes! Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: move LPDDR3 timing definition into separate fileAndre Przywara10-148/+177
Currently the H6 DRAM driver only supports one kind of LPDDR3 DRAM. Split the timing parameters for this LPDDR3 configuration into a separate file, to allow selecting an alternative later at compile time (as the sunxi-dw driver does). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: DRAM: follow recommended PHY init algorithmAndre Przywara1-1/+3
The DRAM controller manual suggests to first program the PHY initialisation parameters to the PHY_PIR register, and then set bit 0 to trigger the initialisation. This is also used in boot0. Follow this recommendation by setting bit 0 in a separate step. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-16sunxi: H6: DRAM: avoid memcpy() on MMIO registersAndre Przywara1-2/+4
Using memcpy() is, however tempting, not a good idea: It depends on the specific implementation of memcpy, also lacks barriers. In this particular case the first registers were written using 64-bit writes, and the last register using four separate single-byte writes. Replace the memcpy with a proper loop using the writel() accessor. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-15Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini32-625/+1506
2019-07-15net: macb: Add support for 1000-baseXRadu Pirea1-2/+4
Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and LPA_1000XHALF bits. Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15net: macb: Fixed reading MII_LPA registerRadu Pirea1-1/+1
If macb is gem and is gigabit capable, lpa value is not read from the right register(MII_LPA) and is read from MII_STAT1000. This patch fixes reading of the lpa value. Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15configs: am65x_evm_a53: enable networkingGrygorii Strashko1-0/+6
Enable TI K3 AM65x CPSW NUSS driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-15arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defsGrygorii Strashko1-0/+59
Add mcu cpsw nuss pinmux and phy defs required by cpsw. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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