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2023-06-28Merge tag 'u-boot-amlogic-next-20230628' of ↵WIP/28Jun2023-nextTom Rini28-0/+1889
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - add support for Amlogic A1 SoC and ad401 board - add support for Videostrong KII Pro - introduce secure power domain for A1 SoC
2023-06-28drivers: meson: introduce secure power controller driverAlexey Romanov3-0/+168
This patch adds Power controller driver support for Amlogic A1 family using secure monitor calls. The power domains register only can access in secure world. Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230531093156.29240-4-avromanov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28dt-bindings: power: add Meson A1 PWRC bindingsAlexey Romanov1-0/+32
We can use them in secure pwrc driver. Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230531093156.29240-3-avromanov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28arch/arm: meson: sm: introduce power domain functionsAlexey Romanov2-0/+44
This commit adds functions to manage secure power domain for Amlogic SoC's using smc functionality. Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230531093156.29240-2-avromanov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28doc: boards: amlogic: add documentation for KII ProFerass El Hafidi3-0/+114
Add build instructions for the KII Pro set-top box. Signed-off-by: Ferass El Hafidi <vitali64pmemail@protonmail.com> Link: https://lore.kernel.org/r/20230507124109.31778-4-vitali64pmemail@protonmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28boards: amlogic: add KII Pro defconfigFerass El Hafidi2-0/+71
Add configurations for the Videostrong KII Pro set-top box. This defconfig is cloned from the WeTek Play2's. Signed-off-by: Ferass El Hafidi <vitali64pmemail@protonmail.com> Link: https://lore.kernel.org/r/20230507124109.31778-3-vitali64pmemail@protonmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28arm: dts: add support for Videostrong KII ProFerass El Hafidi3-0/+154
Import the device tree from mainline linux (v6.4-rc1) and add the old PHY reset bindings in the PHY node, else U-Boot and linux won't be able to use the PHY. Signed-off-by: Ferass El Hafidi <vitali64pmemail@protonmail.com> Link: https://lore.kernel.org/r/20230507124109.31778-2-vitali64pmemail@protonmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28board: amlogic: add support for AD401 boardIgor Prusov5-0/+80
The AD401 board is the Amlogic A1 SoC reference board Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-6-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28pinctrl: meson: add pinctrl driver for Amlogic A1Igor Prusov3-0/+872
Based on Linux kernel commit: dabad1ff85611 (pinctrl: meson: add pinctrl driver support for Meson-A1 SoC) Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-5-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28ARM: meson: add A1 supportIgor Prusov5-0/+89
Add support for Amlogic A1 SoC family. Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Signed-off-by: Evgeny Bachinin <eabachinin@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-4-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28ARM: dts: sync meson-a1-ad401 from Linux 6.3-rc7Igor Prusov2-0/+31
Add meson-a1-ad401.dts file from Linux 6.3-rc7 Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-3-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28ARM: dts: Add Amlogic Meson A1 DT from Linux 6.3-rc7Igor Prusov2-0/+234
Import Linux 6.3-rc7 Device tree and necessary bindings for Amlogic A1 board from 6a8f57ae2eb0 ("Linux 6.3-rc7"). Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-2-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-22Merge branch '2023-06-21-fix-get_ram_size-with-cache-enabled' into nextTom Rini2-0/+29
To quote the author: Ensure that every write is flushed to memory and afterward reads are from memory. Since the algorithm rely on the fact that accessing to not existent memory lead to write at addr / 2 without this modification accesses to aliased (not physically present) addresses are cached and wrong size is returned. This was discovered while working on a TI AM625 based board where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL").
2023-06-21common/memsize.c: Fix get_ram_size() when cache is enabledWIP/2023-06-21-fix-get_ram_size-with-cache-enabledEmanuele Ghidoli1-0/+24
Ensure that every write is flushed to memory and afterward reads are from memory. Since the algorithm rely on the fact that accessing to not existent memory lead to write at addr / 2 without this modification accesses to aliased (not physically present) addresses are cached and wrong size is returned. This was discovered while working on a TI AM625 based board where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL"). Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2023-06-21sandbox: Add a dummy dcache_status() functionEmanuele Ghidoli1-0/+5
This adds dcache_status() so that code using it can build without error on sandbox. This is required in preparation of adding cache handling into get_ram_size function. Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-21Merge branch '2023-06-20-assorted-update' into nextTom Rini16-31/+238
- Assorted updates and improvements
2023-06-20test: dm: restore /firmware nodes after testingAKASHI Takahiro1-1/+1
dm_test_restore() is called after dm unit test is run. But this function does not scan any nodes under /firmware since it calls dm_scan_fdt(). This causes an issue. For instance, scmi_sandbox_agent device will disappear after running 'ut dm scmi_sandbox_agent'. So call dm_extended_scan() instead. This change will be coherent with what dm_scan() and test_pre_run() does. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20stdio: Remove stdio_init()Masahiro Yamada2-15/+0
This function is not used by anyone. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20configs: am64x_evm_*_defconfig: Enable High Secure device supportVignesh Raghavendra2-0/+2
Enable CONFIG_TI_SECURE_DEVICE to support booting High Secure(HS) variants of AM64x SoC. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-20configs: synquacer: increase SYS_MALLOC_F_LENMasahisa Kojima1-1/+1
DM_FLAG_PRE_RELOC flag is added into some drivers by recent commits such as 1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC"). Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform is too small, Developerbox will not boot due to lack of heap memory. This commit increases the size of heap memory. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-20test: bdinfo: Add test for command bdinfoMarek Vasut4-0/+196
Add test for command bdinfo . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20python: Update requirements.txt for security issuesTom Rini2-3/+3
Per GitHub Dependabot: - Use setuptools 65.5.1 to avoid some DoS issue - Use requests 2.31.0 to avoid leaking some proxy information Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-06-20drivers: spi: omap3_spi: Initialize mode for all channelsJulien Panis2-7/+17
At first SPI transfers, multiple chip selects can be enabled simultaneously. This is due to chip select polarity, which is not properly initialized for all channels. This patch fixes the issue. Signed-off-by: Julien Panis <jpanis@baylibre.com>
2023-06-20psci: fix use of clobbered registers in asmSam Edwards1-3/+3
The functions `psci_get_context_id` and `psci_get_target_pc` are written in C, so the C compiler may clobber registers r0-r3. Do not use these registers to save data across calls. Signed-off-by: Sam Edwards <CFSworks@gmail.com>
2023-06-20mkimage: ecdsa: password for signing from environmentStefano Babic1-1/+15
Use a variable (MKIMAGE_SIGN_PASSWORD) like already done for RSA to allow the signing process to run in batch. Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-06-20usb: eth: lan78xx: Fix logic in lan78xx_read_otp() to avoid a warningTom Rini1-4/+2
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1 or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we set offset to itself, and clang warns about this. Rework the logic so that if sig is the second indicator we adjust the offset as today and if it does not match the first indicator we return -EINVAL Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-20spl: spl-nor: return error if no valid image was loadedMario Kicherer1-1/+1
If only FIT images are enabled and loading the FIT image fails, spl_nor_load_image() should return an error instead of zero. Without this patch: >>SPL: board_init_r() spl_init Trying to boot from NOR Unsupported OS image.. Jumping nevertheless.. image entry point: 0x0 With patch: >>SPL: board_init_r() spl_init Trying to boot from NOR SPL: failed to boot from all boot devices (err=-6) .### ERROR ### Please RESET the board ### Signed-off-by: Mario Kicherer <dev@kicherer.org>
2023-06-20Merge branch '2023-06-19-spl-nvme-support' into nextTom Rini10-1/+214
To quote the author: This patchset adds support to load images of the SPL's next booting stage from a NVMe device
2023-06-19common: spl: Add spl NVMe boot supportMayuresh Chitale3-0/+34
Add support to load the next stage image from an NVMe disk which may be formatted as an EXT or FAT filesystem. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> [trini: Drop hunk changing disk/part.c as that breaks other users] Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-19nvme: pci: Enable for SPLMayuresh Chitale3-1/+8
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP for SPL which is required to auto configure the PCIe devices. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19spl: blk: Support loading images from fsMayuresh Chitale5-0/+146
Add a generic API to support loading of SPL payload from any supported filesystem on a given partition of a block device. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19spl: Add Kconfig options for NVMEMayuresh Chitale1-0/+26
Add kconfig options to enable NVME and PCI NVMe support in SPL Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-19global: Use proper project name U-Boot (next)Michal Simek9-17/+17
Use proper project name in DTs, messages and READMEs. Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-19Merge branch '2023-06-19-corstone1000-fwu-updates' into nextTom Rini7-16/+97
To quote the author: Now that the nvmxip block driver is merged we can add on top of it the platform code to use GPT and FWU metadata in the Corstone1000. But first, push 2 fixes that are needed to make all this work: - move nvmxip header to include - setup fwu metadata structures as packed (we have a 32bit writer - Secure enclave Cortex-M0 and a 64bit reader host Cortex-A35)
2023-06-19corstone1000: add nvmxip, fwu-mdata and gpt optionsWIP/2023-06-19-corstone1000-fwu-updatesRui Miguel Silva3-10/+14
Enable the newest features: nvmxip, fwu-metadata and gpt. Commands to print the partition info, gpt info and fwu metadata will be available. Adjust also env boot script the address of the bootbank with the new gpt layout, and also remove the not needed kernel address bank0 and bank1 and retrieve function that would test the bank flag before and now we are getting the info from the fwu metadata. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19corstone1000: set kernel_addr based on boot_idxRui Miguel Silva2-1/+56
We need to distinguish between boot banks and from which partition to load the kernel+initramfs to memory. For that, fetch the boot index, fetch the correspondent partition, calculate the correct kernel address and then set the env variable kernel_addr with that value. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19corstone1000: add boot indexRui Miguel Silva1-1/+17
it is expected that the firmware that runs before u-boot somehow provide the information of the bank for now we will fetch the info from the metadata since the Secure enclave is the one responsible for this information. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19corstone1000: add fwu-metadata store infoRui Miguel Silva1-1/+6
Add fwu-mdata node and handle for the reference nvmxip-qspi. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19nvmxip: move header to includeRui Miguel Silva2-1/+1
Move header to include to allow external code to get the internal bdev structures to access block device operations. as at it, just add the UCLASS_NVMXIP string so we get the correct output in partitions listing. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19fwu_metadata: make sure structures are packedRui Miguel Silva1-3/+4
The fwu metadata in the metadata partitions should/are packed to guarantee that the info is correct in all platforms. Also the size of them are used to calculate the crc32 and that is important to get it right. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-06-16Merge tag 'u-boot-stm32-20230616' of ↵WIP/16Jun2023-nextTom Rini51-430/+2031
https://source.denx.de/u-boot/custodians/u-boot-stm into next serial: stm32: Fixes to avoid suprious characters Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards stm32mp: stm32prog: Add support of ENV partition type config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT stm32: Add IWDG handling into PSCI suspend code stm32: Fix OF_LIST on DHCOR stm32: Add missing header for save_boot_params stm32: Use __section(".data") with dot in the section name on DHSOM stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards dts: stm32mp: alignment with v6.3 dts: stm32f769-disco: remove the dsi_host node configs: stm32f746-disco: remove a useless comment
2023-06-16serial: stm32: BRR must be set only when usart is disablePatrice Chotard1-0/+6
To avoid spurious chars, BRR register must only be written when USART is disabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16serial: stm32: Wait TC bit before performing initializationPatrice Chotard2-0/+16
In case there is still chars from previous bootstage to transmit, wait for TC (Transmission Complete) bit to be set which ensure that the last data written in the USART_TDR has been transmitted out of the shift register. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16configs: stm32f746-disco: remove a useless commentDario Binacchi1-2/+0
Commit 8fc78fc73b7f9d ("configs: migrate CONFIG_BMP_16/24/32BPP to defconfigs") made the comment useless. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16ARM: dts: stm32f769-disco: remove the dsi_host nodeDario Binacchi1-5/+0
The node has become useless, as described in the commit 754815b854258 ("video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16ARM: dts: stm32mp: alignment with v6.3Patrick Delaunay12-38/+1459
Device tree alignment with Linux kernel v6.3: - f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi - 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts - 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi - 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk - ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi - a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio - 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT property - ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13 - 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk - ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk - e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk - 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131 - 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support on stm32mp131 - 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on stm32mp131 - 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131 - 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on stm32mp135f-dk - 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk - c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk - 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13 - 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dk - e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13 - 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on stm32mp135f-dk - 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som - 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som - 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l - 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on stm32mp15xx-dkx - f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx - dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property - ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131 - 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131 - c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131 - 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131 - bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131 - a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk - a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk - a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk - 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros - 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on stm32mp131 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16media: dt-bindings: media: Add macros for video interface bus typesPatrick Delaunay1-0/+16
Add a new dt-bindings/media/video-interfaces.h header that defines macros corresponding to the bus types from media/video-interfaces.yaml. This allows avoiding hardcoded constants in device tree sources. Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros for video interface bus types") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16pmic: stpmic1: support new prefix node name for regulatorPatrick Delaunay1-0/+2
The '_' character is discouraged in the node name, this patch adds the new prefix of regulator subnode, with the '-' character, in STM32MP1 driver to support the new naming rule in Linux kernel device trees. It is a preliminary patch before Linux device tree synchronization for STMicroelectronics boards. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16stm32mp: stm32prog: use the decimal format by default for offset parsingPatrick Delaunay1-1/+1
Change the default base for offset parsing with simple_strtoull(), so offset in flashlayout is coded in base 10 by default, even if string start with '0'. The Octal encoding is not supported. The base 16 is still supported when the '0x' header is detected. This patch solves an unexpected parsing result when the address, provided by decimal value is starting by 0, for example 0x4400 = 00017408 is a invalid with current code. ... P 0x04 fsbl1 Binary mmc0 00017408 tf-a.stm32 .... Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16stm32mp: stm32prog: fix OTP read/write error managementPatrick Delaunay1-1/+8
Avoid to ignore the OTP read/write error and transmits the error to STM32CubeProgrammer. Today the error is only displayed in log error: so the user on HOST thinks the OTP operation is performed. Reported-by: Mickael GARDET <m.gardet@overkiz.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Fixes: 75ea9e75931c ("stm32mp: stm32prog: add TEE support in stm32prog command") Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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