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2021-04-23mips: octeon: Add cvmx-helper-jtag.cAaron Williams1-0/+172
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-fdt.cAaron Williams1-0/+970
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-cfg.cAaron Williams1-0/+1914
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to machStefan Roese2-1/+1
To match all other cvmx-* header, this patch moves the already existing cvmx-lmcx-defs.h header one directory up. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Misc changes required because of the newly added headersStefan Roese9-236/+343
With the newly added headers and their restructuring (which macro is defined where), some changes in the already existing Octeon files are necessary. This patch makes the necessary changes. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add misc remaining header filesAaron Williams29-0/+12242
Import misc remaining header files from 2013 U-Boot. These will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: Add cvmx-sso-defs.h header fileAaron Williams1-0/+2904
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sriox-defs.h header fileAaron Williams1-0/+44
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sriomaintx-defs.h header fileAaron Williams1-0/+61
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-smix-defs.h header fileAaron Williams1-0/+360
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sli-defs.h header fileAaron Williams1-0/+6548
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sata-defs.h header fileAaron Williams1-0/+311
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-rst-defs.h header fileAaron Williams1-0/+77
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pow-defs.h header fileAaron Williams1-0/+1135
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pko-defs.h header fileAaron Williams1-0/+9388
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pki-defs.h header fileAaron Williams1-0/+2353
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pip-defs.h header fileAaron Williams1-0/+3040
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pepx-defs.h header fileAaron Williams1-0/+1382
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pemx-defs.h header fileAaron Williams1-0/+2028
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pcsx-defs.h header fileAaron Williams1-0/+1005
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pciercx-defs.h header fileAaron Williams1-0/+5586
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pcieepx-defs.h header fileAaron Williams1-0/+6848
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-npi-defs.h header fileAaron Williams1-0/+1953
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-mio-defs.h header fileAaron Williams1-0/+353
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-l2c-defs.h header fileAaron Williams1-0/+172
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-ipd-defs.h header fileAaron Williams1-0/+1925
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-gserx-defs.h header fileAaron Williams1-0/+2191
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-gmxx-defs.h header fileAaron Williams1-0/+6378
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-fpa-defs.h header fileAaron Williams1-0/+1866
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dtx-defs.h header fileAaron Williams1-0/+6962
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dpi-defs.h header fileAaron Williams1-0/+1460
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dbg-defs.h header fileAaron Williams1-0/+33
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-ciu-defs.h header fileAaron Williams1-0/+7351
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-bgxx-defs.h header fileAaron Williams1-0/+4106
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-asxx-defs.h header fileAaron Williams1-0/+709
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-agl-defs.h header fileAaron Williams1-0/+3135
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add misc cvmx-helper header filesAaron Williams24-0/+5498
Import misc cvmx-helper header files from 2013 U-Boot. They will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: global_data.h: Add Octeon specific data to arch_global_data structStefan Roese1-0/+9
This will be used by the upcoming Serdes and driver code ported from the original 2013 U-Boot code to mainline. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23Merge branch '2021-04-22-assorted-updates'Tom Rini29-79/+286
- Move LMB to Kconfig, improve functionality - Add partlabel support to more fs cmds
2021-04-23Merge https://source.denx.de/u-boot/custodians/u-boot-usbWIP/23Apr2021Tom Rini2-0/+28
2021-04-23Merge tag 'mips-pull-2021-04-22' of ↵Tom Rini10-68/+906
https://source.denx.de/u-boot/custodians/u-boot-mips - net: fix traffic problems in MSCC Jaguar 2 network driver - MIPS: mt7628: fix DDR memory init - MIPS: octeon: add MMC and USB support
2021-04-22usb: ehci-hcd: Add IAA handshake for removing async QHYe Li2-0/+28
According to EHCI spec, software needs to do handshake with HC for safely removing QH from async list. This handshake is implemented by setting IAAD (Interrupt on Async Advance Doorbell) bit in USB_USBCMD register and poll the IAA (Interrupt on Async Advance bit) in the USB_USBSTS to ensure the HC has released all on-chip state that may potentially reference one of the data structures just removed. Current codes only check active status of the last QTD, but this can't ensure the QH is released from HC. We can meet unrecoverable "EHCI timed out on TD" errors when running UEFI SCT tests on USB disk. The USB_ASYNCLISTADDR register is changed to a invalid address when the issue happens. It is fixed after adding the IAA handshake. Steps to reproduce the issue: 1. Build the UEFI SCT from https://github.com/tianocore/edk2-test 2. Build the EDK2 UEFI Shell from https://github.com/tianocore/edk2 3. Copy SCT files and Shell.efi to USB disk FAT partition 4. Load the Shell.efi from USB FAT, and run bootefi to execute it 5. After booting into Shell, enter the SCT directory and run "sct -a" to execute all tests. 6. Tests run about 1 hour and stop with many EHCI timeout errors like EHCI timed out on TD - token=0x801f8c80 Signed-off-by: Ye Li <ye.li@nxp.com>
2021-04-22configs: stm32mp15: increase the number of reserved memory region in lmbPatrick Delaunay2-0/+6
For the latest kernel device tree the max number of reserved regions in lmb library is reached: 8 with 5 reserved regions in device tree. When a new region is added, the lmb allocation for the device tree relocation failed and boot with ramdisk failed. This patch avoids this issue by increasing the max number of supported reserved memory in lmb library to 16. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: Add 2 config to define the max number of regionsPatrick Delaunay3-2/+69
Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS to change independently the max number of the regions in lmb library. When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to struct lmb and manage the array size with the element 'max' of struct lmb_region; their are still allocated in stack. When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in struct lmb_region to allow compiler optimization. Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in bootm when the number of reserved regions (not adjacent) is reached: + 1 region for relocated U-Boot + 1 region for initrd + 1 region for relocated linux device tree + reserved memory regions present in Linux device tree. The current limit of 8 regions is reached with only 5 reserved regions in DT. see Linux kernel commit bf23c51f1f49 ("memblock: Move memblock arrays to static storage in memblock.c and make their size a variable") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22test: lmb: add test for overflow protection in lmb_add_regionPatrick Delaunay1-0/+64
Add test for max number of memory regions and in reserved regions. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: correct size of the regions arrayPatrick Delaunay1-1/+1
As in lmb_region, cnt < max and in the lmb library use region[i] only with i in 0...cnt, this region array size can be reduced by 1 element without overflow. This patch allows to reduce the struct lmb size. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: move MAX_LMB_REGIONS value in KconfigPatrick Delaunay3-6/+12
Move MAX_LMB_REGIONS value in Kconfig, the max number of the regions in lmb library. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: add a max parameter in the struct lmb_regionPatrick Delaunay2-1/+5
Add a max parameter in lmb_region struct to handle test in lmb_add_region without using the MAX_LMB_REGIONS define. This patch allows to modify these size independently for memory of reserved regions in the next patches. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: remove lmb_region.sizePatrick Delaunay2-7/+0
Remove the unused field size of struct lmb_region as it is initialized to 0 and never used after in lmb library. See Linux kernel commit 4734b594c6ca ("memblock: Remove memblock_type.size and add memblock.memory_size instead") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: move CONFIG_LMB in KconfigPatrick Delaunay18-31/+8
Migrate CONFIG_LMB in Kconfig. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
generated by cgit v1.1 at 2024-07-10 23:27:28 +0000