rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-07-03	test: correct time stamps for UEFI authentication	Heinrich Schuchardt	1	-8/+8
2020-07-03	test/py: efi_secboot: fix test case 1g of test_authvar	AKASHI Takahiro	1	-6/+6
2020-07-03	test/py: efi_secboot: remove all "re.search"	AKASHI Takahiro	3	-74/+65
2020-07-03	efi_loader: image_loader: replace debug to EFI_PRINT	AKASHI Takahiro	1	-31/+33
2020-07-03	efi_loader: variable: replace debug to EFI_PRINT	AKASHI Takahiro	1	-13/+14
2020-07-03	efi_loader: signature: replace debug to EFI_PRINT	AKASHI Takahiro	1	-59/+62
2020-07-03	Revert "test: stabilize test_efi_secboot"	AKASHI Takahiro	3	-9/+9
2020-07-03	efi_loader: change efi objects initialization order	AKASHI Takahiro	1	-3/+4
2020-07-03	riscv: use log functions in fdt_fixup	Heinrich Schuchardt	1	-6/+8
2020-07-03	riscv: sifive: fu540: enable all cache ways from U-Boot proper	Pragnesh Patel	5	-1/+81
2020-07-03	riscv: Use optimized version of fdtdec_get_addr_size_no_parent	Atish Patra	1	-3/+3
2020-07-03	riscv: Do not return error if reserved node already exists	Atish Patra	1	-1/+1
2020-07-03	doc: qemu-riscv: Update QEMU run command	Bin Meng	1	-5/+5
2020-07-03	riscv: sifive: fu540: Add gpio-restart support	Bin Meng	1	-0/+2
2020-07-03	riscv: Do not build reset.c if SYSRESET is on	Bin Meng	1	-0/+2
2020-07-02	Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv ...	Tom Rini	72	-172/+3723
2020-07-02	riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE	Bin Meng	2	-1/+3
2020-07-02	riscv: Expand the DT size before copy reserved memory node	Bin Meng	1	-0/+12
2020-07-02	riscv: Avoid the reserved memory fixup if src and dst point to the same place	Bin Meng	1	-4/+8
2020-07-02	riscv: fu540: dts: Correct reg size of otp and dmc nodes	Bin Meng	1	-2/+2
2020-07-02	riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node	Bin Meng	1	-1/+1
2020-07-02	riscv: sbi: Add newline to error message	Sean Anderson	1	-1/+1
2020-07-01	checkpatch.pl: Fully re-sync with v5.7	Tom Rini	1	-106/+302
2020-07-01	kconfig: show compiler version text in the top comment	Tom Rini	1	-0/+2
2020-07-01	socfpga: Enable optimized inlining on stratix10	Tom Rini	1	-0/+2
2020-07-01	compilers: Introduce options for forcing inlining on SPL/TPL	Tom Rini	2	-2/+22
2020-07-01	compiler_types.h: Re-introduce CONFIG_OPTIMIZE_INLINING for U-Boot	Tom Rini	2	-1/+19
2020-07-01	compiler.h: sync include/linux/compiler.h with Linux 5.7-rc5	Tom Rini	8	-560/+777
2020-07-01	pci: rockchip: Mark inline functions as static inline	Tom Rini	1	-3/+2
2020-07-01	socfpga: Mark socfpga_fpga_add() as static inline in the non-FPGA case	Tom Rini	1	-1/+1
2020-07-01	x86: Convert from ACCESS_ONCE to READ/WRITE_ONCE	Tom Rini	1	-1/+1
2020-07-01	tegra: Convert from ACCESS_ONCE to READ/WRITE_ONCE	Tom Rini	1	-10/+10
2020-07-01	Don't start ad-hoc games with -Wno-maybe-initialized	Tom Rini	1	-0/+3
2020-07-01	kconfig: Add scripts/Kconfig.include from v4.19	Tom Rini	2	-0/+32
2020-07-01	kconfiglib: Update to the 14.1.0 release	Tom Rini	1	-242/+372
2020-07-01	Remove CROSS_COMPILE default from arch/*/config.mk	Tom Rini	8	-27/+0
2020-07-01	riscv: cpu: check and append L1 cache to cpu features	Sagar Shrikant Kadam	1	-0/+12
2020-07-01	riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit	Sagar Shrikant Kadam	1	-4/+1
2020-07-01	uclass: cpu: fix to display proper CPU features	Sagar Shrikant Kadam	1	-0/+3
2020-07-01	riscv: dts: hifive-unleashed-a00: add cpu aliases	Sagar Shrikant Kadam	1	-0/+4
2020-07-01	riscv: Add Sipeed Maix support	Sean Anderson	7	-0/+140
2020-07-01	doc: riscv: Add documentation for Sipeed Maix Bit	Sean Anderson	3	-0/+308
2020-07-01	riscv: Add device tree for K210 and Sipeed Maix BitM	Sean Anderson	4	-0/+680
2020-07-01	riscv: Enable cpu clock if it is present	Sean Anderson	1	-0/+20
2020-07-01	riscv: Try to get cpu frequency from a "clocks" node if it exists	Sean Anderson	1	-1/+18
2020-07-01	riscv: Allow use of reset drivers	Sean Anderson	1	-0/+2
2020-07-01	riscv: Add option to support RISC-V privileged spec 1.9	Sean Anderson	3	-0/+59
2020-07-01	riscv: Clean up IPI initialization code	Sean Anderson	7	-86/+89
2020-07-01	riscv: Clear pending interrupts before enabling IPIs	Sean Anderson	1	-0/+2
2020-07-01	riscv: Add headers for asm/global_data.h	Sean Anderson	1	-0/+2