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2020-10-27xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()Michal Simek1-1/+1
Fix hex format from 0x%0X to 0x%0x to show correct numbers. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Check return value from xilinx_pm_request()Michal Simek1-1/+5
xilinx_pm_request() can failed that's why also check return value. Fixes: 050f10f103cd ("xilinx: zynqmp: remove chip_id function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: board: Add FRU decoder supportMichal Simek1-1/+82
FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: cmd: Add basic fru format generatorMichal Simek3-2/+136
Idea is to have something what can be used for board bringup from generic board perspective. There is a violation compare to spec that FRU ID is ASCII8 instead of binary format but this is really for having something to pass boot and boot to OS which has better generating options. Also time should be filled properly. For example: fru board_gen 1000 XILINX versal-x-prc-01-revA serialX partX There is also support for revision field which is Xilinx specific field. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: cmd: Add support for FRU commandsSiva Durga Prasad Paladugu6-0/+414
This patch adds support for fru commands "fru capture" and "fru display". The fru capture parses the FRU table present at an address and stores in a structure for later use. The fru display prints the content of captured structured in a readable format. As of now, it supports only common header and board area of FRU. Also, it supports only English language code and ASCII8/BINARY formats. fru_data variable is placed to data section because fru parser can be called very early before bss is initialized. And also information needs to be shared that's why it is exported via header. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: common: Add Makefile to common folderMichal Simek4-3/+7
There is no need to reference files in common folder back. Simply adding Makefile to this folder does the job because this "common" location is already wired in main Makefile. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: Enable i2c DM by defaultMichal Simek1-0/+1
Microblaze has been converted fully to DM that's why enabled DM for I2C too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: common: Protect board_late_init_xilinx()Michal Simek1-0/+2
Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board KconfigMichal Simek5-10/+23
There is no reason to have ZYNQ specific Kconfig macro in generic location to be visible for all other SoCs. That's why move it to Xilinx common location to be visible only for us. Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to disable it or enable. This has connection to code which is reading the whole content of i2c and also work with the rest of date not just with MAC address. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27spl: fdt: Record load/entry fit-images entries in 64bit formatMichal Simek2-12/+8
The commit 9f45aeb93727 ("spl: fit: implement fdt_record_loadable") which introduced fdt_record_loadable() state there spl_fit.c is not 64bit safe. Based on my tests on Xilinx ZynqMP zcu102 platform there shouldn't be a problem to record these addresses in 64bit format. The patch adds support for systems which need to load images above 4GB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27spl: Use standard FIT entriesMichal Simek5-11/+100
SPL is creating fit-images DT node when loadables are recorded in selected configuration. Entries which are created are using entry-point and load-addr property names. But there shouldn't be a need to use non standard properties because entry/load are standard FIT properties. But using standard FIT properties enables option to use generic FIT functions to descrease SPL size. Here is result for ZynqMP virt configuration: xilinx_zynqmp_virt: spl/u-boot-spl:all -82 spl/u-boot-spl:rodata -22 spl/u-boot-spl:text -60 The patch causes change in run time fit image record. Before: fit-images { uboot { os = "u-boot"; type = "firmware"; size = <0xfd520>; entry-point = <0x8000000>; load-addr = <0x8000000>; }; }; After: fit-images { uboot { os = "u-boot"; type = "firmware"; size = <0xfd520>; entry = <0x8000000>; load = <0x8000000>; }; }; Replacing calling fdt_getprop_u32() by fit_image_get_entry/load() also enables support for reading entry/load properties recorded in 64bit format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27spi: zynq_qspi: Use clk subsystem to get reference qspi clkT Karthik Reddy1-8/+28
Remove fixed reference clk used by plat->frequency and use clk subsystem to get reference clk. As per spi dt bindings "spi-max-frequency" property should be used by the slave devices. This property is read by spi-uclass driver for the slave device. So avoid reading above property from the platform driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27spi: zynq_spi: Use clk subsystem to get reference spi clkT Karthik Reddy1-7/+28
Remove fixed reference clk used by plat->frequency and use clk subsystem to get reference clk. As per spi dt bindings "spi-max-frequency" property should be used by the slave devices. This property is read by spi-uclass driver for the slave device. So avoid reading above property from the platform driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27serial: pl01x: Add error value checkingMichal Simek1-1/+12
There also a need to check return values to make sure that clocks were enabled and setup properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27xilinx: board: Add support for additional card detectionMichal Simek1-24/+61
The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: board: Read the whole eeprom not just offsetMichal Simek4-1/+212
Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27dm: core: Add support for getting node from aliasesMichal Simek3-0/+66
Add support for getting a node/property from aliases. The similar functionality is provided for chosen node and this implemenatation is copy of it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27spi: xilinx_spi: remove unused local variableT Karthik Reddy1-3/+3
Remove unused variable 'count' which is causing warning while compilation. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27dt-bindings: arm64: versal: Add clk and power headersMichal Simek2-0/+165
Add power and reset headers to be sources by Versal dtses. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for saving sha3 key to different addressMichal Simek1-7/+18
By default 48B sha3 hash value is written to srcaddr which is not the best solution in case of that you want to use data for other operations. That's why add key_addr optional parameters which enables to write 48B sha3 hash value to specified address. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2020-10-27arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy2-0/+68
This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for RSA commandT Karthik Reddy2-0/+76
This patch adds support for RSA command, performs RSA encrypt & RSA decrypt on data blob of key size. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for encryption and decryption on data blobSiva Durga Prasad Paladugu2-1/+82
This patch adds support for encryption and decryption on a given data blob using different key sources such as userkey(KUP), device key and PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has been introduced. Command: zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n" Encrypts or decrypts blob of data at src address and puts it\n" back to dstaddr using key and iv at keyaddr and ivaddr\n" respectively. keysrc values specifies from which source key\n" has to be used, it can be User/Device/PUF key. A value of 0\n" for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n" aesop value would specify the operationwhich can be 0 for\n" decrypt and 1 for encrypt(1) operation\n"; Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Get rid of iommus/power-domains properties for SPL DTMichal Simek1-0/+1
SPL DT contains only nodes which are contain u-boot,dm-pre-reloc property. iommu node is not this case that's why when DT is read DTC reports some warnings. $ dtc -I dtb -O dts dts/dt-spl.dtb >/dev/null <stdout>: Warning (iommus_property): /amba/spi@ff0f0000:iommus: Could not get phandle node for (cell 0) <stdout>: Warning (iommus_property): /amba/mmc@ff160000:iommus: Could not get phandle node for (cell 0) <stdout>: Warning (iommus_property): /amba/mmc@ff170000:iommus: Could not get phandle node for (cell 0) SPL also has an option to remove some DT properties which are useless for SPL to make DT even smaller. Default DT properties are pinctrl-0 pinctrl-names interrupt-parent interrupts which are already removed. The patch extends this list with iommus to get rid of above warnings. Also power-domains unused properties can be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Enable cache commandMichal Simek1-0/+1
Sometimes it is very useful to be able disable/enable cache that's why enable commands for it by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Enable FPGA loading from SPLMichal Simek1-0/+1
fpga bitstream needs to be listed in config node in FIT image. Only tested option is bitstream in BIN format. Enabling this feature increase code size by almost 4k. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Get rid of simple_itoa and replace it by snprintfMichal Simek1-2/+5
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf is normally used by SPL that's code which uses simple_itoa() has missing reference. That's why refactor code by using on snprintf() instead of strncpy()/strncat() combination. This change also descrease code size by saving 24B based on buildman. aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0 xilinx_zynqmp_virt: all -22 rodata +2 text -24 u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24) function old new delta board_init 520 496 -24 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27mailbox: zynqmp: Extend timeout for getting observation bitMichal Simek1-1/+1
In case of fpga loading (which can be huge) 100ms is not enough. That's why extend timeout 10 times to wait maximum 1s to get ACK back. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27firmware: zynqmp: Swap addr_hi/low when PM_FPGA_LOAD is calledMichal Simek1-0/+8
Don't know reason but in regular flow addr_hi/low are swapped in ATF. It means when fpga load is done from EL3 there is a need to swap it for PMUFW to load bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27config: versal: Update mini u-boot timer clock to 100MhzAshok Reddy Soma4-4/+4
Mini u-boot timer clock is not updated when u-boot is migrated from emulator to silicon. Due to this slower clock of 2.72Mhz, delay() functions are not working accurately. Update CONFIG_COUNTER_FREQUENCY to 100Mhz. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: versal: Update mini u-boot eMMC node parametersAshok Reddy Soma2-6/+12
Mini u-boot eMMC dt parameters are not in sync with full u-boot dt. Frequency for eMMC is fixed to 25Mhz. Due to this, mmc multi-block write commands are failing. Increase frequency to 200Mhz to fix this issue. Add bus-width = <8>, non-removable and disable-wp properties to the node as this is eMMC. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: Add support for distro bootT Karthik Reddy2-7/+55
Add distro boot support for microblaze and enable jtag, qspi, dhcp, pxe boot targets for distro boot. Enable DISTRO_DEFAULTS config in microblaze defconfig and also enable support for spi xilinx driver & spi vendors to access spi flash by distro boot. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: Setup distro boot env variables at run timeT Karthik Reddy2-0/+19
Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: board: Check return value whlie saving env variablesT Karthik Reddy1-3/+7
Check and print warning if run time env variables are not saved. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: trivial code fixesT Karthik Reddy1-9/+10
Set proper indentation for env variables in microblaze header file. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27microblaze: Enable spi for microblazeT Karthik Reddy1-0/+3
Enable SPI drivers and driver model for microblaze. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27spi: xilinx_spi: Remove unused variableMichal Simek1-1/+1
Remove unused variable: drivers/spi/xilinx_spi.c: In function 'xilinx_spi_xfer': drivers/spi/xilinx_spi.c:254:18: warning: unused variable 'timeout' [-Wunused-variable] 254 | u32 reg, count, timeout; | ^~~~~~~ Fixes: 0c0de58f7b30 ("spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Enable EMMC bootMichal Simek1-0/+1
Enable EMMC boot commands to be able to change EMMC setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add missing support for 9cg versionMichal Simek1-1/+1
9cg version was supported before code refactoring. The patch is adding it back. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27ARM: zynq: Add Z-turn board V5Alexandre GRIVEAUX6-109/+413
Adding Z-turn board V5 to resolve the change between: "Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035 "Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031 At this time the S25FL128SAGNFI003 doesn't work because of bug: *** Warning - spi_flash_probe_bus_cs() failed, using default environment zynq-zturn was checked on V5 board, same error. Maybe Z-turn board have the same problem (board with W25Q128BVFIG). Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27doc: board: xilinx: Add documentation for ZynqMP R5Michal Simek2-0/+138
Add missing documentation for Xilinx ZynqMP R5 configuration with steps how to run it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27doc: board: xilinx: Add documentation for ZynqMPMichal Simek2-0/+116
Add missing documentation for Xilinx ZynqMP configuration with steps how to configure it and run it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27doc: board: xilinx: Update links to DT binding docsMichal Simek1-3/+13
Several drivers have been added without updating documentation. And also some dt bindings have been moved to yaml. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27doc: board: xilinx: zynq.rst: Update zynq documentationMichal Simek1-6/+1
- Correct location of BSP code - Remove TODO which is done already Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27MAINTAINERS: Record documentation for Xilinx platformsMichal Simek1-0/+1
Add fragment to cover documenation for Xilinx platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27microblaze: start.S: Use board_init_f_alloc/init in early initOvidiu Panait2-26/+23
Implement early init by calling generic board_init_f_alloc_reserve and board_init_f_init_reserve functions: * drop SYS_MALLOC_F_LEN related code, as allocation and gd->malloc_base assignment are taken care of by the generic functions * drop _gd logic Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2020-10-27microblaze: start.S: Factor out exception setup code to __setup_exceptionsOvidiu Panait1-94/+103
Currently, the exceptions setup code is duplicated in pre-relocation and post-relocation init. Factor out this code to __setup_exceptions asm routine to get rid of the duplication. __setup_exceptions is called with a relocation offset parameter (r5) which is set to zero for pre-reloc init and gd->reloc_off for post-reloc exception setup. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-26Merge tag 'video-for-2021.01-rc1' of ↵WIP/26Oct2020Tom Rini50-74/+75
https://gitlab.denx.de/u-boot/custodians/u-boot-video - disable CONFIG_VIDEO to remove DM conversion warnings for boards: at91sam9, eb_cpu5282, ls1021aqds, ls1021atwr, mx23evk, mx6sxsabresd, mx7dsabresd, nokia_rx51, picosam9g45, sansa_fuze_plus, xfi3
2020-10-26nokia_rx51: disable obsolete VIDEO configAnatolij Gustschin2-2/+2
Disable VIDEO config to fix DM_VIDEO conversion deadline warning. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-10-26eb_cpu5282: fix CONFIG_DM_VIDEO build warningsAnatolij Gustschin7-14/+15
Remove CONFIG_VIDEO dependency to fix board removal warnings. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Jens Scharsig <esw@bus-elektronik.de>
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