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2021-02-08configs: ls1028ardb: enable CMD_GPIOBiwen Li2-0/+2
Enable CMD_GPIO for board ls1028ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1028aqds: enable CMD_GPIOBiwen Li3-0/+3
Enable CMD_GPIO for board ls1028aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021atwr: enable CMD_GPIOBiwen Li7-0/+7
Enable CMD_GPIO for ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021aqds: enable CMD_GPIOBiwen Li9-0/+9
Enable CMD_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012ardb: enable CMD_GPIOBiwen Li4-0/+4
Enable CMD_GPIO for ls1012ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012afrwy: enable CMD_GPIOBiwen Li4-0/+4
Enable CMD_GPIO for ls1012afrwy Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1046a: enable MPC8XXX_GPIOBiwen Li1-0/+7
Enable MPC8XXX_GPIO for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: lx2160a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls208xa: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1088a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1028a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1043a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls208xa: add gpio nodeBiwen Li1-1/+45
Add gpio node for SoC LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1088a: add gpio nodeBiwen Li1-1/+46
Add gpio node for SoC LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1046a: add gpio nodeBiwen Li1-0/+40
Add gpio node for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1043a: add gpio nodeBiwen Li1-0/+40
Add gpio node for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1028a: add gpio nodeBiwen Li1-0/+33
Add gpio node for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1012a: add gpio nodeBiwen Li1-0/+20
Add gpio node for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm: dts: ls1021a: add gpio nodeBiwen Li1-0/+40
Add gpio node for SoC LS1021A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08gpio: mpc8xxx_gpio: Fix for litte endianBiwen Li4-39/+47
Update gpio driver to use same logic for big-endian and little-endian Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: T1042: Drop the CONFIG_VIDEOHou Zhiqiang10-10/+0
Drop the CONFIG_VIDEO to fix the following build warning. ===================== WARNING ====================== This board does not use CONFIG_DM_VIDEO Please update the board to use CONFIG_DM_VIDEO before the v2019.07 release. UPD include/generated/dt.h Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. UPD include/generated/timestamp_autogenerated.h ==================================================== Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08mpc8xxx: fsl_pamu: Update data type in config_pamuPriyanka Jain1-1/+1
Update data type of '1' to '1ull' in below assignment size = 1ull << sizebit; to fix incorrect assignment issue. e.g: when sizebit was 31, 0x80000000 got sign extended to 0xffffffff_80000000 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reported-by: Dean Saridakis <dean.saridakis@baesystems.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv7: ls102xa: Enable I-Cache to speed up the boot timeHou Zhiqiang1-0/+2
Enable the I-Cache to speed up the boot time, especailly for the NOR boot, currently it takes about 15 seconds from power up to the U-Boot prompt, and with the I-Cache enabled it only takes around 2.5 seconds. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board/km: move km i2c deblock declarations to a km/common.hAleksandar Gerasimovski3-10/+5
Cleanup, move the declarations to keymile/common.h instead declaring them per-board config.h Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08pci: kconfig: layerscape: Change LX2162A PCIe node compatible stringHou Zhiqiang1-2/+3
LX2162A is not like LX2160A which has different PCIe controller in rev1 and rev2 silicon. It supports only one configuration of PCIe controller, which is same as LS2088A. So update PCIe compatible string same as LS2088A. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08pci: layerscape: Remove the shadow SVR definitionsHou Zhiqiang4-42/+58
This patch moves the SVR definitions to a new svr.h for Layerscape armv7 and armv8 platforms respectively, so that the PCIe driver can reuse them. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08spi: fsl_qspi: apply the same settings for LS1088 as LS208xMathew McBride1-9/+1
The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL workaround as the LS208x and also has a 64 byte TX buffer. With the previous settings SPI-NAND reads over AHB were corrupted. Fixes: 91afd36f3802 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API") Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08spi: fsl_qspi: Ensure width is respected in spi-mem operationsMathew McBride1-1/+1
Adapted from kernel commit b0177aca7aea From: Michael Walle <michael@walle.cc> Make use of a core helper to ensure the desired width is respected when calling spi-mem operators. Otherwise only the SPI controller will be matched with the flash chip, which might lead to wrong widths. Also consider the width specified by the user in the device tree. Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller") Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot] Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08mem: spi-mem: add declaration for spi_mem_default_supports_opMathew McBride1-0/+3
spi_mem_default_supports_op is used internally by controller drivers to verify operation semantics are correct. It is used internally inside spi-mem but has not (in U-Boot) been declared in spi-mem.h for external use. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08PowerPC: keymile: Add support for kmcent2 boardNiel Fourie14-0/+1320
Add basic support for the Hitachi Power Grids kmcent2 board, based on the NXP QorIQ T1040 SoC. Signed-off-by: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> [Fixed blank line at EOF errors] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08keymile: common: update to set_env_hex(), fix "pram" radixNiel Fourie1-16/+6
Replace instances of sprintf()/set_env() for setting hexadecimal values with set_env_hex(). In set_km_env() the "pram" variable was set to an hexadecimal value, while initr_mem() expects an unsigned decimal, so use set_env_ulong() instead. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10Niel Fourie17-0/+1580
Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board/km/common: fix pnvramaddr and varaddrAleksandar Gerasimovski1-3/+4
Take into account SDRAM_BASE address when calculating pnvramaddr and varaddr offsets. Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets where calculated correctly, this fix is for the upcoming designs that have SDRAM_BASE different then zero. Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08keymile: common: qrio: print QRIO id and revision numberAleksandar Gerasimovski2-0/+13
Add show_qrio function to print chip id and revision information. There are already multiple QRIO chip versions available and the upcoming designs may want to show used version. Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: keymile: common: fix qrio compilation for armAleksandar Gerasimovski1-3/+4
This patch is fixing qrio driver compilation for ARM architecture: - It includes asm/io.h for in_/out_ access - It use correct names for set/clear_bits as defined in linux/bitops.h Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bitWasim Khan1-2/+5
Multiple LX2(LX2160A/LX2162A SoC) personality variants exists based on CAN-FD and security bit in SVR. Currenly SVR_SOC_VER mask only security bit. Update SVR_SOC_VER to mask CAN_FD and security bit for LX2 products. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv8: ls1028a: fix stream id allocationNipun Gupta1-2/+2
When A-050382 errata is enabled, ECAM and EDMA have conflicting stream id 40. This patch fixes the same. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: sl28: add SATA supportMichael Walle7-11/+47
Enable SATA support. Although not supported by the usual SATA pins on the SMARC baseboard connector, SATA mode is supported on a PCIe lane. This way one can use a mSATA card in a Mini PCI slot. We need to invert the received data because in this mode the polarity of the SerDes lane is swapped. Provide a fixup in board_early_init_f() for the SPL. board_early_init_f() is then not common between SPL and u-boot proper anymore, thus common.c is removed, as it just contained said function. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: sl28: add network variant 2 supportMichael Walle5-3/+60
Although this variant has two external network ports, they are not (yet) supported by the bootloader because they are connected via an internal network switch. Otherwise its the same as the other variants. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: sl28: add network variant 1 supportMichael Walle5-3/+98
This variant has one network port connected via RGMII and doesn't have any TSN capabilities out-of-the-box. Instead it has all four SerDes lanes available for customer use. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: sl28: move ethernet aliases to variant specific dtsiMichael Walle3-2/+13
The variants differ in their network configuration. Move the first two network aliases to the proper variant device tree includes. This is in prepartion for variant 1 and 2 support which has a different network port mapping. The network aliases for the two internal ports will stay in the common dtsi because they are present on all board variants. This might leave a hole if there is no ethernet1 alias. This is intended. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08net: eqos: Reduce the MDIO wait timeYe Li1-1/+1
Current MDIO wait time is too long, which introduce long delay when PHY negotiation register checking. Reduce it to 10us Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fugang Duan <Fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv8: dts: fsl-lx2162a: add dspi node into qds dtsZhao Qiang1-0/+105
Add dspi node into lx2162aqds device tree Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv8: lx2162aqds: disable non existing pcie controllersWasim Khan1-12/+10
disable non existing pcie controllers on lx2162aqds Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1088aqds: add COMMON_ENV to fix distrobootBiwen Li1-0/+12
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r, kernel_addr_r, fdt_addr_r, load_addr) to fix a bug that failed to boot to ubuntu Failed log as follows, ## Executing script at 80000000 load - load binary file from a filesystemUsage: load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]] - Load binary file filename from partition part on device type interface instance dev to address addr in memory. bytes gives the size to load in bytes. If bytes is 0 or omitted, the file is read until the end. pos gives the file byte position to start reading from. If pos is 0 or omitted, the file is read from the start. ... Bad Linux ARM64 Image magic! SCRIPT FAILED: continuing... Signed-off-by: Biwen Li <biwen.li@nxp.com> [Updated description] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08net: memac_phy: add a timeout to MDIO operationsIoana Ciornei1-18/+58
We have encountered circumstances when a board design does not include pull-up resistors on the external MDIO buses which are not used. This leads to the MDIO data line not being pulled-up, thus the MDIO controller will always see the line as busy. Without a timeout in the MDIO bus driver, the execution is stuck in an infinite loop when any access is initiated on that external bus. Add a timeout in the driver so that we are protected in this circumstance. This is similar to what is being done in the Linux xgmac_mdio driver. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08board: kontron: disable flash unlock allMichael Walle1-0/+1
Although the status register is protected by the hardware write protection, there is a hardware jumper to disable that hardware write protection. Thus if a user would set this jumper any u-boot start would disable the write protection altogether. Circumvent that by not disabling the write protection in the first place. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.1 at 2024-07-30 21:01:08 +0000