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2023-10-24Merge tag 'u-boot-rockchip-20231024' of ↵WIP/24Oct2023Tom Rini57-295/+5472
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add Board: rk3588 NanoPC-T6, Orange Pi 5, Orange Pi 5 Plus; - clk driver fix for rk3568 and rk3588; - rkmtd cmd support for rockchip nand device; - dts update and sync from linux;
2023-10-24Merge tag 'u-boot-imx-20231024' of ↵Tom Rini17-29/+184
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20231024 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211 - Fixes for MC2432 Eeprom - i.MX93 ADC - Secondary boot mode on i.MX8M
2023-10-24rockchip: configs: sandbox: enable rkmtd commandJohan Jonker2-0/+2
Enable rkmtd command for testing with sandbox_defconfig and sandbox64_defconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24rockchip: doc: add rkmtd.rstJohan Jonker2-0/+106
Add documention for Rockchip rkmtd virtual block device. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24rockchip: test: dm: add rkmtd testJohan Jonker2-0/+201
Add Rockchip rkmtd test: Create/attach/detach RKMTD device. Send/read data with Rockchip boot block header. Test that reusing the same label should work. Basic test of 'rkmtd' commands. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24rockchip: cmd: add rkmtd commandJohan Jonker3-0/+213
The command rkmtd creates a virtual block device to transfer Rockchip boot block data to and from NAND with block orientated tools like "ums" and "rockusb". It uses the Rockchip MTD driver to scan for boot blocks and copies data from the first block in a GPT formated virtual disk. Data must be written in U-boot "idbloader.img" format and start at partition "loader1" offset 64. The data header is parsed for length and offset. When the last sector is received it erases up to 5 erase blocks on NAND and writes bootblocks in a pattern depending on the NAND ID. Data is then verified. When a block turns out bad the block header is discarded. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24rockchip: block: blk-uclass: add bounce buffer flag to blk_descJohan Jonker3-2/+7
Currently bounce buffer support is enabled for all block devices when available. Add a flag to blk_desc to enable only on demand. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: block: add rkmtd class and driversJohan Jonker4-0/+1352
Add rkmtd class and drivers to create a virtual block device to transfer Rockchip boot block data to and from NAND with block orientated tools like "ums" and "rockusb". Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: dm: prepare rkmtd UCLASSJohan Jonker3-0/+6
Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks in combination with existing userspace tools and rockusb command. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN optionJohan Jonker2-0/+12
On Rockchip SoCs the first boot stages are written on NAND with help of manufacturer software that uses a different format then the MTD framework. Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option to be able to pass the driver probe function and to let the original data unchanged. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24board: rockchip: Add Xunlong Orange Pi 5 PlusJonas Karlman6-0/+989
Xunlong Orange Pi 5 Plus is a single-board computer based on the Rockchip RK3588 SoC. The board provides abundant interfaces, including two HDMI output ports, one HDMI input port, two 2.5G Ethernet ports, M.2 M-Key slot, M.2 E-Key slot, two USB 3.0, two USB 2.0, and two Type-C. Features tested on a Orange Pi 5 Plus 4GB v1.2: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe - USB 2.0 host - Ethernet Device tree is imported from linux v6.7-rockchip-dts64-1 tag. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24board: rockchip: Add Xunlong Orange Pi 5Jonas Karlman6-0/+795
Xunlong Orange Pi 5 is a single-board computer based on the Rockchip RK3588S SoC. The board provides abundant interfaces, HDMI output, GPIO interface, M.2 PCIe2.0, Type-C, Gigabit LAN port, 2*USB2.0, 1*USB3.0, etc. Features tested on a Orange Pi 5 4GB v1.2: - SD-card boot - SPI Flash boot - PCIe/NVMe - USB 2.0 host - Ethernet Device tree is imported from linux v6.7-rockchip-dts64-1 tag. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24mtd: spi-nor: Add support for XMC XM25QU128CRicardo Pardini1-0/+1
Add support for XMC XM25QU128C (128M-bit) Serial Flash memory. Used on the Xunlong Orange Pi 3B, 5 and 5 Plus boards. Datasheet: https://www.xmcwh.com/uploads/806/XM25QU128C_Ver2.0.pdf Signed-off-by: Ricardo Pardini <ricardo@pardini.net> [jonas@kwiboo.se: update commit message] Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: rk3588-rock-5b: Sync USB3 nodes from mainline linux patchesJonas Karlman4-157/+99
The device tree for rk3588 and rock-5b contain usb3 nodes that have deviated too much from current state of submitted mainline linux usb3 patches, see [1]. Sync usb3 related nodes from latest patches and collaboras rk3588 tree so that dwc3-generic driver can be updated to include support for the rockchip,rk3588-dwc3 compatible in the future, use rockchip,rk3568-dwc3 compatible until final node is merged in linux maintainer tree. [1] https://lore.kernel.org/lkml/20231009172129.43568-1-sebastian.reichel@collabora.com/ Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: rk3588-rock-5b: Enable support for PCIe SATA cardsJonas Karlman1-1/+5
Enable support for PCIe SATA cards and the on-board SATA controller. This also revert use of CONFIG_PCI_INIT_R in order to speed up boot from eMMC or SD-cards. Standard boot will initialize pci after faster boot media have been enumerated. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Christopher Obbard <chris.obbard@collabora.com> Tested-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: rk3588-rock-5a: Enable support for USB 2.0 portsJonas Karlman1-1/+15
Enable Kconfig options for the two USB 2.0 ports and bottom USB 3.0 port on ROCK 5 Model A. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24rockchip: rk3588: Sync device tree from v6.7-rockchip-dts64-1 tagJonas Karlman9-85/+350
Sync rk3588 device tree from v6.7-rockchip-dts64-1 tag. Adds PCIe, button and led nodes to rk3588-evb1-v10 and rk3588-rock-5b boards. Also remove includes from u-boot.dtsi-files that is no longer needed. Linux commits: 42145b7a8235 ("arm64: dts: rockchip: add PCIe network controller to rock-5b") 199cbd5f195a ("arm64: dts: rockchip: add PCIe for M.2 M-key to rock-5b") da447ec38780 ("arm64: dts: rockchip: add PCIe for M.2 E-Key to rock-5b") 86a2024d95e2 ("arm64: dts: rockchip: add PCIe2 network controller to rk3588-evb1") 46bb398ea1d8 ("arm64: dts: rockchip: add PCIe3 bus to rk3588-evb1") 1c9a53ff7ece ("arm64: dts: rockchip: Add sdio node to rock-5b") 3eaf2abd11aa ("arm64: dts: rockchip: Add sfc node to rk3588s") bf012368bb0a ("arm64: dts: rockchip: Add I2S2 M0 pin definitions to rk3588s") 3d77a3e51b0f ("arm64: dts: rockchip: Add UART9 M0 pin definitions to rk3588s") 0002c377e862 ("arm64: dts: rockchip: Remove duplicate regulator vcc3v3_wf from rock-5b") a6169ab36923 ("arm64: dts: rockchip: Enable UART6 on rock-5b") dd6dc0c4c126 ("arm64: dts: rockchip: Add AV1 decoder node to rk3588s") afa933c208e5 ("arm64: dts: rockchip: add ADC buttons to rk3588-evb1") 7952cbbda301 ("arm64: dts: rockchip: add status LED to rock-5b") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24dt-bindings: leds: import common led bindings from linux v6.5Tom Fitzhenry1-1/+6
This brings in more colours, e.g. ORANGE needed for the QuartzPro64 DT. Linux commits: 472d7b9e8141 ("dt-bindings: leds: Expand LED_COLOR_ID definitions") Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23Prepare v2024.01-rc1v2024.01-rc1Tom Rini2-7/+6
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-23configs: Resync with savedefconfigTom Rini23-36/+28
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-23Merge branch '2023-10-23-bootstd-fixes-and-improvements'Tom Rini7-15/+192
- Fix a few bootstd issues that have been reported and ahci support to bootstd
2023-10-23bootstd: sata: bootdev scanning for ahci sata with no drive attachedWIP/2023-10-23-bootstd-fixes-and-improvementsTony Dinh1-0/+6
It's normal to have no SATA drive attached to the controller, so return a successful status when there is no block device found after probing. Note: this patch depends on the previous patch https://patchwork.ozlabs.org/project/uboot/patch/20230917230649.30357-1-mibodhi@gmail.com/ Resend the right patch. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-23bootstd: sata: Add bootstd support for ahci sataTony Dinh5-5/+113
Add ahci sata bootdev and corresponding hunting function. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-23bootstd: Scan all bootdevs in a boot_targets entry (take 2)Simon Glass3-5/+52
When the boot_targets environment variable is used with the distro-boot scripts, each device is included individually. For example, if there are three mmc devices, then we will have something like: boot_targets="mmc0 mmc1 mmc2" In contrast, standard boot supports specifying just the uclass, i.e.: boot_targets="mmc" The intention is that this should scan all MMC devices, but in fact it currently only scans the first. Update the logic to handle this case, without required BOOTSTD_FULL to be enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Date Huang <tjjh89017@hotmail.com> Reported-by: Vincent Stehlé <vincent.stehle@arm.com> Reported-by: Ivan Ivanov <ivan.ivanov@suse.com> Tested-by: Ivan T.Ivanov <iivanov@suse.de>
2023-10-23bootstd: Correct logic for single uclassSimon Glass2-2/+35
The current logic for "bootflow mmc" is flawed since it checks the uclass of the bootdev instead of its parent, the media device. Correct this and add a test that covers this scenario. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ivan T.Ivanov <iivanov@suse.de>
2023-10-23bootstd: Expand boot-ordering test to include USBSimon Glass1-3/+14
Scan the USB bus as well, so we can check that different uclasses work correctly in boot_targets update the function comment with more detail. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ivan T.Ivanov <iivanov@suse.de>
2023-10-23Revert "bootstd: Scan all bootdevs in a boot_targets entry"Simon Glass3-31/+3
This commit was intended to allow all bootdevs in each boot_targets entry to be scanned. However it causes bad ordering with bootdevs, e.g. scanning Ethernet bootdevs when it should be keeping to mmc. Revert it so we can try another approach. This reverts commit e824d0d0c219bc6da767f13f90c5b00eefe929f0. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ivan T.Ivanov <iivanov@suse.de>
2023-10-23CI: Re-enable maintainer checkTom Rini2-2/+2
At this point we have all of the defconfigs maintained again, so re-enable the check to prevent further regressions. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-23ae350: Update defconfig listTom Rini1-4/+8
Update the list of defconfigs, this was missed with the last pull request of the u-boot-riscv tree. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-23Merge tag 'u-boot-at91-2024.01-b' of ↵Tom Rini16-13/+586
https://source.denx.de/u-boot/custodians/u-boot-at91 Second set of u-boot-at91 features for the 2024.01 cycle This feature set a new board named Conclusive KSTR sama5d27 with some small prerequisites patches.
2023-10-23Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini131-594/+4234
This is mostly about support for the Allwinner R528/T113s SoC, which is reportedly the same die as the Allwinner D1, but with the two Arm Cortex-A7 cores activated instead of the RISC-V one. Using sunxi code outside of arch/arm proved to be difficult, so apart from enabling this Arm SoC, the patches also prepare for more refactoring to get the D1 nicely supported some day: - We get rid of some Kconfig (hard-)coded GPIO pins, responsible for enabling regulators. - The GPIO code is moved out of arch/arm, into drivers/gpio. - Some definitions are moved out of header files under asm/arch. - Some T113s/D1 specific definitions are guarded by a generic Kconfig symbol (CONFIG_SUNXI_GEN_NCAT2). - The DRAM controller initialisation code is located under drivers/ram. - The base SoC .dtsi files are shared (under arch/riscv, as in Linux). Of course there are also the usual new SoC specific patches, like clock and pinmux descriptions, alongside a rework of the pinctrl code, since Allwinner changed the GPIO register layout, for the first time since sunxi's inception. On top of this the PSCI code sees some update, to provide SMP services for R528/T113s boards. Many thanks to Sam for providing this code and staying strong through the review cycles. The final patch enables support for one popular board, I hope to see more DTs and defconfigs contributed in the future! Many thanks to all the various contributors, testers and reviewers, that series was a real team effort!
2023-10-23board: Add support for Conclusive KSTR-SAMA5D27Artur Rojek10-0/+540
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer. Co-developed-by: Jakub Klama <jakub@conclusive.pl> Signed-off-by: Jakub Klama <jakub@conclusive.pl> Co-developed-by: Marcin Jabrzyk <marcin@conclusive.pl> Signed-off-by: Marcin Jabrzyk <marcin@conclusive.pl> Signed-off-by: Artur Rojek <artur@conclusive.pl>
2023-10-23arm: dts: at91: sama5: Add flexcom4 nodeArtur Rojek1-0/+20
Set up flexcom4 for Microchip SAMA5D27 SoC and prepare it for usage in I2C mode. Signed-off-by: Artur Rojek <artur@conclusive.pl>
2023-10-23event: add new EVT_SETTINGS_R eventArtur Rojek3-0/+11
Introduce EVT_SETTINGS_R, triggered post-relocation and before console init. This event gives an option to perform any platform-dependent setup, which needs to take place before show_board_info(). Usage examples include readout of EEPROM stored settings. Signed-off-by: Artur Rojek <artur@conclusive.pl> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-23common: add prototype & rename populate_serial_number()Artur Rojek2-13/+15
Rename populate_serial_number() to a more descriptive serial_read_from_eeprom() and provide the missing function prototype. This is useful for boards that wish to read their serial number from EEPROM at init. Signed-off-by: Artur Rojek <artur@conclusive.pl> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-23Merge tag 'video-20231022' of ↵Tom Rini3-17/+14
https://source.denx.de/u-boot/custodians/u-boot-video - updates for pwm_backlight, simple_panel and tegra20 to keep fixed/gpio regulator counter in balance
2023-10-23Merge tag 'u-boot-amlogic-20231023' of ↵Tom Rini3-8/+355
https://source.denx.de/u-boot/custodians/u-boot-amlogic - sync A1 with Linux and add missing UART compatible - fix USB2 gadget init on G12/SM1 based Boards
2023-10-23rockchip: dts: rk3328: Sync rock64 device tree file from LinuxMatwey V. Kornilov1-12/+2
Sync the rk3328-rock64 dts from v6.6-rc5. See Linux kernel commit for details: 03633c4ef1fb ("arm64: dts: rockchip: fix USB regulator on ROCK64") Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23board: rockchip: add FriendlyElec NanoPC-T6 rk3588 boardJohn Clark11-0/+1192
The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec. There are four variants depending on the DRAM size: 4G/32GB eMMC, 8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR Specifications: CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz) + 4x Cortex-A55 (up to 1.8GHz) GPU: Mali-G610 MP4 VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder, 4K@60fps AV1 decoder, 8K@30fps H.264 and H.265 encoder NPU: 6TOPs, supports INT4/INT8/INT16/FP16 RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz eMMC: 0GB/32GB/64GB/256GB HS400 MicroSD Slot: MicroSD SDR104 PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG) PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host, supports M.2 WiFi and Bluetooth 4G Module: MiniPCIe x1, MicroSIM Card Slot x1 Audio Out: 3.5mm jack for stereo headphone output Audio In: 2.0mm PH-2A connector for analog microphone input Video Input: standard HDMI input port, up to 4Kp60 2x 4-lane MIPI-CSI, compatible with MIPI V1.2 Video Output: 2x standard HDMI output ports compatible with HDMI2.1, HDMI2.0, and HDMI1.4 2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1 USB-A: USB 3.0, Type A USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0 40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs, 8x PWMs, 2x I2Ss, 28x GPIOs Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps Onboard IR receiver: 38KHz carrier frequency RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power RTC IC HYM8563TS 5V Fan connector Working Temperature: 0C to 70C Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) Kernel commits: 893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6") a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support") ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support") Signed-off-by: John Clark <inindev@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23clk: rockchip: rk3588: fix up the frac pll calculationElaine Zhang1-24/+78
rk3588 frac pll: FFVCO = ((m + k / 65536) * FFIN) / p FFOUT = ((m + k / 65536) * FFIN) / (p * 2s) k is the original code, but the K[15:0] is complement code (6'b1000_0000_0000_0000 <= K[15:0] <= 16'b0111_1111_1111_1111), need to be converted. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23clk: rockchip: rk3588: Avoid re-setting the pll rate of dclk_vop's parentElaine Zhang1-7/+17
Optimize setting process. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23clk: rockchip: rk3588: support aclk_top_root set 750MElaine Zhang1-2/+8
aclk_top_root choose a parent clock that does not change. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23clk: rk3588: Add 742.5M parameter for PLLGuochun Huang1-0/+1
For a specific frequency. Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23clk: rockchip: rk3568: support dclk_vop select more parent clksElaine Zhang1-2/+8
For dclk_vop to support more frequencies. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23rockchip: rk3568-radxa-e25: Enable pcie3x1 nodeJonas Karlman2-3/+9
Enable mini PCIe slot, pcie3x1 node, now that the PCIe PHY driver support bifurcation. A pinctrl is assigned for reset-gpios or the device may freeze running pci enum and nothing is connected to the mini PCIe slot. Also drop the AHCI_PCI Kconfig option as this option is not required for a functional M.2 SATA drive slot. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23sunxi: add MangoPi MQ-R board supportAndre Przywara2-0/+17
The MangoPi MQ-R board uses an Allwinner T113s Soc (with 128MB of embedded DRAM), support for which was just added to the code. Since the devicetree was already synced from the latest Linux kernel tree, all we need is a _defconfig file to add support for the board. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22sunxi: psci: implement PSCI on R528Sam Edwards3-2/+57
This patch adds the necessary code to make nonsec booting and PSCI secondary core management functional on the R528/T113. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Tested-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Kevin Amadiva <kevin.amadiva@mec.at> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22sunxi: psci: stop modeling register layout with C structsSam Edwards2-101/+23
Since the sunxi support nowadays generally prefers #defined register offsets instead of modeling register layouts using C structs, now is a good time to do this for PSCI as well. This patch moves away from using the structs `sunxi_cpucfg_reg` and `sunxi_prcm_reg` in psci.c. The former struct and its associated header file existed only to support PSCI code, so also delete them altogether. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22sunxi: psci: refactor register access to separate functionsSam Edwards1-19/+47
This is to prepare for R528, which does not have the typical "CPUCFG" block; it has a "CPUX" block which provides these same functions but is organized differently. Moving the hardware-access bits to their own functions separates the logic from the hardware so we can reuse the same logic. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22sunxi: psci: clean away preprocessor macrosSam Edwards1-60/+43
This patch restructures psci.c to get away from the "many different function definitions switched by #ifdef" paradigm to the preferred style of having a single function definition with `if (IS_ENABLED(...))` to make the optimizer include only the appropriate function bodies instead. There are no functional changes here. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
generated by cgit v1.1 at 2024-09-11 07:48:07 +0000