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2024-03-24Merge tag 'u-boot-imx-next-20240324' of ↵WIP/24Mar2024-nextTom Rini19-59/+1049
https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next - Add ahab_commit command support. - Add USB support for the imx93-phyboard-segin board. - Add i.MX8MP PCIe support. - Fix netboot environment on phycore_imx8mp.
2024-03-24board: phytec: phycore_imx8mp.env fix netboot issuesYannic Moog1-2/+2
The "run netargs" command should come later in the "netboot" command order when using dhcp since it sets the server and client ip addresses. The previous order led to misconfigured kernel boot params and thus kernel panic when serverip was not manually set. Further, following Linux FHS 3.0, change the nfsroot default directory to /srv/nfs. Fixes: 60f64bec414e ("board: phytec: phycore_imx8mp: Add fec support") Signed-off-by: Yannic Moog <y.moog@phytec.de>
2024-03-24configs: imx93-phyboard-segin: Add fastboot supportMathieu Othacehe1-0/+6
Enable the `fastboot` command. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
2024-03-24configs: imx93-phyboard-segin: Add USB supportMathieu Othacehe1-0/+8
Add USB support by enabling `usb` command and required USB drivers. Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
2024-03-24arm: dts: imx93-phyboard-segin: Add USB supportMathieu Othacehe1-0/+15
Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are not connected to the SoC. This addition to imx93-phyboard-segin-u-boot.dtsi is temporary, until USB support is added to imx93-phyboard-segin.dts in Linux. Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2024-03-24imx: ele_ahab: Add ahab_commit command supportMathieu Othacehe3-0/+63
This message is used to commit into the fuses any new SRK revocation and FW version information that have been found into the NXP (ELE FW) and OEM containers. Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
2024-03-24MAINTAINERS: Add entry for PCIe DWC IMX driverSumit Garg1-0/+6
Add myself as maintainer for PCIe DWC IMX driver support. Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24imx8mp_venice_defconfig: Enable PCIe/NVMe supportTim Harvey1-0/+8
Enable PCIe/NVMe support. Also, enable the reset, regmap and syscon drivers which are a prerequisite for PCIe support. Signed-off-by: Tim Harvey <tharvey@gateworks.com> [SG: rebased to next branch tip] Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24verdin-imx8mp_defconfig: Enable PCIe/NVMe supportSumit Garg1-0/+6
Enable PCIe/NVMe support. Also, enable the reset driver which is a prerequisite for PCIe support. Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24pcie_imx: Update header to describe it as a legacy driverSumit Garg1-0/+8
Since now we have the modern pcie_dw_imx.c driver for iMX SoCs, encourage people to switch to that for any further new iMX SoC support or even for the older iMX6 SoCs too. Suggested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
2024-03-24pci: Add DW PCIe controller support for iMX8MP SoCSumit Garg3-0/+350
pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is tied to quite old port of pcie_designware driver from Linux which suffices only iMX6 specific needs. But currently we have the common DWC specific bits which alligns pretty well with DW PCIe controller on iMX8MP SoC. So lets reuse those common bits instead as a new driver for iMX8 SoCs. It should be fairly easy to add support for other iMX8 variants to this driver. iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we can reuse the generic PHY infrastructure to power on PCIe PHY. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHYSumit Garg3-0/+295
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe PHY initialization moved to this standalone PHY driver. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver reference commit 7559e7572c03 ("phy: Explicitly include correct DT includes"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24imx8mp: power-domain: Expose high performance PLL clockSumit Garg1-0/+77
Expose the high performance PLL as clock framework clock, so the PCIe PHY can use it when there is no external refclock provided. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24imx8mp: power-domain: Add PCIe supportSumit Garg1-38/+79
Add support for GPCv2 power domains and clock handling for PCIe and PCIe PHY. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24reset: imx: Add support for i.MX8MP reset controllerSumit Garg1-0/+101
Add support for i.MX8MP reset controller, it has same reset IP inside as the other iMX7 and iMX8M variants but with different module layout. Inspired from counterpart Linux kernel v6.8-rc3 driver: drivers/reset/reset-imx7.c. Use last Linux kernel driver reference commit bad8a8afe19f ("reset: Explicitly include correct DT includes"). Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24reset: imx: Refactor driver to simplify function namesSumit Garg1-21/+21
imx7_reset_{deassert/assert}_imx* are a bit more confusing when compared with imx*_reset_{deassert/assert}. So refactor driver to use function names easier to understand. This shouldn't affect the functionality though. Suggested-by: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-24clk: imx8mp: Add support for PCIe clocksSumit Garg1-0/+6
Add support for PCIe clocks required to enable PCIe support on iMX8MP SoC. Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice* Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon-kit Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2024-03-22remoteproc: uclass: Add methods to load firmware to rproc and boot rprocWIP/22Mar2024-nextMD Danish Anwar3-0/+145
Add APIs to set a firmware_name to a rproc and boot the rproc with the same firmware. Clients can call rproc_set_firmware() API to set firmware_name for a rproc whereas rproc_boot() will load the firmware set by rproc_set_firmware() to a buffer by calling request_firmware_into_buf(). rproc_boot() will then load the firmware file to the remote processor and start the remote processor. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org>
2024-03-22remoteproc: k3-dsp: Extend support for C71x DSPs on J721S2 SoCsHari Nagalla1-1/+3
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain, and there are no C66x DSP subsystems on these SoCs. The C71x DSP subsystem is a slighly updated version of the C71x DSP subsystem on J721e. The C71x DSPs are 64 bit machine with fixed and floating point DSP operations. Extend support to the C71x DSPs with J721S2 compatible strings. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
2024-03-22remoteproc: k3-r5: Extend support for R5F clusters on J721S2 SoCsHari Nagalla1-2/+4
The K3 J721S2 SoCs have three dual-core R5F subsystems, one in MCU voltage domain and the other two in MAIN voltage domain. These R5F clusters are similar to the R5F clusters in J7200 SoCs. Compatible Info is updated to support J721S2 SoCs. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
2024-03-21Merge tag 'efi-next-20240321' of ↵WIP/21Mar2024-nextTom Rini35-84/+204
https://source.denx.de/u-boot/custodians/u-boot-efi into next Pull request efi-next-20240321 Documentation: * Avoid short reference link names in device-tree documentation. UEFI/Video: * Support code page 437 code points 1 - 31 used by GRUB
2024-03-21doc: typo SynopisHeinrich Schuchardt21-42/+42
%s/Synopis/Synopsis/g Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-21efi_selftest: Update StrToFat() unit test after CP473 map extensionJanne Grunau1-0/+12
Test that Unicode code points which map to CP437 code points 1-31 are converted to '_'. This ensures no FAT file names do not contain chars which are control characters in other code pages (CP 1250 for example). Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-03-21efi_selftest: Add geometric shapes character selftestJanne Grunau1-0/+13
Draw symbols from Unicode's "Geometric shapes" page which translate to code page 437 code points 1-31. These are used by UEFI applications to draw user interfaces using EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL. The output has to be checked manually on the screen for correctness. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-03-21efi_selftest: Add box drawing character selftestAndre Przywara1-0/+20
UEFI applications rely on Unicode output capability, and might use that for drawing pseudo-graphical interfaces using Unicode defined box drawing characters. Add a simple test to display the most basic box characters, which would need to be checked manually on the screen for correctness. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-03-21efi_selftest: Add international characters testAndre Przywara1-0/+21
UEFI relies entirely on unicode output, which actual fonts displayed on the screen might not be ready for. Add a test displaying some international characters, to reveal missing glyphs, especially in our builtin fonts. This would be needed to be manually checked on the screen for correctness. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-03-21lib/charset: Map Unicode code points to CP437 code points 1-31Janne Grunau5-9/+28
Code page 437 uses code points 1-31 for glyphs instead of control characters. Map the appropriate Unicode code points to this code points. Fixes rendering of grub2's menu as EFI application using the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL on a console with bitmap fonts. Signed-off-by: Janne Grunau <j@jannau.net>
2024-03-21video: console: Parse UTF-8 character sequencesJanne Grunau6-21/+56
efi_console / UEFI applications (grub2, sd-boot, ...) pass UTF-8 character sequences to vidconsole which results in wrong glyphs for code points outside of ASCII. The truetype console expects Unicode code points and bitmap font based consoles expect code page 437 code points. To support both convert UTF-8 to UTF-32 and pass Unicode code points in vidconsole_ops.putc_xy(). These can be used directly in console_truetype and after conversion to code page 437 in console_{normal,rotate}. This fixes rendering of international, symbol and box drawing characters used by UEFI applications. Signed-off-by: Janne Grunau <j@jannau.net>
2024-03-21doc: devicetree: Lets avoid short reference link namesSumit Garg1-12/+12
Short reference link names like "dtspec", "dtrepo", "dttweaks" etc. interrupt the flow of the document text. Lets avoid them and instead expand in place for better readability. Suggested-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-20test: dm: add button_cmd testWIP/20Mar2024-nextCaleb Connolly5-1/+100
Add a test for the button_cmd feature. This validates that commands can be mapped to two buttons, that the correct command runs based on which button is pressed, that only 1 command is run, and that no command runs if button_cmd_0_name is wrong or unset. Additionally, fix a potential uninitialised variable use caught by these tests, the btn variable in get_button_cmd() is assumed to be null if button_get_by_label() fails, but it's actually used uninitialised in that case. CONFIG_BUTTON is now enabled automatically and was removed when running save_defconfig. Fixes: e761035b6423 ("boot: add support for button commands") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-20Makefile: Add missing OF_UPSTREAM Makefile for 32bit ARMMarek Vasut1-0/+14
Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm Tested-by: Tony Dinh <mibodhi@gmail.com>
2024-03-20gpio: mcp230xx: Add support for models with SPI interface.Piotr Wojtaszczyk3-5/+144
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
2024-03-20arm: dts: ast2600-x4tf: Add new dts for ASUS X4TFKelly Hung2-1/+164
This is the new bmc dts for ASUS X4TF server. Signed-off-by: Kelly Hung <Kelly_Hung@asus.com>
2024-03-20spl: Improve error message for SPL memory allocationLeo Yu-Chi Liang1-1/+6
There could be two memory allocation scheme in SPL phase. Explicitly print the corresponding error message. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-20Merge branch '2024-03-19-assorted-updates' into nextTom Rini14-13/+276
- TI J7200 updates, GIC-600 support, 2 more tests, fix parsing ccsidr_el1 register in some cases, prepare for allowing remoteproc to use fs_loader and make the binary_size_check rule not require 'bc'.
2024-03-19test/py: reset: Add a test for reset commandLove Kumar1-0/+63
Add a test for reset commands which performs resetting of CPU, It does COLD reset by default and WARM reset with -w option. Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-03-19test/py: saveenv: Add a test for saveenv commandLove Kumar1-0/+137
Add test case for saveenv command in non-JTAG bootmode which saves the u-boot environment variables in persistent storage. Signed-off-by: Love Kumar <love.kumar@amd.com>
2024-03-19Makefile: use shell to calculate map_sizeLeon M. Busch-George1-5/+10
The error message "bc: command not found" is easily missed since the build continues. bc is not a part of coreutils or base-devel. POSIX sh can also do the calculation. Signed-off-by: Leon M. Busch-George <leon@georgemail.eu> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-19arm: Check FEAT_CCIDX when parsing ccsidr_el1 registerLukasz Wiecaszek1-0/+9
Current Cache Size ID Register (ccsidr_el1) has two "flavors" depending on whether FEAT_CCIDX is implemented or not. When FEAT_CCIDX is implemented Associativity parameter is coded on bits [23:3] and NumSets parameter on bits [55:32]. When FEAT_CCIDX is not implemented then Associativity parameter is coded on bits [12:3] and NumSets parameter on bits [27:13]. Current U-Boot code does not check whether FEAT_CCIDX is implemented and always parses ccsidr_el1 as if FEAT_CCIDX was not implemented. This is of course wrong on systems where FEAT_CCIDX is implemented. This patch fixes that problems and tests whether FEAT_CCIDX is implemented or not and accordingly parses the ccsidr_el1 register. Signed-off-by: Lukasz Wiecaszek <lukasz.wiecaszek@gmail.com>
2024-03-19arm64: gic: Add power up sequence for GIC-600Venkatesh Yadav Abbarapu4-1/+22
Arm's GIC-600 features a Power Register (GICR_PWRR), which needs to be programmed to enable redistributor operation. Power on the redistributor and wait until the power on state is reflected by checking the bit GICR_PWRR.RDPD == 0. While running U-Boot in EL3 without enabling this register, GICR_WAKER.ChildrenAsleep bit is not getting cleared and loops infinitely. This register(GICR_PWRR) must be programmed to mark the frame as powered on, before accessing other registers in the frame. Rest of initialization sequence remains the same. ARM GIC-600 IP complies with ARM GICv3 architecture. Enable this config if GIC-600 IP present. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
2024-03-19arm: dts: k3-j7200-r5-common: Add missing overrides for ringacc and udmapAniket Limaye1-0/+8
Corrects the ti,sci property to point to dm_tifs node for proper functioning of mcu_ringacc and mcu_udmap. Fixes: df73e791ce09 ("arm: dts: j7200: dts sync with Linux 6.6-rc1") Signed-off-by: Aniket Limaye <a-limaye@ti.com>
2024-03-19arm: dts: k3-j7200-r5-common: fix the mcu_timer0 clock frequencyAniket Limaye1-1/+1
Correcting the clock-frequency property of the mcu_timer0 node Fixes: df73e791ce09 ("arm: dts: j7200: dts sync with Linux 6.6-rc1") Signed-off-by: Aniket Limaye <a-limaye@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-03-19arm: dts: k3-j7200: Fix support for OSPI flashAniket Limaye2-0/+9
- Add the missing bootph-all property in the flash subnode for ospi - Add the missing overrides for the ospi node in the r5 devicetree Signed-off-by: Aniket Limaye <a-limaye@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-03-19configs: j7200_evm_*_defconfig: Enable OSPI configsAniket Limaye2-4/+15
Add the necessary configs required for OSPI functionality. Also update the ospi flash partition offsets as per the devicetree. Signed-off-by: Aniket Limaye <a-limaye@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-03-19arm: mach-k3: Fix config check for FS_LOADERMD Danish Anwar2-2/+2
load_firmware() API calls fs-loader APIs and checks for CONFIG_FS_LOADER before calling those APIs. The if check only checks for CONFIG_FS_LOADER but not for CONFIG_SPL_FS_LOADER. When CONFIG_FS_LOADER is enabled, load_firmware() API calls fs-loader APIs but this is done at SPL stage and at this time FS_LOADER is not built yet as a result we see below build error. AR spl/boot/built-in.o LD spl/u-boot-spl arm-none-linux-gnueabihf-ld.bfd: arch/arm/mach-k3/common.o: in function `load_firmware': /home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:184: undefined reference to `get_fs_loader' arm-none-linux-gnueabihf-ld.bfd: /home/danish/workspace/u-boot/arch/arm/mach-k3/common.c:185: undefined reference to `request_firmware_into_buf' make[2]: *** [/home/danish/workspace/u-boot/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 make[1]: *** [/home/danish/workspace/u-boot/Makefile:2055: spl/u-boot-spl] Error 2 make[1]: Leaving directory '/home/danish/uboot_images/am64x/r5' make: *** [Makefile:177: sub-make] Error 2 Fix this by modifying the if check to CONFIG_IS_ENABLED(FS_LOADER) instead of IS_ENABLED(CONFIG_FS_LOADER) as the former will check for the appropriate config option (CONFIG_SPL_FS_LOADER / CONFIG_FS_LOADER) based on the build stage. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-03-19Merge tag 'u-boot-socfpga-next-20240319' of ↵WIP/19Mar2024-nextTom Rini51-84/+2993
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next - A new driver in the misc to register setting from device tree. This also provides user a clean interface and all register settings are centralized in one place, device tree. - Enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Build-tested on SoC64 boards, boot tested on some of them.
2024-03-18arch: arm: Agilex5 enablementJit Loon Lim27-37/+2717
This patch is to enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-03-18drivers: misc: Add socfpga_dtreg driver for Intel SoCFPGAWan Yee Lau5-0/+205
Add socfpga_dtreg driver enablement for Intel SoCFPGA. Signed-off-by: Wan Yee Lau <wan.yee.lau@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-03-17Merge tag 'u-boot-imx-next-20240317' of ↵WIP/17Mar2024-nextTom Rini41-10705/+141
https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19975 - Select polling-rate from cpu-thermal devicetree node on imx_tmu. - Re-organize the U-Boot environment and add RAUC logic for phycore_imx8mp. - Enable watchdog on colibri-imx7. - Move imx8mm-venice to use OF_UPSTREAM.
2024-03-17imx8m*_venice: move venice to OF_UPSTREAMTim Harvey33-10658/+13
Move to imx8m{m,n,p}-venice to OF_UPSTREAM: - replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the dt's from the OF_LIST - handle the fact that dtbs now have a 'freescale/' prefix - imply OF_UPSTREAM - remove rudundant files from arch/arm/dts leaving only the *-u-boot.dtsi files Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
generated by cgit v1.1 at 2024-07-31 05:23:09 +0000