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2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵WIP/23Feb2021Tom Rini18-134/+208
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23spi: zynqmp_gqspi: fix set_speed bug on multiple runsBrandon Maier1-12/+11
If zynqmp_qspi_set_speed() is called multiple times with the same speed, then on the second call it will skip recalculating the baud_rate_val as it assumes the speed is already configured correctly. But it will still write the baud_rate_val to the configuration register and call zynqmp_gqspi_set_tapdelay(). Because it skipped recalculating the baud_rate_val, it will use the initial value of 0 . This causes the driver to run at maximum speed which for many spi flashes is too fast and causes data corruption. Instead only write out a new baud_rate_val if we have calculated the correct baud_rate_val. This opens up another issue with the "if (speed == 0)", we don't save off the new plat->speed_hz value when setting the baud rate on the speed=0 path. Instead mimic what the Linux zynqmp gqspi driver does, and have speed==0 just use the same calculation as a normal speed. That will cause the baud_rate_val to use the slowest speed possible, which is the safest option. Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com> CC: jagan@amarulasolutions.com CC: michal.simek@xilinx.com CC: Ashok Reddy Soma <ashokred@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT nameMichal Simek2-0/+0
Folder names corresponds to DT name. These boards have been renamed from zc1275 to zcu1275 by commit shown below and this should be the part of that commit. Fixes: 420d44678119 ("arm64: zynqmp: Rename zc1275 to zcu1275") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23net: gem: Fix error path in zynq_gem_probeMichal Simek1-4/+4
Clean up error path in connection where priv->rxbuffers and priv->tx_bd are allocated. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23net: gem: Enable ethernet rx clock for versalT Karthik Reddy1-6/+27
Enable rx clock along with tx clock for versal platform. Use compatible data to enable/disable clocks in the driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-02-23i2c: i2c_cdns: Enable i2c clockT Karthik Reddy1-0/+7
Enable i2c controller clock from driver probe function by calling clk_enable(). Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-23clk: versal: Add support to enable clocksT Karthik Reddy1-0/+11
Add clock enable functionality in versal clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynqmp: Add support to enable clocksT Karthik Reddy1-0/+49
Add clock enable functionality in zynqmp clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek8-9/+18
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23arm64: zynqmp: Do not clear reset reasonMichal Simek1-5/+1
There is no need to clear reset reason register because it is protected by PMUFW already which is reported when verbose log is enabled as: pm_core.c@733 APU> No write permission to 0xFF5E0220 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23fpga: zynqpl: fix buffer alignmentMichael Walle1-1/+1
Due to pointer arithmetic, "sizeof(u32) * ARCH_DMA_MINALIGN" is subtracted. It seems that the original intention was to just subtract ARCH_DMA_MINALIGN. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-22Merge tag 'u-boot-amlogic-20210222' of ↵Tom Rini11-3/+325
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - adds adc-keys button driver - fix meson-saradc driver to get reference voltage - add adc-keys test for sandbox - enable adc-keys for VIM3 & VIM3L boards - fix button.h build
2021-02-22Merge tag 'ti-v2021.04-rc3' of ↵Tom Rini7-64/+84
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix ethernet on J721e - Sync am335x DT nodes from Linux 5.9-rc7 - Minor Clock fixes
2021-02-22Merge tag 'video-for-v2021.04-rc3' of ↵Tom Rini10-607/+215
https://gitlab.denx.de/u-boot/custodians/u-boot-video - splash_source warning fix when building with 64-bit toolchains - lq123p1jx31 and nv101wxmn51 compatible in simple panel driver - remove not used mb862xx driver - add Himax HX8238D panel driver - s/video_uc_platdata/video_uc_plat/
2021-02-22Merge branch '2021-02-21-mpc83xx-updates'Tom Rini8-5/+104
- mpc8379erdb DM_MMC conversion - kmeter1 updates - qe_uec fixes
2021-02-22button: add udevice forward declarationNeil Armstrong1-0/+2
After 401d1c4f5d2d ("common: Drop asm/global_data.h from common header") build fails with : drivers/button/button-uclass.c:13:5: error: conflicting types for 'button_get_by_label' int button_get_by_label(const char *label, struct udevice **devp) ^~~~~~~~~~~~~~~~~~~ Adding struct udevice forward declaration in button.h solves the build error. Fixes: 401d1c4f5d2d ("common: Drop asm/global_data.h from common header") Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22arch: sandbox: fix typo in clk.hDario Binacchi1-13/+13
Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22clk: remove a redundant headerDario Binacchi1-1/+0
The linux/err.h header file was included twice. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22arm: dts: sync am33xx-clocks with Linux 5.9-rc7Dario Binacchi1-3/+3
The commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the exception of two nodes. I think I was wrong and it is better to keep the two files similar and possibly make changes to the *-u-boot.dtsi files. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-22clk: ti: improve debug messages for clkctrl driverDario Binacchi1-2/+2
The previous version printed the same debug message for both the enable and disable routines without highlighting whether you were enabling or disabling the module. It is now clear whether you are enabling or disabling the module. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-21uec.h: fix COFIG_DM typoWIP/2021-02-21-mpc83xx-updatesRasmus Villemoes1-1/+1
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21dm_qe_uec.c: fix indentation in uec_set_mac_if_mode()Rasmus Villemoes1-2/+2
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21mdio-uclass.c: support fixed-link subnodesRasmus Villemoes1-0/+7
When trying to port our mpc8309-based board to DM_ETH, on top of Heiko's patches, I found that nothing in mdio-uclass.c seems to support the use of a fixed-link subnode of the ethernet DT node. That is, the ethernet node looks like enet0: ethernet@2000 { device_type = "network"; compatible = "ucc_geth"; ... fixed-link { reg = <0xffffffff>; speed = <100>; full-duplex; }; but the current code expects there to be phy-handle property. Adding that, i.e. phy-handle = <&enet0phy>; enet0phy: fixed-link { just makes the code break a few lines later since a fixed-link node doesn't have a reg property. Ignoring the dtc complaint and adding a dummy reg property, we of course hit "can't find MDIO bus for node ethernet@2000" since indeed, the parent node of the phy node does not represent an MDIO bus. So that's obviously the wrong path. Now, in linux, it seems that the fixed link case is treated specially; in the of_phy_get_and_connect() which roughly corresponds to dm_eth_connect_phy_handle() we have if (of_phy_is_fixed_link(np)) { ret = of_phy_register_fixed_link(np); ... } else { phy_np = of_parse_phandle(np, "phy-handle", 0); ... } phy = of_phy_connect(dev, phy_np, hndlr, 0, iface); And U-Boot's phy_connect() does have support for fixed-link subnodes. Calling phy_connect() directly with NULL bus and a dummy address does seem to make the ethernet work. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21mpc83xx: kmeter1: increase malloc_f spaceHeiko Schocher1-0/+1
make malloc space before relocation bigger, set CONFIG_SYS_MALLOC_F_LEN=0x800 Signed-off-by: Heiko Schocher <hs@denx.de>
2021-02-21mpc83xx: kmeter1_defconfig add missing BAT4 configHeiko Schocher1-0/+6
BAT4 setup missed in defconfig, add it. Signed-off-by: Heiko Schocher <hs@denx.de>
2021-02-21mpc8379erdb: Convert to DM_MMCSinan Akman2-2/+12
Signed-off-by: Sinan Akman <sinan@writeme.com>
2021-02-21mpc8379erdb: Add device treeSinan Akman2-0/+75
Signed-off-by: Sinan Akman <sinan@writeme.com>
2021-02-21Merge tag 'efi-2021-04-rc3' of ↵WIP/21Feb2021Tom Rini9-23/+302
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-04-rc3 Bug fixes: * Let EFI simple file protocol access last block of partition * Correct conversion of multi-part device paths in EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() Documentation: * booti and qfw man-pages
2021-02-21Merge tag 'for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2cTom Rini118-326/+353
i2c changes for v2021.04 new feature: - Allow disabling driver model for I2C in SPL fixes: - i2c-gpio: Fix GPIO output - at91: fix crash when using 'i2c probe'
2021-02-21Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2-7/+24
- RCar Gen3 updates
2021-02-21doc: qfw man-pageHeinrich Schuchardt2-0/+90
Provide a man-page for the qfw command. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21efi_loader: multi part device paths to textHeinrich Schuchardt1-5/+12
Our current implementation of EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() truncates multi part device paths after the first part. We should convert all parts. Render device path instance ends as commas. This is not explicitly described in the UEFI spec but mimics what EDK II does. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-02-21efi_selftest: multi part device path to textHeinrich Schuchardt1-0/+65
Test EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() for a multi part device path. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-02-21efi_selftest: compiler flags for dtbdump.oHeinrich Schuchardt1-1/+1
Fix a typo. Apply the correct compiler flags to dtbdump.o. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21doc: booti man-pageHeinrich Schuchardt2-0/+115
Provide a man-page for the booti command. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-21doc/README.distro: kernel_comp_addr_rHeinrich Schuchardt1-4/+4
Add missing articles and preposition. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21doc: Add reference to U-Boot project in conf.pyHeinrich Schuchardt1-11/+13
With the last update of conf.py the references to U-Boot where replaced by references to Linux. Fix the project references in the generated documentation. Reported-by: Simon Glass <sjg@chromium.org> Reported-by: Bin Meng <bmeng.cn@gmail.com> Fixes: 98f01cf7a22e ("doc: update Kernel documentation build system") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21Allow last block to be readJesper Schmitz Mouridsen1-2/+2
The last block is of size media->block_size Signed-off-by: Jesper Schmitz Mouridsen <jesper@schmitz.computer> Simplify expression. Apply same change to efi_disk_write_blocks(). Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-21dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk107-311/+311
Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21board: freescale: drop CONFIG_DM_I2C undefsIgor Opaniuk9-5/+4
Drop CONFIG_DM_I2C undefs from board header files, and make them disabled on these boards in defconfigs instead. Disabling on Kconfig symbol was done automatically with this script: cd configs files=(*ls1046a*) files2=(*T104*RDB*) files3=(ls1021atwr_*) files4=("imx8mp_evk_defconfig phycore-imx8mp_defconfig") combine=("${files[@]}" "${files2[@]}" "${files3[@]}" "${files4[@]}") cd .. for item in ${combine[*]} do echo "Adjusting $item" echo "# CONFIG_SPL_DM_I2C is not set" >> configs/$item make $item && make savedefconfig && cp defconfig configs/$item done Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-21dm: i2c: allow disabling driver model in SPLIgor Opaniuk3-3/+24
At present if U-Boot proper uses driver model for I2C, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. This patch introduces a separate Kconfig symbols for enabling DM_I2C and DM_I2C_GPIO support in SPL. This will also help to get away from dirty workarounds to achieve non-DM I2C support for SPL, which is currently used in some board header files like: ifdef CONFIG_SPL_BUILD undef CONFIG_DM_I2C endif Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-21i2c: at91: fix crash when using 'i2c probe'Eugen Hristev1-0/+4
When issuing 'i2c probe', the driver was crashing, because at probe there is a request with zero length buffer to write to i2c bus. The xfer_msg function assumes the buffer is always there, and never checks for the buffer length. => i2c dev 0 Setting bus to 0 => i2c probe Valid chip addresses: data abort pc : [<7ffa97dc>] lr : [<7ffa96f8>] reloc pc : [<66f277dc>] lr : [<66f276f8>] sp : 7fb7c110 ip : 7ff87a28 fp : 7ff99938 r10: 00000002 r9 : 7fb7dec0 r8 : 00000000 r7 : e181c600 r6 : 7fb88c20 r5 : 00000000 r4 : 7fb7c128 r3 : 00000000 r2 : 00000001 r1 : 00000000 r0 : 00000009 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: eb0092f4 e1a00005 e8bd81f0 e594300c (e5d33000) Resetting CPU ... Fixes: 8800e0fa20 ("i2c: atmel: add i2c driver") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-02-21i2c: i2c-gpio: Fix GPIO outputHarm Berntsen1-7/+10
The dm_gpio_set_dir_flags function cannot be used to update the configuration of a GPIO pin because it does a bitwise OR with the existing flags. Looks like commit 788ea834124b ("gpio: add function _dm_gpio_set_dir_flags") has introduced this behaviour and the i2c-gpio driver has been broken since. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Heiko Schocher <hs@denx.de> CC: Patrick Delaunay <patrick.delaunay@st.com>
2021-02-20ARM: rmobile: Enable CONFIG_PCI_REGION_MULTI_ENTRY on RCar3Marek Vasut1-0/+1
R-Car3 can have multiple regions of type memory in DT, enable CONFIG_PCI_REGION_MULTI_ENTRY to handle those instead of using just one of the memory regions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-02-20pci: renesas: Fix BAR mapping on Gen3Marek Vasut1-3/+3
Because the first PCIExAR(n) register is configured with the mapping, It is the second PCIExAR(n) register that must be written with 0, not the last one. Update the n from 4 to 1 to select the correct register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20pci: renesas: Make map address and mask power of two on Gen3Marek Vasut1-3/+6
Both the map address and mask must be power of two per documentation, adjust the code accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20pci: renesas: Add root bus handling on Gen3Marek Vasut1-1/+14
Add code to access the PCIe root bus space and configure it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-19Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiWIP/19Feb2021Tom Rini7-43/+12
- H616 clock fix to enable video PLL - sunxi-common.h cleanups - support for UART1 as the console on sun8i - removing wrong linux,stdout-path from DTs
2021-02-19fdt/sunxi: Remove OF_STDOUT_PATHAndre Przywara4-28/+1
OF_STDOUT_PATH was meant to hold the devicetree path to the serial console, to be put into the linux,stdout-path property of the chosen node. The only user of that was sunxi, and it was actually wrong for years there: the paths hardcoded in sunxi_common.h were not matching the DTs, evident by the leading 0's in nodenames, which have been removed years ago. On top of that, "linux,stdout-path" is now deprecated for a while (Linux commit 2a9d832cc9aae from November 2014), and also all modern DTs (including those included in U-Boot) carry a "stdout-path" property already. So remove the stanza from sunxi_common.h, and, since this was the last user, also remove the associated bits from the rest of U-Boot. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19sunxi: support boot console on uart1 for sun8iTobias Schramm2-0/+6
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
generated by cgit v1.1 at 2024-10-13 12:34:51 +0000