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2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/20May2021Tom Rini3-100/+165
- Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell authors)
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini27-114/+219
2021-05-20arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"Stefan Roese1-2/+2
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even when this is functionally incorrect since "2500base-x" was not supported in U-Boot at that time. As this mode is now supported (at least present in the headers), this patch moves back to the orinal version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Cc: Vladimir Vid <vladimir.vid@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2021-05-20net: mvpp2: add explicit sgmii-2500 supportMarcin Wojtas1-16/+12
Until now the mvpp2 driver used an extra 'phy-speed' DT property in order to differentiate between the SGMII and SGMII @2.5GHz. As there is a dedicated PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter start using it and drop the custom flag. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Tested-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-20net: mvpp2: allow MDIO registration for fixed linksStefan Chulski1-4/+13
Currently, there are 2 valid cases for interface, PHY and mdio relation: - If an interface has PHY handler, it'll call mdio_mii_bus_get_from_phy(), which will register MDIO bus. - If we want to use fixed-link for an interface, PHY handle is not defined in the DTS, and no MDIO is registered. There is a third case, for some boards (with switch), the MDIO is used for switch configuration, but the interface itself uses fixed link. This patch allows this option by checking if fixed-link subnode is defined, in this case, MDIO bus is registers, but the PHY address is set to PHY_MAX_ADDR for this interface, so this interface will not try to access the PHY later on. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-20net: mvpp2: fix missing switch case breakBen Peled1-0/+2
Signed-off-by: Ben Peled <bpeled@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-20net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REGBen Peled1-3/+0
Signed-off-by: Ben Peled <bpeled@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-20net: mvpp2: AN Bypass in 1000 and 2500 basex modeBen Peled1-2/+4
Signed-off-by: Ben Peled <bpeled@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-20net: mvpp2: Fix 2.5G GMII_SPEED configurationsStefan Chulski1-1/+2
GMII_SPEED should be enabled for 2.5G speed Signed-off-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Yan Markman <ymarkman@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-20net: mvpp2: remove redundant SMI address configurationMarcin Wojtas1-12/+0
Because the mvpp2 driver now relies on the PHYLIB and the external MDIO driver, configuring low level SMI bus settings is redundant. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-20net: mvpp2: add 1000BaseX and 2500BaseX ppv2 supportStefan Chulski1-5/+112
Signed-off-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-20net: mvpp2: add CP115 port1 10G/5G SFI supportStefan Chulski1-58/+17
1. Differ between Port1 RGMII and SFI modes in Netcomplex config. 2. Remove XPCS config from SFI mode. Port1 doesn't XPCS domain, XPCS config should be removed. Access to Port1 XPCS can cause stall. 3. Add Port1 MPCS configurations. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-20phy: introduce 1000BaseX and 2500BaseX modesStefan Chulski1-0/+4
Signed-off-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-19Merge tag 'xilinx-for-v2021.07-rc3' of ↵WIP/19May2021Tom Rini28-24/+3797
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.07-rc3 ZynqMP: - Syncup DT with Linux kernel - Fix mmc mini configurations via DT - Add pinctrl/psgtr description to DTs - Add DTs for Kria boards - Enable RTC and Time commands Versal: - Fix early BSS section location
2021-05-19riscv: ae350: Increase malloc size for binman spl flowRick Chen4-0/+4
It will need larger heap size for u-boot-spl to load u-boot.itb which be generated from binman than USE_SPL_FIT_GENERATOR. Signed-off-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-19riscv: Drop USE_SPL_FIT_GENERATORBin Meng9-109/+1
Now that we have switched to binman to generate u-boot.itb for all RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can be dropped. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng7-0/+13
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs, so that binman is now used to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng6-0/+22
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along with a new dedicated device tree source file for the QEMU virt target used for binman only, we can now use binman to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: dts: Sort build targets in alphabetical orderBin Meng1-1/+1
Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19binman: Support packaging U-Boot for scenarios like OF_BOARD or OF_PRIOR_STAGEBin Meng3-1/+44
For scenarios like OF_BOARD or OF_PRIOR_STAGE, no device tree blob is provided in the U-Boot build phase hence the binman node information is not available. In order to support such use case, a new Kconfig option BINMAN_STANDALONE_FDT is introduced, to tell the build system that a device tree blob containing binman node is explicitly required when using binman to package U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBEDBin Meng1-1/+1
Generally speaking BINMAN_FDT makes sense for OF_SEPARATE or OF_EMBED. For the other OF_CONTROL methods, it's quite possible binman node is not available as binman is invoked during the build phase instead of runtime. Let's only turn it on for OF_SEPARATE or OF_EMBED by default. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng4-0/+73
At present SiFive Unleashed board uses the Makefile to create the FIT, using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile warning. Update to use binman instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19makefile: Pass OpenSBI blob to binman make rulesBin Meng1-0/+1
This updates the make rules to pass OpenSBI blob to binman. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19binman: Add support for RISC-V OpenSBI fw_dynamic blobBin Meng4-0/+57
Add an entry for RISC-V OpenSBI's 'fw_dynamic' firmware payload. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19binman: test: Rename 172_fit_fdt.dts to 170_fit_fdt.dtsBin Meng2-5/+5
Currently there are 2 binman test cases using the same 172 number. It seems that 172_fit_fdt.dts was originally named as 170_, but commit c0f1ebe9c1b9 ("binman: Allow selecting default FIT configuration") changed its name to 172_ for no reason. Let's change it back. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19binman: Correct the comment for ATF entry typeBin Meng1-1/+1
This is wrongly referring to Intel ME, which should be ATF. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19binman: Correct '-a' description in the docBin Meng1-2/+2
It needs a space around '-a'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19common: kconfig: Correct a typo in SPL_LOAD_FITBin Meng1-1/+1
It should be FDT, not FTD. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19xilinx: zynqmp: Enable DM_RTC/emul driver/cmd date/gettime and efi settimeMichal Simek1-0/+4
Right now U-Boot is not aware about date/time that's why enable it by default also with EFI runtime service for setting time. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19xilinx: versal: Enable CONFIG_POSITION_INDEPENDENTT Karthik Reddy1-0/+1
U-Boot expects to be linked to a specific hard-coded address and to be loaded to and run from that address. CONFIG_POSITION_INDEPENDENT config lifts that restriction & allowing the code to be loaded to and executed from almost any address. As we enabled CONFIG_POSITION_INDEPENDENT, CONFIG_INIT_SP_RELATIVE is enabled by default, where it will set the early stack pointer at runtime by adding an offset value to &_bss_start. The offset value is taken from SYS_INIT_SP_BSS_OFFSET. SYS_INIT_SP_BSS_OFFSET offset should be large enough so that the early malloc region, global data (gd), and early stack should fit. With commit d8fabcc424bd ("arm64: versal: Increase SYS_MALLOC_F_LEN") SYS_MALLOC_F_LEN is increased from 32KB to 1MB, so we need to accommodate this space with SYS_INIT_SP_BSS_OFFSET. Hence increasing SYS_INIT_SP_BSS_OFFSET to 1.5MB. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add description for SOM/Kria boardsMichal Simek8-1/+1110
The patch contains several DT files for SOM platform. Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC. Files are divided in this way to make sure that SOM can be plugged to different carrier card and all peripherals on SOM (or defined by a spec) can be used by U-Boot. Full DT for SOM+CC can be merged together as overlays. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add psgtr DT descriptionsMichal Simek10-1/+79
Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add pinctrl descriptionMichal Simek12-1/+2489
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add zynqmp firmware specific DT nodesT Karthik Reddy2-0/+80
Probe zynqmp firmware driver by adding zynqmp firmware, power & ipi mailbox device tree nodes for mini emmc. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-05-19arm64: zynqmp: Add missing mio-bank properties to sdhciMichal Simek1-0/+1
Add missing xlnx,mio-bank property to sdhci node. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Remove comment about clock chipsMichal Simek2-10/+10
These comments weren't push to mainline that's why remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add 'i2c-mux-idle-disconnect' propertyRaviteja Narayanam3-0/+6
I2C muxes that have the slave devices with same address are falling into the below problem. VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50 I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50 1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then 2. SC accesses I2C1 - Mux2 (0x75) - Channel 0. Now it results in 2 slave devices with same address (0x50) on the I2C bus, making the communication un-reliable. When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux channel output is disconnected, making none of the channels available to the I2C1. So, there is no question of having the same addressed slave (0x50) present on the bus when we are doing '2'. Same pattern is seen in below two boards also. ZCU208 - zynqmp-zcu208-revA.dts ZCU216 - zynqmp-zcu216-revA.dts Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
2021-05-19arm64: zynqmp: Add label to all GPIO lines for VCK190 SCSaeed Nowshadi1-7/+7
Add label to GPIO lines so the user-level applications can find any line without knowing its physical path on System Controller on VCK190/VMK180. These labels are describing EMIO gpio connection which depends on PL which we normally don't describe but that's only way to go for now. Lately this should be done out of this source code. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk nodeSaeed Nowshadi1-1/+2
The 'silabs,skip-recall' property prevents interruption in operation of the clock while the driver is being probed. Without this property, the DDR DIMM clk can cause a failure during Versal's boot. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
2021-05-19arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodesMichal Simek5-3/+8
All si570 which are used for ps reference clock generation should contain silabs,skip-recall property not to cause break on ps clock. On Versal boards this will cause hang on Versal cpu when it is booted at the same time with SC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-18Merge branch '2021-05-17-assorted-fixes'WIP/18May2021Tom Rini5-8/+11
2021-05-18Merge tag 'efi-2021-07-rc3' of ↵Tom Rini11-35/+110
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-07-rc3 Documentation: * add a man-page for the size command * add man-page for extension command to index Bug fixes: * avoid build failure due to missing SHA512 hardware acceleration * correct error handling in TCG2 protocol * don't let user disable capsule authentication * correct reading directories via UEFI API
2021-05-18Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini10-154/+284
2021-05-18lib: introduce HASH_CALCULATE optionMasahisa Kojima4-1/+7
Build error occurs when CONFIG_EFI_SECURE_BOOT or CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled, because hash-checksum.c is not compiled. Since hash_calculate() implemented in hash-checksum.c can be commonly used aside from FIT image signature verification, this commit itroduces HASH_CALCULATE option to decide if hash-checksum.c shall be compiled. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: Fix Kconfig for EFI_TCG2 protocolIlias Apalodimas1-0/+6
EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms. So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Add 'default y'. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: Don't stop EFI subsystem init if installing TCG2 failsIlias Apalodimas1-5/+28
Up to now we are stopping the EFI subsystem if a TPMv2 exists but the protocol fails to install. Now that we've switched the config to 'default y' the sandbox TPM fails, since it doesn't support all the required capabilities of the protocol. Not installing the protocol is not catastrophic. If the protocol fails to install the PCRs will never be extended to the expected values, so some other entity later in the boot flow will eventually figure it out and take the necessary actions. While at it fix a corner case were the user can see an invalid error message when the protocol failed to install. We do have a tcg2_uninit() which we call when the protocol installation fails. There are cases though that this might be called before the configuration table is installed (e.g probing the TPM for capabilities failed). In that case the user will see "Failed to delete final events config table". So stop printing it since it's not an actual failure , simply because the config table was never installed in the first place. In order to stop printing it make efi_init_event_log() and create_final_event() cleanup themselves and only call tcg2_uninit() when the protocol installation fails. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: Uninstall the TCG2 protocol if logging s-crtm failsIlias Apalodimas1-5/+3
Instead of just failing, clean up the installed config table and EventLog memory if logging an s-crtm event fails during the protocol installation Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Eliminate label 'out:' by using return. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: Clean up tcg2 once in case of failureIlias Apalodimas1-4/+0
efi_init_event_log() calls tcg2_uninit() in case of failure. We can skip that since the function is called on efi_tcg2_register() which also cleans up if an error occurs Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: loosen buffer parameter check in efi_file_read_intPeng Fan1-1/+1
This is same issue as https://bugzilla.redhat.com/show_bug.cgi?id=1733817, but that fix was wrongly partial reverted. When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when the supplied buffer is too small, so a use-case is to call EFI_FILE_PROTOCOL.Read() with *buffer_size=0 and buffer=NULL to obtain the needed size before doing the actual read. So remove the check only for directory reading, file reading already do the check by itself. Fixes: db12f518edb0("efi_loader: implement non-blocking file services") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefan Sørensen <stefan.sorensen@spectralink.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-05-18efi_loader: capsule: Remove the check for capsule_authentication_enabled ↵Sughosh Ganu2-9/+2
environment variable The current capsule authentication code checks if the environment variable capsule_authentication_enabled is set, for authenticating the capsule. This is in addition to the check for the config symbol CONFIG_EFI_CAPSULE_AUTHENTICATE. Remove the check for the environment variable. The capsule will now be authenticated if the config symbol is set. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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