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2020-01-20mx7ulp_evk_plugin: Disable CONFIG_NETFabio Estevam1-0/+1
Currently the following build warning is seen: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. =================================================== Since the mx7ulp-evk board does not have networking support, explicitly disable networking. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-20arm: dts: i.mx8x: add #cooling-cells propertiesAnatolij Gustschin1-0/+4
Fix dtb building warnings: Warning (cooling_device_property): /thermal-zones/cpu-thermal0/cooling-maps/map0: Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from cooling-device[0]) Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20ARM: imx: mx6ull: Add iMX6ULL VisionSOM SoM and EVKArkadiusz Karas10-0/+730
Add iMX6ULL VisionSOM SoM and VisionCB-RT-STD evaluation board support. The SoM has an iMX6ULL, 512 MiB of DRAM and microSD slot. The carrier board has Ethernet, USB host port, USB OTG port. Signed-off-by: Arkadiusz Karas <arkadiusz.karas@somlabs.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2020-01-20ARM: imx: vining2000: Enable SPL SDP by defaultMarek Vasut2-2/+9
Enable SPL SDP fallback boot option in default build. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2020-01-20ARM: imx: vining2000: Properly discern PFUZE100 and PFUZE200Marek Vasut1-1/+1
The PFUZE100 and PFUZE200 PMICs can be discerned by bit 0 in DeviceID register. Print the correct identification of the PMICs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2020-01-20ARM: imx: vining2000: Clean up uSDHC4 setupMarek Vasut1-23/+4
Simplify the uSDHC4 eMMC controller setup. This is the only eMMC present on the system and only controller that is used, so drop the extra logic. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-20Merge branch 'master' of git://git.denx.de/u-bootStefano Babic42-262/+1361
Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-01-17Merge branch '2020-01-17-improve-aes-support'Tom Rini19-87/+1268
- Add support and tests for AES192 and AES256
2020-01-17u-boot: fit: add support to decrypt fit with aesPhilippe Reynes8-1/+240
This commit add to u-boot the support to decrypt fit image encrypted with aes. The FIT image contains the key name and the IV name. Then u-boot look for the key and IV in his device tree and decrypt images before moving to the next stage. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17mkimage: fit: add support to encrypt image with aesPhilippe Reynes10-2/+716
This commit add the support of encrypting image with aes in mkimage. To enable the ciphering, a node cipher with a reference to a key and IV (Initialization Vector) must be added to the its file. Then mkimage add the encrypted image to the FIT and add the key and IV to the u-boot device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-17aes: add test unit for aes196 and aes256Philippe Reynes1-0/+4
This commit add test unit for aes196 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add test unit for aes128Philippe Reynes2-0/+163
This commit add test unit for aes128. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add support of aes192 and aes256Philippe Reynes4-65/+125
Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17aes: add a define for the size of a blockPhilippe Reynes3-20/+21
In the code, we use the size of the key for the size of the block. It's true when the key is 128 bits, but it become false for key of 192 bits and 256 bits. So to prepare the support of aes192 and 256, we introduce a constant for the iaes block size. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-16mx7ulp: Move SoC base address to a common fileFabio Estevam2-4/+4
SoC base addresses should better go into a common SoC file instead of repeating the definition in each board file. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16mx7ulp_evk: Remove unneeded SDHC definitionsFabio Estevam1-3/+0
As we use the driver model for ESDHC there is no need for defining CONFIG_SYS_FSL_USDHC_NUM and CONFIG_SYS_FSL_ESDHC_ADDR, so simply remove them. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16mx7ulp_evk: Disable CONFIG_NETFabio Estevam1-0/+1
Currently the following build warning is seen: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. =================================================== Since the mx7ulp-evk board does not have networking support, explicitly disable networking. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini19-166/+66
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
2020-01-16Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini4-9/+27
- Clearfog: Fix SD booting (Baruch) - Misc updates to MMC handling in SPL to support booting from main data partition (vs hardware boot partition) on MVEBU (Baruch)
2020-01-16Merge tag 'xilinx-for-v2020.04' of ↵Tom Rini119-3899/+1677
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
2020-01-16Merge branch '2020-01-15-master-imports'Tom Rini90-138/+4851
- MediaTek improvements - Some generic clk improvements - A few assorted bugfixes
2020-01-16configs: mediatek: fix mt7623n bpir2 defconfigSam Shih1-0/+1
This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig to fix the mt7623 compile error after building others mediatek target platform Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16arm: dts: mediatek: move u-boot properties to -u-boot.dtsi fileSam Shih6-15/+67
This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16Add support for MT7622 reference boardSam Shih8-0/+332
This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16mmc: add mmc and sd support for MT7622Sam Shih1-0/+10
This patch add mmc and sd support for Mediatek MT7622 SoCs Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16power: domain: add power domain support for MT7622Sam Shih1-0/+6
This patch add power domain support for Mediatek MT7622 SoCs Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16clk: mediatek: fix clock-rate overflow problemSam Shih1-3/+3
This patch fix clock-rate overflow problem in mediatek clock driver common part. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: mediatek: add driver for MT7622Sam Shih3-0/+950
This patch add clock driver for MediaTek MT7622 SoC. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-01-16pinctrl: mediatek: add support for different pinctrlSam Shih7-19/+125
Due to the pinctrl hardware of MT7622 is difference from others SoC which using the common part of mediatek pinctrl. So we need to modify the common part of mediatek pinctrl. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT7622Sam Shih3-0/+757
This patch add Pinctrl driver for MediaTek MT7622 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16ARM: MediaTek: Add support for MediaTek MT7622 SoCSam Shih6-0/+278
Add support for MediaTek MT7622 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16phy: phy-mtk-tphy: make ref clock optionalChunfeng Yun1-1/+2
If make the ref clock optional, no need refer to fixed-clock when the ref clock is always on or comes from oscillator directly. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16phy: phy-mtk-tphy: remove the check of -ENOSYSChunfeng Yun1-2/+1
No need check -ENOSYS anymore after add dummy_enable() for fixed-clock. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: fixed_rate: add dummy enable() functionChunfeng Yun1-0/+7
This is used to avoid clk_enable() return -ENOSYS. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: add APIs to get (optional) clock by name without a deviceChunfeng Yun2-0/+68
Sometimes we may need get (optional) clock without a device, that means use ofnode. e.g. when the phy node has subnode, and there is no device created for subnode, in this case, we need these new APIs to get subnode's clock. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: check valid clock by clk_valid()Chunfeng Yun1-8/+8
Add valid check for clk->dev, it's useful when get optional clock even when the clk point is valid, but its dev will be NULL. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: fix error check for devm_clk_get_optional()Chunfeng Yun1-1/+1
If skip all return error number, it may skip some real error cases, so only skip the error when the clock is not provided in DTS Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16clk: mediatek: mt7629: add support for ssusbsysChunfeng Yun1-0/+42
The SSUSB IP's clocks come from ssusbsys module on mt7629, so add its driver Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16ARM: MediaTek: add basic support for MT8512 boardsmingming lee8-0/+253
This adds a general board file based on MT8512 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8512 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16mmc: mtk-sd: fix hang when data read quicklymingming lee1-5/+1
For CMD21 tuning data, the 128/64 bytes data may coming in very short time, before msdc_start_data(), the read data has already come, in this case, clear MSDC_INT will cause the interrupt disappear and lead to the thread hang. the solution is just clear all interrupts before command was sent. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCsmingming lee1-33/+101
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs. MT8512/MT8110 SoCs puts the tune register at top layer, so need add new code to support it. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT8512mingming lee3-0/+392
Add Pinctrl driver for MediaTek MT8512 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pllmingming lee2-8/+20
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
2020-01-16clk: mediatek: add set_clr_upd mux type flowmingming lee2-11/+55
Add new set_clr_upd mux type and related operation to mtk common clock driver to support mt8512
2020-01-16clk: mediatek: add driver support for MT8512mingming lee3-0/+1071
Add clock driver for MediaTek MT8512 SoC, include topckgen, apmixedsys and infracfg support. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16ARM: MediaTek: Add support for MediaTek MT8512 SoCmingming lee6-0/+245
Add support for MediaTek MT8512 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16MAINTAINERS: Fix mailSam Protsenko1-1/+1
Sam doesn't work for Linaro anymore, so Linaro mail is not valid. Change it to his home mail instead. Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
2020-01-16cmd/blk_common: clarify no partition error messageAlexandre Besnard1-1/+2
When no partition table is found, users should be warned so. Warning that no device is available in this case could be misleading, especially as it is the same error when no device is selected. Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
2020-01-16arm: mvebu: clearfog: update eMMC documentationBaruch Siach1-6/+0
SPL now automatically selects the correct U-Boot image offset for both eMMC and SD card. No need to tweak CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2020-01-16arm: mvebu: clearfog: set uboot image SD card offsetBaruch Siach1-1/+1
Armada 38x ROM skips the first SD card offset when loading SPL. This affects the location of the main U-Boot image. SPL MMC code now supports U-Boot image offset based on run-time detection of the boot partition. Use this feature to make the same generated image support both SD card and eMMC boot partition. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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