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2022-02-05imx8ulp_evk: Control LPI2C0 PCA6416 and TPM0 for displayYe Li4-0/+71
The board use IO9 of PCA6416 on LPI2C0 and TPM0 for MIPI DSI MUX and backlight. However the LPI2C0 and TPM0 are M33 resources, in this patch we simply access them, but this is a temporary solution. We will modify it when M33 FW changes to set MIPI DSI panel as default path and enable backlight after reset. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05imx8ulp: rdc: allow A35 access flexspi0 memYe Li1-0/+2
For singel boot, set flexspi0 mem to be accessed by A35 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05imx8ulp: clock: Add MIPI DSI clock and DCNano clockYe Li2-0/+75
Add the DSI clock enable and disable with PCC reset used. Add the LCD pixel clock calculation and configuration for DCNano Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05imx8ulp: clock: Support LPAV clocks in cgc and pccYe Li5-82/+508
Add the PCC5 clocks support and more LPAV clocks and PLL4 PFD in CGC. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05imx8ulp: assign PXP/HIFI4/EPDC to APD domainPeng Fan1-2/+2
Assign the PXP/HIFI4/EPDC to APD domain, otherwise APD not able to receive interrupts from the modules. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05arm: imx8ulp: Allocate LPAV resources to AP domainYe Li1-6/+16
When single boot, assign AP domain as the master domain of the LPAV. Allocates LPAV master and slave resources like GPU, DCNano, MIPI-DSI eDMA channel and eDMA request to APD Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05imx8ulp: soc: Check the DBD_EN fuse before setting RDCYe Li1-3/+17
S400 enables RDC only when the DBD_EN is fused. Otherwise, the RDC is allowed by all masters. Current S400 has issue if the XRDC has released to A35, then A35 reset will fail in ROM due to S400 fails to get XRDC. So temp work around is checking the DBD_EN, if it is not fused, we don't need to call release XRDC or TRDC. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05ARM: imx8m: support env in fat and ext4Ricardo Salveti1-20/+15
Change boot device logic to also allow environment stored in fat and in ext4 when booting from SD or from eMMC. As the boot device check for SD and for eMMC was depending on ENV_IS_IN_MMC being defined, change the ifdef blocks at env_get_location to use IS_ENABLED instead for all modes, returning NOWHERE when no valid mode is found. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05imx: nandbcb: Fix printf format in write_fcbPali Rohár1-1/+1
Correct printf format for unsigned long long is %llx and not %llxx. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05mxs: power: Change sequence of enabling DCDC switchesLukasz Majewski1-2/+2
The imx28 uses following voltage supplies hierarchy: VDD_5V (VDD_BAT) -> VDDIO -> VDDA -> VDDMEM \-----> VDDD One shall first enable DCDC on the parent source (VDDIO) and then follow with its children. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05imx8mm-venice-gw7902: fix M2_RST# gpio pinmuxTim Harvey1-1/+1
Fix the invalid gw7902 M2_RST# gpio pinmux. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05mx7ulp_com: add support for SPLRicardo Salveti5-0/+82
Add EA iMX7ULP COM board support for building SPL. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2022-02-05mx7ulp: select soc featuresOleksandr Suvorov1-0/+3
Force selecting features present in SoC i.MX7ULP. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2022-02-05arm: imx: imx8mq: add support to get values for more clocksHeiko Thiery1-0/+8
Return the root clock values for MXC_CSPI_CLK, MXC_I2C_CLK, MXC_UART_CLK and MXC_QSPI_CLK. At least for the I2C clock the missing support leads to a wrong configured I2C frequency. The expected value is 100kHz but the resulting value is about 1MHz. Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05colibri-imx7: improve env badblock managementFrancesco Dolcini1-0/+5
Use the complete 512kb (4 blocks) nand partition reserved for u-boot environment instead of just the first block, this allows the module to have a working environment even if 3 blocks are bad. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2022-02-03Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini42-173/+1179
This is the promised second part of the sunxi PR for 2022.04, albeit technially outside of the merge window. We were working on this full steam since the beginning of the year, and it deserves to be merged, I think. The main attraction is support for the F1C100s SoC, which sports a venerable ARM926 core. Support for this SoC and the LicheePi Nano board has been in Linux for years, and U-Boot patches were posted mid last year already. The new SoC using ARMv5 also means that the bulk of the new code should not touch any existing boards, although we did some refactorings first, of course, which actually cleans up some existing sunxi code. Compile tested for all 160 sunxi boards, and briefly tested on BananaPi M1, OrangePi Zero, Pine64 and Pine-H64. Tested by others on their boards, including F1C100s and F1C200s devices.
2022-02-04configs: sunxi: Add support for Lichee Pi NanoIcenowy Zheng3-6/+20
The Lichee Pi Nano is a board based on the F1C100s. Add defconfigs for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04ARM: dts: suniv: Add device tree files and bindings for F1C100sIcenowy Zheng6-0/+282
Add device tree files for suniv and Lichee Pi Nano it is a board based on F1C100s. dt-bindings/dts are synced with 5.16.0 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04mach-sunxi: Add support for SUNIV architectureIcenowy Zheng5-31/+105
Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04configs: sunxi: Add common SUNIV headerIcenowy Zheng2-15/+56
Adds support for SUNIV and the F1C100s. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04sunxi: board: Add support for SUNIVIcenowy Zheng1-2/+2
Generic Timer Extension is not available on SUNIV. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04sunxi: Add F1C100s DRAM initial supportIcenowy Zheng5-0/+474
Add support for F1C100s internal dram controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04ARM: sunxi: Add clock and uart to sunxi headersIcenowy Zheng4-1/+21
This patch aims to add header files for the suniv. The header files included add support for uart, and clocks. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04arm: arm926ej-s: Add sunxi codeIcenowy Zheng6-0/+106
Some Allwinner SoCs use ARM926EJ-S core. Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04mach-sunxi: Move timer code to mach folderJesse Taube3-4/+7
Both armv7 and arm926ejs use this timer code so move it to mach-sunxi. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04arm: arm926ej-s: start.S: port save_boot_params support from armv7 codeIcenowy Zheng1-0/+19
The ARMv7 start code has support for saving some boot params at the entry point, which is used by some SoCs to return to BROM. Port this to ARM926EJ-S start code. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04sunxi-common.h: remove pointless #ifdefsAndre Przywara1-7/+0
Remove some pointless #ifdefs from this file, as there are quite too many of them already. Some definitions don't really hurt to have in any case, so remove the pointless CONFIG_MMC guard around CONFIG_MMC_SUNXI_SLOT. The BOARD_SIZE_LIMIT applies regardless of ARM64 or not (now), so remove that guard as well. The maximum number of MMC devices does not depend on CONFIG_ENV_IS_IN_MMC, so move that out to simplify the file. Last but not least CONFIG_SPL_BOARD_LOAD_IMAGE serves no real purpose anymore: it's unconditionally defined for all sunxi boards, and protects nothing applicable outside of sunxi code anymore. Just remove it. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04armv8: remove no longer needed lowlevel_init.SAndre Przywara3-48/+0
When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2022-02-04sunxi: move early "SRAM setup" into separate fileAndre Przywara4-32/+50
Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2022-02-04sunxi: move Cortex SMPEN setting into start.SAndre Przywara5-14/+20
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04sunxi: move non-essential code out of s_init()Andre Przywara1-13/+12
So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-03Merge branch '2022-02-03-assorted-fixes'Tom Rini50-422/+951
- Update CI image to have libgnutls available. - Assorted ARM and SPL bugfixes
2022-02-03treewide: Use 16-bit Unicode stringsSimon Glass4-15/+15
At present we use wide characters for Unicode but this is not necessary. Change the code to use the 'u' literal instead. This helps to fix build warnings for sandbox on the Raspberry Pi. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-02-03efi: Use 16-bit unicode stringsSimon Glass34-267/+267
At present we use wide characters for unicode but this is not necessary. Change the code to use the 'u' literal instead. This helps to fix build warnings for sandbox on rpi. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-02-03scripts/checkpatch.pl: Resync with v5.16Simon Glass3-96/+641
This resyncs us with the version found in v5.16 of the Linux kernel with the following exceptions: - Keep our u-boot specific tests / code area. - Change the location of checkpatch.rst - Drop the "use strscpy" test as we don't have that, but do have strlcpy and want that used now. - Keep debug/printf in the list for $logFunctions This also syncs the spdxcheck.py tool and all the associated documentation. S Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-03armv8: start.S: remove CONFIG_SYS_RESET_SCTRL codeAndre Przywara1-37/+0
There is some code that tries to "reset" the SCTLR_ELx register early in the boot process. The idea seems to be to guarantee some sane settings that U-Boot actually relies on, for instance running in little-endian mode, with the MMU off initially. However the current code has multiple problems: - For a start, no platform or config defines the symbol that would enable that code. - The code itself really only works if the bits that it tries to clear are already cleared: - If we run in big-endian mode initially, any previous loads would have been wrong already. That applies to the (optional) relocation code, but more prominently to the mask that it uses to clear those bits: "ldr x1, =0xfdfffffa" looks innocent, but actually involves a memory access to the literal pool, using the current endianness. - If we run with the MMU enabled, we are probably doomed already. We *could* hope that we are running with an identity mapping, but would need to do some cache maintenance to avoid losing dirty cache lines. - The idea of doing a read-modify-write of SCTLR is somewhat questionable to begin with, because as the owner of the current exception level we should initialise all bits of this register with a certain fixed value. - The code is unnecessarily complicated, and the function name is misspelled. While those problems *could* admittedly be fixed, the point that is does not seem to be used at all at the moment tells me we should just remove this code, and be it to not give a bad example. If people care, I could introduce some proper SCTLR initialisation code. We are about to work this out for the boot-wrapper[1] as we speak, but apparently we got away without doing this in U-Boot ever since, so it might not be worth the potential trouble. [1] https://lore.kernel.org/linux-arm-kernel/20220114105653.3003399-7-mark.rutland@arm.com/ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-03scripts: Makefile: also clean subdir dtcPhilippe Reynes1-1/+1
Since commit 93b196532254 ("Makefile: Only build dtc if needed"), the sub directory scripts/dtc is never cleaned. Adds the directory dtc to subdir to always clean it. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-03net: ti: am65-cpsw: Cleanup resources before jump to kernelVignesh Raghavendra1-1/+1
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA resources are not released thus leading to failures in kernel. Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port driver. Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-02-03arm: pdu001: Exend the list of maintained filesFelix Brack1-1/+3
Add the PDU001 board specific DT files to MAINTAINERS. This should help for better tracking of changes to these files. Signed-off-by: Felix Brack <fb@ltec.ch>
2022-02-03armv8: spl: Fix build with LINUX_KERNEL_IMAGE_HEADERAlper Nebi Yasak1-0/+4
Setting LINUX_KERNEL_IMAGE_HEADER=y attempts to include an ARM64 Linux kernel image header at the start of both U-Boot proper and SPL binaries. However, some definitions that the image header uses are not included by the SPL linker script, resulting in a build error. Include them the way they are included in U-Boot proper's linker script to fix the error. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-02-03spl: ymodem: Fix buffer overflow during Image copyVignesh Raghavendra1-1/+14
ymodem_read_fit() driver will end copying up to BUF_SIZE boundary even when requested size of copy operation is less than that. For example, if offset = 0, size = 1440B, ymodem_read_fit() ends up copying 2KB from offset = 0, to destination buffer addr This causes data corruption when malloc'd buffer is passed during UART boot since commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images") With this, UART boot works again on K3 (AM654, J7, AM64) family of devices. Fixes: 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-02-03Dockfile, CI: Update to latest focal tag and buildTom Rini3-3/+3
- Latest focal tag - Add libgnutls to image Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-03Dockerfile: Add libgnutls package for building mkeficapsule commandAKASHI Takahiro1-0/+2
For adding signing feature for capsule authentication to the host tool, mkeficapsule, we will link gnutls library for crypto operation. Since we need this command to complete the capsule authentication test on sandbox in CI loop, necessary packages must be installed on the host. See my patch, "tools: mkeficapsule: add firmware image signing." Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2022-02-02Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqWIP/02022022Tom Rini53-138/+2028
Update and fixes for ls1088a, FMAN, ls1046ardb, ls1043ardb sync ls1028ardb u-boot and Linux device-tree
2022-02-01Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flashWIP/01Feb2022Tom Rini1-0/+3
- cfi_mtd: populate mtd->dev with flash_info->dev (Patrice)
2022-02-01mtd: cfi_mtd: populate mtd->dev with flash_info->devPatrice Chotard1-0/+3
Populate mtd->dev with flash_info->dev which allows to get full mtd information using the "mtd list" command. Before, "mtd list" command returns : List of MTD devices: * nor0 - type: NOR flash - block size: 0x40000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" After this patch we get for example: List of MTD devices: * nor0 - device: flash@0 - parent: spi@40430000 - driver: cfi_flash - path: /soc/spi@40430000/flash@0 - type: NOR flash - block size: 0x40000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-01board: ls1046ardb: force PCI device enumerationMartin Schiller1-0/+4
Commit 045ecf899252 ("configs: enable DM_ETH support for LS1046ARDB") resulted in the PCI bus no longer being implicitly enumerated. However, this is necessary for the fdt pcie fixups to work. Therefore, similar to commit 8b6558bd4187 ("board: ls1088ardb: transition to DM_ETH"), pci_init() is now called in the board_init() routine when CONFIG_DM_ETH is active. Signed-off-by: Martin Schiller <ms@dev.tdt.de> CC: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01board: ls1088a: update ifc node name to be memory-controllerJianpeng Bu1-5/+5
IFC-NOR and QSPI are muxed on SoC. So disable IFC node in dts if QSPI is enabled or disable QSPI node in dts in case QSPI is not enabled. "ifc/nor" will be changed to "memory-controller/nor" in linux. So need to modify "ifc/nor" to "memory-controller/nor" in fdt_path_offset(). Signed-off-by: Jianpeng Bu <jianpeng.bu@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01configs: fsl: add missing FMAN/QE_FW_ADDR definesCamelia Groza4-0/+4
The initial patch had typos that caused four defconfigs to miss the symbol transition to Kconfig. CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_FMAN_FW_ADDR are currently initialized to 0 by default on these builds, which prevents the firmware from loading. Add the correct symbols to these defconfigs. Fixes: a97a071d10d2b ("configs: fsl: migrate FMAN/QE specific defines to Kconfig") Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01arm: dts: ls1028a-qds: declare in-band autoneg for Ethernet portsVladimir Oltean6-0/+18
The commit in the Fixes: tag below broke traffic through switch ports where the SERDES protocol requires in-band autoneg and this requirement isn't described in the device tree: SGMII, QSGMII, USXGMII (with 2500Base-X, in-band autoneg isn't supported). The LS1028A-QDS boards are not yet ready for syncing their device trees with Linux, since Ethernet is missing there (but has been submitted): https://lore.kernel.org/lkml/20211112223457.10599-11-leoyang.li@nxp.com/ When agreement is reached for the Ethernet support in Linux, there will be a sync for these boards as well. For now, just enable in-band autoneg to fix the breakage. Fixes: e3789a726269 ("net: dsa: felix: configure the in-band autoneg property based on OF node info") Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.1 at 2024-07-14 02:52:23 +0000