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The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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GPMC stands for General Purpose Memory Controller and it is
present on many Texas Instruments SoCs.
It supports a number of Asynchronous and Synchronous interfaces
and has various settings to configure the bus interface.
The DT bindings define all the various GPMC settings.
As the GPMC supports multiple devices on the bus, each
device is represented as a child and the respective
GPMC settings are situated there. (see ti,gpmc-child.yaml)
These binding docs are picked up from the Linux kernel.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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Introduce CONFIG_SPL_MEMORY to allow Memory drivers to
be built for SPL.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Introduce UCLASS_MEMORY for future Memory Controller
device drivers.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The version used on Ubuntu 2022.04 produces a number of warnings:
/usr/lib/python3/dist-packages/pkg_resources/__init__.py:116:
PkgResourcesDeprecationWarning: 1.16.0-unknown is an invalid version
and will not be supported in a future release
Same with: 0.1.43ubuntu1 11.4.1ubuntu1 2.22.1ubuntu1 1.1build1
According to [1] this is a bug in setuptools. Employ the workaround for
now.
[1] https://askubuntu.com/questions/1406952/what-is-the-meaning-of-this-
pkgresourcesdeprecationwarning-warning-from-pipenv
Signed-off-by: Simon Glass <sjg@chromium.org>
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The "common.h" header is not covered by the licensing exception for
standalone applications. Let's drop inclusion of this header from the
hello_world example to prove that a standalone app can be built without
it.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
Denk which clarified the intended licensing exceptions for standalone
applications. As the "export.h" header and the "stubs.c" source files
are required to implement a standalone application, the intention was
that these files be covered by the licensing exception. This is made
clear in the following quotes from that email:
"exports.h" should be added to the "allowed" file list; there should
be no need to include "common.h". Eventually this needs fixing.
Patches are welcome.
"examples/standalone/stubs.c" should be added to the "allowed" file
list (the ppc_*jmp.S files are LGPLed).
There should be no doubts - the intention is clear, the current state
may need improvement. Help (read: patches) welcome.
[1]: https://lists.denx.de/pipermail/u-boot/2010-January/067174.html
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
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Fix SHA512 config name and add missing SHA384 config.
Signed-off-by: Benjamin Bara <Benjamin.Bara@skidata.com>
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OMAP3 BeagleBoard NAND boot hangs when spl_load_legacy_img() tries
to read the header into 'struct hdr' which is allocated on the
stack.
As the header has already been read once before by spl_nand.c,
we can avoid the extra header read here by simply passing around
the pointer to the header.
This fixes NAND boot on OMAP3 BeagleBoard.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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Just like we exclude data-size, data-position, and data-offset from
fit_config_check_sig, we must exclude them while signing as well.
While we're at it, use the FIT_DATA_* defines for fit_config_check_sig
as welll.
Fixes: 8edecd3110e ("fit: Fix verification of images with external data")
Fixes: c522949a29d ("rsa: sig: fix config signature check for fit with padding")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
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Avoid concatenation with following message.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.
The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.
It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.
Fixes: 11406b8f7e ("dm: regulator: support regulator more state")
Signed-off-by: John Keeping <john@metanate.com>
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- Add s28hl512t, s28hl01gt (Takahiro)
- Rework s25hx_t_post_bfpt_fixup() (Takahiro)
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Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between what is in the SPI NOR and what is being written,
copy new data at offset of the compare buffer, and write back the entire
erase block.
This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at
offset 0x400 in the SPI NOR, while the SPI NOR may have erase block
size e.g. 0x1000 bytes.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20221024
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916
- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
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This change enables Cryptographic Accelerator and Assurance Module.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
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Enable boot/bootd command in toradex colibri-imx7 defconfig,
it's just convenient to have it in and every other toradex board
already includes it.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Avoid the following build errors after the device tree sync:
drivers/spi/mxs_spi.c: In function ‘mxs_spi_probe’:
drivers/spi/mxs_spi.c:327:25: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘spi_max_frequency’
327 | priv->max_freq = dtplat->spi_max_frequency;
| ^~
drivers/spi/mxs_spi.c:328:23: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘num_cs’
328 | plat->num_cs = dtplat->num_cs;
| ^~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
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Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.
This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3. Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.
This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
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Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
So apply the fix from 290ffe5788 once again.
Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
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This change initializes Cryptographic Accelerator and Assurance Module.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
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CAAM is initialized in SPL, so relevant device tree nodes needs to be
updated.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
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- enable bootcount command
- enable CRC32 and MD5
- enable time commands
- enable GPIO LED support
- enable further eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- enable USB host functionality
- enable thermal management unit driver
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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- enable bootcount command
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus again:
- loadaddr=0x48200000 allows for 128MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Note that this corrects a pre-maturely applied version 2 of the same
patch set.
Fixes: bbe0089d29e ("verdin-imx8mm: verdin-imx8mp: update env memory layout")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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