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2020-07-28Convert CONFIG_SPL_NAND_BASE et al to KconfigAdam Ford85-40/+69
This converts the following to Kconfig: CONFIG_SPL_NAND_BASE CONFIG_SPL_NAND_IDENT Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28Convert CONFIG_SPL_NAND_DRIVERS et al to KconfigAdam Ford87-72/+142
This converts the following to Kconfig: CONFIG_SPL_NAND_DRIVERS CONFIG_SPL_NAND_ECC CONFIG_SPL_NAND_SIMPLE Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-28Convert CONFIG_ENV_OVERWRITE to KconfigAdam Ford979-354/+783
This converts the following to Kconfig: CONFIG_ENV_OVERWRITE Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rerun migration, remove some comments] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28Merge branch '2020-07-28-update-azure-tests'Tom Rini1-16/+6
- Update Azure to fix some recent issues with Windows host tool builds
2020-07-28configs: Resync with savedefconfigTom Rini1005-1309/+1049
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28azure: Switch to use the MSYS2 official installer as the CI baseBin Meng1-2/+3
Recent CI failures were seen [1] when building MSYS2 Windows host tools. The error messages are something like: downloading mingw32.db... downloading mingw32.db.sig... error: mingw32: key "4A6129F4E4B84AE46ED7F635628F528CF3053E04" is unknown error: mingw32: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust error: failed to update mingw32 (invalid or corrupted database (PGP signature)) Per the MSYS2 official news [2], this was caused by a packager switch and several solutions were suggested, e.g.: a new package of msys2-keyring and a new msys2 installer that includes them are released. However right now we have been using the MSYS2 github CI base repo [3] for the MSYS2 build in U-Boot, but per the project information on the github webpage, it says: "This repository is unused/deprecated and will be remove after 2021-01-01". Since it is unmaintained it's unlikely the new PGP keys will be included in the git repo, and the only choice is to switch to use the MSYS2 official installer as the CI base instead. [1] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=975 [2] https://www.msys2.org/news/#2020-06-29-new-packagers [3] https://github.com/msys2/msys2-ci-base Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28azure: Add the missing build dependency for MSYS2 buildBin Meng1-1/+1
Package 'flex' is needed when building the U-Boot host tool, but is currently missing in the build dependency in the CI pipeline. This is to prepare switching to an installer based CI build. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28azure: Drop 32-bit MSYS2 buildBin Meng1-12/+4
As of 2020-05-17, 32-bit MSYS2 is no longer actively supported by the upstream [1]. Let's drop the 32-bit Windows host tool build. [1] https://www.msys2.org/news/#2020-05-17-32-bit-msys2-no-longer-actively-supported Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28azure: Use a login shell everywhere for MSYS2 buildBin Meng1-5/+2
This simplifies things a bit to just use a login shell everywhere. This keeps in sync with MSYS2 upstream commit: 9d11b7f0aa93 ("azure-pipelines: simplify things a bit"). Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-27Prepare v2020.10-rc1v2020.10-rc1Tom Rini1-2/+2
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-27Merge tag 'u-boot-amlogic-20200727' of ↵Tom Rini2-4/+50
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Handle errors in Meson serial driver - Enable HDMI, keyboard and ADC for Odroid-C2
2020-07-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini181-1084/+2317
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
2020-07-27travis: Install pyelftools via pipTom Rini1-1/+1
With the migration to python3 for all of our tests, we need to install pyelftools via pip now rather than the system tools as they will otherwise not be present in our virtualenv. Signed-off-by: Tom Rini <trini@konsulko.com> --- Changes in v2: Switch to pip
2020-07-27Merge tag 'dm-pull-20jul20-take2a' of ↵Tom Rini321-656/+2548
https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
2020-07-27configs: odroid-c2: update for HDMI output, ADC & USB keyboardAnand Moon1-0/+11
Enable options to permit HDMI output on Odroid-C2 GXBB boards. Enable VPU Power Domain. Enable ADC and USB_KERBOARD. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
2020-07-27serial: meson: handle RX errorsNeil Armstrong1-4/+39
This checks and handles RX errors on the Amlogic UART controller after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A lines are not connected. When the RX line is not connected, the first byte is erroneous and breaks the U-Boot autoboot, breaking automatic boot. This checks and drops any erroneous RX byte on pending and getc callbacks to avoid returning true to pending when an error byte is in the FIFO. Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
2020-07-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini24-1/+4461
- R8A774A1 / Beacon EmbeddedWorks RZG2M Dev Kit support
2020-07-27Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini27-278/+366
- Convert dc2114x driver to DM.
2020-07-27Merge branch '2020-07-27-misc-env-improvements'Tom Rini12-24/+166
- Assorted environment fixes. - Enhance environment in MMC and controlled via OF_CONTROL - Allow for environment in FAT to use the same device we boot from rather than be hard-coded.
2020-07-27configs: ls2088a: Restore CONFIG_ENV_ADDR to IFC-NORKuldeep Singh1-2/+1
Restore CONFIG_ENV_ADDR value to fix boot hang with IFC-NOR which is default boot source. Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm: dts: ls1028a: Add dspi flash device node to qdsZhao Qiang1-0/+74
Add dspi flash device node to fsl-ls1028a-qds.dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27configs: lx2160a: Enable Watchdog supportZhao Qiang2-0/+6
Enable support to compile SBSA driver. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm64: lx2160a: dts: Add watchdog nodeZhao Qiang1-0/+7
Add watchdog node which is sbsa into lx2160a dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27Watchdog: introduce ARM SBSA watchdog driverZhao Qiang4-0/+142
According to Server Base System Architecture (SBSA) specification, the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0) is for alerting the system by interrupt, the second one (WS1) is a real hardware reset. More details about the hardware specification of this device: ARM DEN0029B - Server Base System Architecture (SBSA) This driver can operate ARM SBSA Generic Watchdog as a single stage In the single stage mode, when the timeout is reached, your system will be reset by WS1. The first signal (WS0) is ignored. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci: layerscape: Add specific config entry for RC and EP mode driverHou Zhiqiang106-117/+155
Add Root Complex and Endpoint mode specific config entries, such that it's feasible to enable the RC and/or EP mode driver indepently. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci_ep: layerscape: Add the PCIe EP mode support for lx2160a-v2Xiaowei Bao2-2/+15
Add the PCIe EP mode support for lx2160a-v2 platform. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci: layerscape: Modify the ls_pcie_dump_atu functionXiaowei Bao4-14/+18
Modify the ls_pcie_dump_atu function, make it can print the INBOUND windows registers. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci_ep: layerscape: Add the SRIOV VFs of PF supportXiaowei Bao3-13/+42
Add the INBOUND configuration for VFs of PF. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci_ep: layerscape: Add Support for ls2085a and ls2080a EP modeXiaowei Bao1-5/+13
Due to the ls2085a and ls2080a use different way to set the BAR size, so add the BAR size init code here. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci_ep: layerscape: Add the workaround for errata A-009460Xiaowei Bao1-0/+9
The VF_BARn_REG register's Prefetchable and Type bit fields are overwritten by a write to VF's BAR Mask register. workaround: Before writing to the VF_BARn_MASK_REG register, write 0b to the PCIE_MISC_CONTROL_1_OFF register. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pcie_ep: layerscape: Add the multiple function supportXiaowei Bao3-48/+98
Add the multiple function support for Layerscape platform, some PEXs of Layerscaple platform have more than one PF. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27armv8: dts: ls1046a: Add the PCIe EP nodeXiaowei Bao1-0/+33
Add the PCIe EP node for ls1046a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci_ep: Add the init functionXiaowei Bao3-0/+24
Some EP deivces need to initialize before RC scan it, e.g. NXP layerscape platform, so add the init function in pci_ep uclass. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27pci: layerscape: Split the EP and RC driverXiaowei Bao6-497/+735
Split the RC and EP driver, and reimplement the EP driver base on the EP framework. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm: dts: lx2160a: Increase configuration window sizeWasim Khan1-6/+6
lx2160a rev2 requires 4KB space for type0 and 4KB space for type1 iATU window. Increase configuration size to 8KB to have sufficient space for type0 and type1 window. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27configs:ls1046afrwy: Add tfa secure boot defonfigManish Tomar2-0/+73
Add TFA secure boot defconfig and Enables secure boot related configs in it. Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27freescale: ls1043aqds: drop ifdef CONFIG_SYS_I2CBiwen Li1-2/+4
- Drop ifdef CONFIG_SYS_I2C to initialize baudrate of i2c - Drop warning of i2c_early_init_f as follows, warning: implicit declaration of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'? [-Wimplicit-function-declaration] Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27freescale: ls1043aqds: enable secure system counterBiwen Li1-1/+7
Enable secure system counter in board_early_init_f for udelay() to fix a bug that always return 0 by timer_read_counter() when boot from qspi(No TFA) Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27freescale: ls1046aqds: drop ifdef CONFIG_SYS_I2CBiwen Li1-2/+4
- Drop ifdef CONFIG_SYS_I2C to initialize baudrate of i2c - Drop warning of i2c_early_init_f as follows, warning: implicit declaration of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'? [-Wimplicit-function-declaration] Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27freescale: ls1046aqds: enable secure system counterBiwen Li1-1/+7
Enable secure system counter in board_early_init_f for udelay() to fix a bug that always return 0 by timer_read_counter() when boot from qspi(No TFA) Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27i2c: mxc: move i2c_early_init_f to common functionBiwen Li1-68/+70
Move i2c_early_init_f to common function to initialize baudrate of i2c Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: add RNG supportMichael Walle6-0/+125
Register the random number generator with the rng subsystem in u-boot. This way it can be used by EFI as well as for the 'rng' command. Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: instantiate the RNG with prediciton resistanceMichael Walle5-11/+79
If it is already instantiated tear it down first and then reinstanciate it again with prediction resistance. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: don't regenerate secure keysMichael Walle4-7/+9
The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a POR. Otherwise the RNG4 will throw an error. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: support newer SEC modulesMichael Walle2-9/+54
Since Era 10, the version registers changed. Add the version registers and use them on newer modules. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: export caam_get_era()Michael Walle2-1/+11
We need the era in other modules, too. For example, to get the RNG version. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: make SEC%u status line consistentMichael Walle1-7/+7
Align the status line with all the other output in U-Boot. Before the change: DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on) SEC0: RNG instantiated WDT: Started with servicing (60s timeout) After the change: DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on) SEC0: RNG instantiated WDT: Started with servicing (60s timeout) Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: unused value in caam_hash_update()Heinrich Schuchardt1-1/+1
The value 0 assigned to final is overwritten before ever being used. Remove the assignment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27crypto/fsl: correct printf() statement.Heinrich Schuchardt1-2/+2
The sequence of arguments should match the format string. For printing unsigned numbers we should use %u. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm64: ls1043a: Remove the workaround of erratum A-009929Hou Zhiqiang2-19/+0
The workaround has been implemented in PBI phase, so remove the duplicated implementation from U-Boot. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.1 at 2024-08-12 20:33:31 +0000