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2019-02-02Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchipTom Rini109-6775/+7516
u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS properties * documentation improvements * I2S support for some Rockchip SoCs
2019-02-02Merge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mipsTom Rini21-282/+1410
- MIPS: mscc: jr2: small fixes - MIPS: mscc: luton: add ethernet and switch driver - MIPS: mt76xx: fix timer frequency
2019-02-02Merge branch '2019-02-01-master-imports'Tom Rini138-566/+1143
- Various TI platforms have been updated and DTS files re-synced and options disabled if not used or migrated to the DM versions - Improvements to the dumpimage tool - Rename SPL FAT/EXT filesystem support symbols for consistency and then allow them to be used to save more space in SPL. - More lmb fixes - Partial migration of CONFIG_BUILD_TARGET
2019-02-02Kconfig: set default BUILD_TARGET for kirkwoodChris Packham9-8/+1
Now that BUILD_TARGET is in Kconfig we can define a default for boards using the Kirkwood SoC. Signed-off-by: Chris Packham <judge.packham@gmail.com> Cc: Jagan Teki <jagan@amarulasolutions.com>
2019-02-02Kconfig: Migrate CONFIG_BUILD_TARGETJagan Teki20-29/+21
Migrate CONFIG_BUILD_TARGET into Kconfig. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-02-02test: lib: lmb: add lmb test for multiple RAM banksSimon Goldschmidt1-19/+75
This adds one test case that checks that allocation with multiple DRAM banks works correctly. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-02lmb: handle more than one DRAM BANKSimon Goldschmidt5-13/+41
This fixes the automatic lmb initialization and reservation for boards with more than one DRAM bank. This fixes the CVE-2018-18439 and -18440 fixes that only allowed to load files into the firs DRAM bank from fs and via tftp. Found-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-01tools: dumpimage: Clarify helpMartyn Welch1-3/+4
Help message isn't clear over the use of the "-T" option (it's to declare the type of image that the tool is operating on), which also is optional as it defaults to the default image type. It's also missing a description of the "-o" option, so add it. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-02-01tools: dumpimage: Add help option and make error paths consistentMartyn Welch1-5/+13
The utility dumpimage has error paths that display the usage and others that exit without displaying usage. Add an explicit help option to dumpimage to display the usage and remove it's use in error paths to make the error messages more obvious and errors paths more consistent. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-02-01tools: dumpimage: Simplify internal logicMartyn Welch1-48/+37
There are 3 supported modes of operation: 1) Show version 2) List image contents 3) Extract image component Option (1) terminates early, so only options (2) and (3) remain. Remove redundant check for these modes. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-02-01tools: dumpimage: Simplify argumentsMartyn Welch1-14/+11
The dump image utility has very confusing syntax. If called to list image contents ("-l") it takes the image name as a positional argument. If the utility is called to extract something from the image, the image must be provided via the optional argument "-i" as well as the positional argument but the value passed in the positional argument will be completely ignored. Simplify dumpimage by always providing the image as the first positional argument. Assume we want to dump something from the image if we do not provide the "-l" option for now. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-02-01tools: dumpimage: Provide more feedback on errorMartyn Welch1-2/+9
The dumpimage utility errors out in a number of places without providing sufficient feedback to allow the user to easily determine what they have done wrong. Add addtional error messages to make the cause of the failure more obvious. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-02-01regulator: pbias: Handle extended drain IO when changing omap36 PBIASAdam Ford1-2/+47
The OMAP36 and DM37 TRM state to disable extneded drain IO before changing the PBIAS. This patch does this before pmic writes if the CONFIG_MMC_OMAP36XX_PINS flag is set and the cpu family is omap36xx Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-01rockchip: rk3399: spl: ensure that debug_uart_init is calledPhilipp Tomsich1-2/+2
With the latest changes to add support for the Chromebook Bob, initialisation through debug_uart_init() did no longer get called for other targets. Fix this, by moving debug_uart_init() out of the Bob-specific Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3399-puma: enable SPL_ATF_NO_PLATFORM_PARAMPhilipp Tomsich1-0/+1
As we're working on the next update of our ATF (and U-Boot and the ATF are out-of-sync), let's temporarily enable SPL_ATF_NO_PLATFORM_PARAM to reduce compatibility issues. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: Kconfig: fix missing include of rockchip/KconfigPhilipp Tomsich1-0/+1
After the merge of the new, generic pinctrl-code, the include for rockchip/Kconfig was missing. Add it here, so we can select the pinctrl-driver for SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: Kconfig: sort includes alphabeticallyPhilipp Tomsich1-5/+5
To make adding new subdirectories easier, let's enforce alphabetical ordering of the includes of Kconfig files in the respective subdirectories. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add MAINTAINER entry for chromebook_speedyPhilipp Tomsich1-0/+7
This adds a MAINTAINER entry for chromebook_speedy. Without this, we get the following warnings from the maintainers check: WARNING: no status info for 'chromebook_minnie' WARNING: no maintainers for 'chromebook_minnie' Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add support for chromebook_bobSimon Glass10-3/+215
Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports for both power and external display. It includes a Chrome OS EC (Cortex-M3) to provide access to the keyboard and battery functions. Support so far includes only: - UART - SDRAM - MMC, SD card - Cros EC (but not keyboard) Not included: - Keyboard - Display - Sound - USB - TPM Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support for this is not provided in this series. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: gru: Add extra device-tree settingsSimon Glass3-4/+19
Add some U-Boot-specific settings. These should really go in the *u-boot.dtsi file, but it seems that rk3399 does not use that yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Implement spl_gpio in the GPIO driverSimon Glass2-0/+69
Allow rockchip boards to use GPIOs before driver model is ready. This is really only useful for setting GPIOs to enable the early debug console, if needed on some platforms. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Move pull-up/down enum into a common fileSimon Glass2-7/+7
At present this enum is only available to rk3288. Move it so that other rockchip SoCs can access it. It is needed for the SPL GPIO driver for rk3999 in a later patch. Also adjust the enum name to lower case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set envSimon Glass1-0/+5
Some boards use different stdio environment variables from the default. Provide a #define for this which can be set before including the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Tidy up board include-file orderingSimon Glass7-13/+13
These board files have inconsistent #include ordering. Fix them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: clk: Add mention of four new clocksSimon Glass1-0/+12
These clocks are needed to get MMC running. We don't actually support setting them yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add settings for Samsung LPDDR3 4GB SDRAM 1866MHzSimon Glass1-0/+1542
This memory is used on Bob. Add settings for this, taken from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Allow booting from SPISimon Glass1-0/+3
The u-boot,spl-boot-device property only allows MMC at present. Add SPI as well for boards that boot from SPI flash. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Clarify docs on SPI writingSimon Glass1-1/+1
We use every second block when creating a SPI image, so update the text to say this explicitly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: evb_rk3399: Tidy up the READMESimon Glass1-12/+21
Add mention of a prerequisite needed to build the image. Also adjust the English wording in a few places. Ideally this should move to using binman to produce images, and avoid the manual steps. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Adjust rk3399 device tree to be closer to linuxSimon Glass1-61/+371
This file has changed upstream, with some additions and changes. Move the U-Boot version towards this. Some USB changes seem to be incompatible with how the bindings work on rockchip in U-Boot. Testing is needed to make sure that USB still works correct, and adjust the code (not device tree) if not. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Bring in device tree files for rk3399-gruSimon Glass5-0/+1757
Bring in these files from Linux v4.20. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Drop note about supporting other SoCsSimon Glass1-8/+1
Quite a wide range of Rockchip SoCs are supported in mainline U-Boot now, so drop the comment about needing to add more. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add mention of other boardsSimon Glass1-2/+42
At present some Rockchip SoCs and boards are not mentioned in the README. So that people can see which SoCs are supported, expand the list to include everything. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01gpio: Add a simple GPIO API for SPLSimon Glass1-0/+62
In space-constrained environments or before driver model is available, it is sometimes necessary to set GPIO values. Add an SPL API for this, to allow early board code to change GPIOs. The caller must provide the register address, so that the drivers can be fairly generic. This API can be implemented by GPIO drivers, behind a suitable guard, like #ifdef CONFIG_SPL_BUILD. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01gpio: Use more command-specific enums valuesSimon Glass1-14/+23
At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command values. These are pretty generic names. Add a 'C' suffix to avoid possible conflicts. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01clk: Improve debug message in clk_set_default_rates()Simon Glass1-2/+2
It is helpful to print the clock number as well as the index, so that this can be looked up in the binding file. Update the debug() statement to do this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01lib: Allow using display_buffer() in SPLSimon Glass1-1/+3
At present this function uses printf() format strings that are not supported in SPL, so the output just consists of %llx strings on 64-bit. machines. Fix this by adding a special case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: dts: rk322x: Correct the uart2 default pin configurationDavid Wu1-2/+9
To match the iomux setting of uart2 at SPL, correct the uart2 default pin configuration, if not changed, the evb-rk3229 can't output the log message. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Clean the unused rockchip pinctrl driversDavid Wu9-6387/+0
If we used the pinctrl-rockchip driver, these code is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: defconfig: Clean the unused pinctrl configDavid Wu29-43/+20
If we used the pinctrl-rockchip driver, these config is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Add common rockchip pinctrl driverDavid Wu15-100/+2531
Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rk3288: chrome: defconfig: Enable FDT for new pinctrl driverDavid Wu3-6/+0
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA and enable SPL_OF_LIBFDT to make FDT be built in. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: Remove the pinctrl request at rk3288-board-splDavid Wu1-79/+0
If we use the new pinctrl driver, the pinctrl setup will be done by device probe. Remove the pinctrl setup at rk3288-board-spl. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188David Wu1-1/+0
It seems that pinctrl is not requested for rk3188 SPL, remove it so that can save more space for SPL image size. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01ARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPLDavid Wu1-39/+2
When the boot ROM sets up MMC we don't need to do it again. Remove the MMC setup code entirely, but we also need to enable uart for debug message. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3399-evb: defconfig: Enable FDT for new pinctrl driverDavid Wu1-1/+0
The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA to make FDT be built in. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: add support for veyron-speedy (ASUS Chromebook C201)Marty E. Plummer7-1/+304
This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: dts: rk3399-firely: add 'same-as-spl'Mark Kettenis1-1/+1
Like on rk3399-puma we want to continue booting the fill U-Boot from the same device as the SPL stage. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Drop call to rockchip_dnl_mode_check() for nowSimon Glass1-1/+7
This function causes a 5-second delay and stops the display working on minnie. This code should be in a driver and should only be enabled by a device-tree property, so that it does not affect devices which do not have this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01sound: rockchip: Add sound support for jerrySimon Glass4-0/+21
Jerry uses a max98090 audio codec and the internal SoC I2S peripheral. Enable sound support and add the required device-tree pieces. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
generated by cgit v1.1 at 2024-08-12 20:36:45 +0000