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2021-09-23pci: Fix configuring io/memory base and limit registers of PCI bridgesWIP/2021-09-23-assorted-updatesPali Rohár1-10/+29
Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved and should be zero. So do not set them to non-zero value. Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers contain information if 64-bit memory addressing is supported. So preserve this information when overwriting these registers. Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information if 32-bit io addressing is supported. So preserve this information and do not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 registers) when it is unsupported. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-23arm: mediatek: merge board Kconfigs into mach-mediatekGuillaume La Roque13-134/+53
On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME variables from defconfig. This is because in board/mediatek/mtXXXX/Kconfig this value was override by default due to the if CONFIG_TARGET_MTXXXX condition. Merge all the Kconfigs to the mach-medatek/Kconfig. This way: - we only define SYS_{SOC,VENDOR} once - all board definitions are in a single place, simplifying the build logic. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
2021-09-23lmb: x86: Add arch_lmb_reserve()Marek Vasut1-0/+18
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: xtensa: Add arch_lmb_reserve()Marek Vasut1-0/+12
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Zankel <chris@zankel.net> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: sh: Add arch_lmb_reserve()Marek Vasut1-0/+16
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). This architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: riscv: Add arch_lmb_reserve()Marek Vasut1-0/+13
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Leo <ycliang@andestech.com> Cc: Rick Chen <rick@andestech.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: nds32: Add arch_lmb_reserve()Marek Vasut1-0/+13
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Reviewed-by: Rick Chen <rick@andestech.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Rick Chen <rick@andestech.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: nios2: Add arch_lmb_reserve()Marek Vasut1-0/+16
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: Remove imx board_lmb_reserve()Marek Vasut1-30/+0
This function is clearly architecture specific code, not board specific code. The only difference from the previous arm arch_lmb_reserve() is the extra reservation of 16k of memory below the stack bottom, rather than the 4k. The common code now also uses 16k alignment. Remove this custom implementation, as it now behaves exactly as the common code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Ye Li <ye.li@nxp.com>
2021-09-23lmb: arm: Increase LMB alignment to 16k in arch_lmb_reserve_generic()Marek Vasut1-1/+1
According to input NXP, the 4k alignment is not always sufficient. Currently iMX works around this problem by implementing board specific LMB reservation, however it is likely this could also occur on other systems. Increase the LMB reservation alignment to 16k by default. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23lmb: Switch to generic arch_lmb_reserve_generic()Marek Vasut6-117/+7
Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to arch_lmb_reserve_generic(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Wolfgang Denk <wd@denx.de>
2021-09-23lmb: Add generic arch_lmb_reserve_generic()Marek Vasut2-0/+36
The arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() implementations are all mostly the same, except for a couple of details. Implement a generic arch_lmb_reserve_generic() function which can be parametrized enough to cater for those differences between architectures. This can also be parametrized enough so it can handle cases where U-Boot is not relocated to the end of DRAM e.g. because there is some other reserved memory past U-Boot (e.g. unmovable firmware for coprocessor), it is not relocated at all, and other such use cases. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23lmb: Always compile arch_lmb_reserve() into U-Boot on arcMarek Vasut2-30/+30
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even if CMD_BOOTM is not enabled. However, the arc variant of arch_lmb_reserve() is only compiled in if CMD_BOOTM is enabled. This currently does not trigger build error, because there is an empty weak implementation of arch_lmb_reserve(), however that is not the function that should be used on arc. Fix this by moving the arch_lmb_reserve() implementation into common code and always compile it in. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23lmb: Always compile arch_lmb_reserve() into U-Boot on armMarek Vasut2-45/+45
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even if CMD_BOOT{I,M,Z} is not enabled. However, the arm32/arm64 variant of arch_lmb_reserve() is only compiled in if CMD_BOOT{I,M,Z} is enabled. This currently does not trigger build error, because there is an empty weak implementation of arch_lmb_reserve(), however that is not the function that should be used on arm32/arm64. Fix this by moving the arch_lmb_reserve() implementation into common code and always compile it in. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-09-23image: add lz4 zstd compression magic mapArtem Lapkin1-0/+2
Add lz4 and zstd compression magic map. Already can decompress images with lz4 and zstd compression type. Signed-off-by: Artem Lapkin <art@khadas.com>
2021-09-23crc32: Add crc32 implementation using __builtin_aarch64_crc32bMarek Vasut3-1/+22
ARMv8.0 has optional crc32 instruction for crc32 calculation. The instruction is mandatory since ARMv8.1. The crc32 calculation is faster using the dedicated instruction, e.g. 1.4 GHz iMX8MN gives: => time crc32 0x50000000 0x2000000 time: 0.126 seconds # crc32 instruction time: 0.213 seconds # software crc32 Add implementation using the compiler builtin wrapper for the crc32 instruction and enable it by default, since we don't support any platforms which do not implement this instruction. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> [trini: Make crc32_table guarded by CONFIG_ARM64_CRC32] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-23armv8/cache.S: Triple with single instructionPierre-Clément Tosi1-2/+1
Replace the current 2-instruction 2-step tripling code by a corresponding single instruction leveraging ARMv8-A's "flexible second operand as a register with optional shift". This has the added benefit (albeit arguably negligible) of reducing the final code size. Fix the comment as the tripled cache level is placed in x12, not x0. Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-23armv8/cache.S: Read sysreg fields through ubfxPierre-Clément Tosi1-10/+6
Improve the file's readability and conciseness by using the appropriate Aarch64 instruction: ubfx (unsigned bitfield extract). This makes the code easier to follow as it directly manipulates the offsets and widths of the fields read from system registers, as they are expressed in the Standard (ARM ARM). This has the added benefit (albeit arguably negligible) of reducing the final code size. Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-23env: Make _init() expect _INVALID when _IS_NOWHEREPierre-Clément Tosi1-1/+1
Avoid applying the "fix" introduced by commit 5557eec01cbf ("env: Fix invalid env handling in env_init()") to the environment "nowhere". This is necessary as that commit, by setting the return value of env_init() to -ENOENT if gd->env_valid is ENV_INVALID, forces that function to reset gd->env_valid to ENV_VALID. By doing so, it breaks the assumption (required by ENV_IS_NOWHERE) that gd->env_valid must be ENV_INVALID. This, in turn, results in env_relocate() calling env_load() (it should not), which itself, calls U_BOOT_ENV_LOCATION(nowhere).load() i.e. env_nowhere_load(). That function, being implemented under the assumption mentioned above, calls env_set_default(), which in turn, seeing that gd->env_valid is ENV_VALID (it should not), tries to dereference whatever lies in gd->env_addr (most likely garbage), leading to a faulty memory access. Note that other env_locations might be concerned by this bug but that this commit only intends to fix it for when ENV_IS_NOWHERE. Fixes: 5557eec01cbf ("env: Fix invalid env handling in env_init()") Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-22Merge tag 'u-boot-at91-2022.01-a' of ↵Tom Rini41-659/+414
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2022.01 cycle: This feature set includes : the support for CPU driver for arm926 (sam9x60 device); changes required for OP-TEE boot for sama5d2_xplained and sama5d27_som1_ek boards; QSPI boot configuration for sama5d2_icp; starting to remove old Kconfig unused symbols from config_whitelist.txt (work will take more time); also small fixes and updates in mach, DT, configs, etc.
2021-09-22Merge branch '2021-09-22-general-updates' into nextTom Rini54-105/+294
- Some sandbox improvements - Make cleanups related to the overusage of the exact build time variable.
2021-09-21ARM: dts: at91: update flexcom defines using include fileEugen Hristev2-2/+4
Replace the number in the flexcom-mode property with the define from the include file. This corresponds to the approach in Linux kernel. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21include: dt-bindings: mfd: add atmel flexcom include fileEugen Hristev2-0/+16
Add dt-bindings include file for Atmel Flexcom hardware block. This file is copied from Linux kernel. It is used in devicetrees from Linux. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21net: remove unused CONFIG_DRIVER_AT91EMAC_*Eugen Hristev5-534/+0
AT91EMAC driver is unused, thus removing. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-21ARM: at91: remove references to RM9200DKEugen Hristev2-15/+0
The AT91 RM9200DK board was removed long time ago. Remove existing references that were not cleaned up. Fixes: 1c85752258 ("ARM: remove broken "at91rm9200dk" board") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21board: pm926x: remove unused CONFIG_SYS_AT91_CPU_NAMEEugen Hristev3-5/+0
CONFIG_SYS_AT91_CPU_NAME looks to be unused. Remove it and remove it from config_whitelist.txt Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21board: atmel: sama7g5ek: avoid rewriting of configured CONFIG_BOOTCOMMANDEugen Hristev3-1/+9
Rewrite the CONFIG_BOOTCOMMAND only if it's not previously configured from defconfig file. This allows the user to select from defconfig/menuconfig the desired boot command. Adjust the current board defconfigs to reflect the default booting command for the specific ENV configuration. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21configs: sama5d2: add qspi config for QSPI1Mihai Sain2-0/+104
Add new config for storing environment from QSPI1. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> [eugen.hristev@microchip.com: cleanup and add MAINTAINERS entry] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21ARM: dts: at91: sama5d2: fix dtc warning for ohci and ehciEugen Hristev4-8/+8
Fixed the following DTC build warning (reproducible with W=1) arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ohci@00400000: unit name should not have leading 0s arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ehci@00500000: unit name should not have leading 0s Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Alexander Dahl <ada@thorsis.com>
2021-09-21ARM: dts: at91: sama5d2_icp: cosmetic arrangement of the nodesEugen Hristev2-23/+25
Reorder the nodes following the kernel rules: nodes in a range are sorted by ascending bus address, and when referenced by phandle, are ordered alphabetically. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21ARM: dts: at91: sama5d2_icp: add QSPI1 deviceMihai Sain2-0/+45
Add support for sst26vf064b 64Mbit qspi-flash that is present on sama5d2_icp board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> [eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21board: sama5d2_xplained: Modify load addressesClément Léger1-14/+10
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved. This modification allows to have a system which always work even when OP-TEE is present. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21board: sama5d2_xplained: Get dram size and base from device treeClément Léger1-4/+7
In order to make it more flexible and allow modifying the base address of DRAM without recompiling U-Boot, use memory node from device tree with fdtdec functions. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21ARM: dts: at91: sama5d2_xplained: Add memory node in devicetreeClément Léger1-0/+4
sama5d2_xplained DRAM detection code will be modified to use device tree instead of hardcoded addresses. In order to prepare that, add the memory node to at91-sama5d2_xplained.dts. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21board: sama5d27_som1_ek: Modify load addressesClément Léger1-8/+4
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved. This modification allows to have a system which always work even when OP-TEE is present. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21board: sama5d27_som1_ek: Get dram size and base from device treeClément Léger1-4/+8
In order to make it more flexible and allow modifying the base address of DRAM without recompiling U-Boot, use memory node from device tree with fdtdec functions. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21ARM: mach-at91: armv7: fix multiple cpu_reset definition when enabling SYSRESETClément Léger1-1/+3
When SYSRESET is enabled, cpu_reset function is also defined in sysreset-uclass.c which lead to multiple definitions of this function since reset.c is build unconditionally. Add a check in Makefile to build this file only if SYSRESET isn't enabled. SYSRESET can be enabled when building SYSRESET_PSCI for instance on this platform. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21configs: gardena-smart-gateway-at91sam: Adjust to production valuesReto Schneider1-1/+14
This commit updates the default config with the values that will be used soon on the Atmel / Microchip AT91SAM9G25 based GARDENA smart gateway. Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-21configs: sam9x60ek: enable CONFIG_CPUClaudiu Beznea3-0/+3
Enable CONFIG_CPU for SAM9X60EK configs. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21ARM: dts: at91: sam9x60: add bindings for CPUClaudiu Beznea1-0/+12
Add bindings for CPU. This will allow displaying correctly the crystal, CPU and master clock. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21cpu: at91: add compatible for ARM9260EJ-SClaudiu Beznea1-0/+1
The crystal, CPU and master clock were not displayed correctly on SAM9X60 after adding CCF clock support. Add compatible for ARM926EJ-S to fix this. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21clk: at91: clk-master: split master clock in pres and dividerClaudiu Beznea4-50/+144
Split master clock in 2 controlling block: one for prescaler one for divider. This will allow referencing correctly the CPU clock and master clock in device trees. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21ARM: at91: Add chip ID of SAMA5D29Hari Prasath2-0/+3
Add SAMA5D29 SoC for identification during the boot up. Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
2021-09-17Remove including timestamp.h in version.hPali Rohár8-3/+12
Header file version.h does not use anything from timestamp.h. Including of timestamp.h has side effect which cause recompiling object file at every make run because timestamp.h changes at every run. So remove timestamp.h from version.h and include timestamp.h in files which needs it. This change reduce recompilation time of final U-Boot binary when U-Boot source files were not changed as less source files needs to be recompiled. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Add in lib/acpi/acpi_table.c and test/dm/acpi.c, rework a few others] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17version: Remove global macro U_BOOT_VERSION_STRING from version.hPali Rohár3-12/+15
Version string is available in global variable char version_string[]. Macro U_BOOT_VERSION_STRING is not used by any other file, so remove it completely from version.h. Other files were already converted to use variable version_string[]. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17x86: quark: MRC: Remove U_BOOT_DATE and U_BOOT_TIME from debug logPali Rohár1-3/+1
U_BOOT_DATE and U_BOOT_TIME are updated on every run of make command. Therefore mrc.c file is recompiled every time when running make which means that whole U-Boot binary is recompiled on every run of make command. Simplify it and do not recompile U-Boot binary on every run of make command by not depending on macros U_BOOT_DATE and U_BOOT_TIME. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-17version: Do not make version_string[] variable as a weakPali Rohár1-1/+1
There is no platform which needs to overload version_string[] variable, so remove weak symbol mark. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17powerpc: Drop version_string placement optimizationTom Rini3-16/+0
As explained by Wolfgang, historically PowerPC would do a number of things to hand-optimize placement of the binary on NOR flash in order to maximize utilization of very scarce resources. These days, we simply aren't optimizing our binary layout for NOR flash placement and it's quite likely this wasn't working as intended. Furthermore, this level of optimization makes it difficult to have version_string be a global, instead of a weak and overridden value, and so make more progress on reproducible builds, which is a current concern. Move to having PowerPC no longer store version_string in the early part of text so that it might be part of the first page of NOR and instead use the same declaration everyone else does. Link: https://lore.kernel.org/r/96716.1629798400@gemini.denx.de/ Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17m68k: mcf: Remove overloading version_stringPali Rohár6-26/+0
There is no need to overload version_string at the end of start.S files. Common implementation of version_string should be fine. Signed-off-by: Pali Rohár <pali@kernel.org> [trini: Keep the align, it's important for the rest of linkage] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17version: Move version_string[] from version.h to version_string.hPali Rohár11-12/+17
More C files do not use compile time timestamp macros and do not have to be recompiled every time when SOURCE_DATE_EPOCH changes. This patch moves version_string[] from version.h to version_string.h and updates other C files which only needs version_string[] string to include version_string.h instead of version.h. After applying this patch these files are not recompiled every time when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>