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2021-03-19Merge branch 'next' of git://source.denx.de/u-boot-sh into nextWIP/19Mar2021-nextTom Rini35-7/+1486
- New platforms and related support
2021-03-16board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar3-2/+6
Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar14-0/+796
The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: Add support for R8A774C0Lad Prabhakar5-0/+24
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.11Lad Prabhakar1-2/+85
Sync the R8A77990 SoC PFC tables with Linux 5.11 , commit f40ddce88593. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11Lad Prabhakar1-4/+23
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das6-2/+94
The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das6-2/+88
The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das8-0/+252
The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11Biju Das2-0/+61
Synchronize r8a774e1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11Biju Das2-0/+62
Synchronize r8a774b1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini313-2295/+13469
Prepare v2021.04-rc4
2021-03-15Prepare v2021.04-rc4v2021.04-rc4WIP/nextTom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-15configs: Resync with savedefconfigTom Rini25-25/+3
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-15Merge tag 'ti-v2021.04-rc4' of ↵WIP/15Mar2021Tom Rini8-2/+16
https://source.denx.de/u-boot/custodians/u-boot-ti - Fix boot for da850-evm and omap3_logic - Optimize SPL size for am65x boards
2021-03-15Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini45-177/+193
https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
2021-03-15Merge branch '2021-03-12-assorted-improvements' into nextTom Rini23-34/+407
- More log enhancements - A few warning fixes in some cases - Secure Channel Protocol 03 (SCP03) support for TEEs
2021-03-15configs: am65x_evm_r5: Enable checks for spl and stack sizesLokesh Vutla1-0/+5
Enable relevant configs that checks for the size of image and stack: BSS: 3KB Initial MALLOC: ~22KB Initial Stack: 8K SPL Image size can be: ~215KB Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-15include: configs: am65x_evm: Optimize size of SPL BSSLokesh Vutla1-1/+1
Current BSS allocation of SPL is as below: $ size spl/u-boot-spl text data bss dec hex filename 132369 7852 1496 141717 22995 spl/u-boot-spl But 20KB is allocated currently for BSS. Reduce it to 3KB and save some space for stack. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-15ARM: da850-evm: Fix boot issues from missing SPL_PAD_TOAdam Ford1-1/+5
In a previous attempt to unify config options and remove items from the whitelist file, SPL items were moved into a section enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO is referenced at the head Makefile and uses this define to create padding of the output file. When it was moved to CONFIG_SPL_BUILD, it caused boot errors with devices that are not booting from NOR. Fix the boot issues by moving SPL_PAD_TO out so it's always. Fixes: 7bb33e4684aa ("ARM: da850-evm: Unify config options with Kconfig") Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-15configs: omap3_logic: Enable CONFIG_SPL_ALLOC_BDAdam Ford5-0/+5
With bd_info dropped from the data section, the Logic PD OMAP3 boards and AM3517 fail to boot. Enabling CONFIG_SPL_ALLOC_BD restores them. Fixes: 38d6b7ebdaee ("spl: Drop bd_info in the data section") Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-14test: py: add initial coverage for scp03 cmdIgor Opaniuk1-0/+27
Add initial test coverage for SCP03 command. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14sandbox: imply SCP03 and CMD_SCP03Igor Opaniuk1-0/+2
Enable by default SCP_03/CMD_SCP03 for sandbox target. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14doc: describe the scp03 commandJorge Ramirez-Ortiz2-0/+34
The Secure Channel Protocol 03 command sends control requests (enable/provision) to the TEE implementing the protocol between the processor and the secure element. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14drivers: tee: sandbox: SCP03 control emulatorJorge Ramirez-Ortiz2-1/+59
Adds support for a working SCP03 emulation. Input parameters are validated however the commands (enable, provision) executed by the TEE are assumed to always succeed. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13cmd: SCP03: enable and provision commandJorge Ramirez-Ortiz3-0/+63
Enable and provision the SCP03 keys on a TEE controlled secured elemt from the U-Boot shell. Executing this command will generate and program new SCP03 encryption keys on the secure element NVM. Depending on the TEE implementation, the keys would then be stored in some persistent storage or better derived from some platform secret (so they can't be lost). Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-03-13common: SCP03 control (enable and provision of keys)Jorge Ramirez-Ortiz5-0/+104
This Trusted Application allows enabling SCP03 as well as provisioning the keys on TEE controlled secure element (ie, NXP SE050). All the information flowing on buses (ie I2C) between the processor and the secure element must be encrypted. Secure elements are pre-provisioned with a set of keys known to the user so that the secure channel protocol (encryption) can be enforced on the first boot. This situation is however unsafe since the keys are publically available. For example, in the case of the NXP SE050, these keys would be available in the OP-TEE source tree [2] and of course in the documentation corresponding to the part. To address that, users are required to rotate/provision those keys (ie, generate new keys and write them in the secure element's persistent memory). For information on SCP03, check the Global Platform HomePage and google for that term [1] [1] globalplatform.org [2] https://github.com/OP-TEE/optee_os/ check: core/drivers/crypto/se050/adaptors/utils/scp_config.c Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13doc: sandbox: Update instructions on quittingSimon Glass1-1/+1
The 'reset' command now resets sandbox but does not quit it. Fix the instructions. Fixes: 329dccc0675 ("sandbox: implement reset") Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-13test: acpi: Fix warnings on 32-bit buildSimon Glass1-6/+6
Some format strings use the wrong type. Fix them. Example warnings: In file included from test/dm/acpi.c:22: test/dm/acpi.c: In function ‘dm_test_acpi_cmd_list’: test/dm/acpi.c:362:21: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat=] ut_assert_nextline("RSDP %08lx %06lx (v02 U-BOOT)", addr, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ sizeof(struct acpi_rsdp)); ~~~~~~~~~~~~~~~~~~~~~~~~ include/test/ut.h:282:33: note: in definition of macro ‘ut_assert_nextline’ if (ut_check_console_line(uts, fmt, ##args)) { \ ^~~ Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-13tpm: Correct warning on 32-bit buildSimon Glass1-1/+1
Fix the warning: drivers/tpm/tpm2_tis_sandbox.c: In function ‘sandbox_tpm2_xfer’: drivers/tpm/tpm2_tis_sandbox.c:288:48: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 2 has type ‘size_t’ {aka ‘unsigned int’} [-Wformat=] printf("TPM2: Unmatching length, received: %ld, expected: %d\n", ~~^ %d send_size, length); ~~~~~~~~~ Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-12tpm: Don't select LOGSimon Glass1-1/+0
We don't need to enable logging to run this command since the output will still appear. Drop the 'select'. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12log: Add return-checking macros for 0 being successSimon Glass2-1/+34
The existing log_ret() and log_msg_ret() macros consider an error to be less than zero. But some function may return a positive number to indicate a different kind of failure. Add macros to check for that also. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12log: Handle line continuationSimon Glass6-16/+60
When multiple log() calls are used which don't end in newline, the log prefix is prepended multiple times in the same line. This makes the output look strange. Fix this by detecting when the previous log record did not end in newline. In that case, setting a flag. Drop the unused BUFFSIZE in the test while we are here. As an example implementation, update log_console to check the flag and produce the expected output. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12log: Set up a flag byte for log recordsSimon Glass2-7/+16
At present only a single flag (force_debug) is used in log records. Before adding more, convert this into a bitfield, so more can be added without using more space. To avoid expanding the log_record struct itself (which some drivers may wish to store in memory) reduce the line-number field to 16 bits. This provides for up to 64K lines which should be enough for anyone. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12Merge branch '2021-03-12-test-improvements' into nextTom Rini46-446/+1407
- Assorted improvements to the pytest framework
2021-03-12doc: Explain briefly how to write new testsWIP/2021-03-12-test-improvementsSimon Glass5-1/+358
Add a second on writing tests, covering when to use Python and C, where to put the tests, etc. Add a link to the existing Python test documentation. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: sandbox: Move sandbox test docs into doc/developSimon Glass2-37/+51
At present some of the documentation about running sandbox tests is in the sandbox docs. It makes more sense to put it in with the other testing docs, with a link there from sandbox. Update the documentation accordingly. Also add a paragraph explaining why sandbox exists and the test philosophy that it uses. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12spl: test: Add a test for spl_load_simple_fit()Simon Glass6-2/+110
As an example of an SPL test, add a new test for loading a FIT within SPL. This runs on sandbox_spl. For this to work, the text base is adjusted so that there is plenty of space available. While we are here, document struct spl_load_info properly, since this is currently ambiguous. This test only verifies the logic path. It does not actually check that the image is loaded correctly. It is not possible for sandbox's SPL to actually run u-boot.img since it currently includes u-boot.bin rather than u-boot. Further work could expand the test in that direction. The need for this was noted at: http://patchwork.ozlabs.org/project/uboot/patch/20201216000944.2832585-3-mr.nuke.me@gmail.com/ Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12spl: Convert spl_fit to work with sandboxSimon Glass2-13/+17
At present this casts addresses to pointers so cannot work with sandbox. Update the code to use map_sysmem() instead. As part of this change, the existing load_ptr is renamed to src_ptr since it is not a pointer to load_addr. It is confusing to use a similar name for something that is not actually related. For the alignment code, ALIGN() is used instead of open-coded alignment. Add a comment to the line that casts away a const. Use a (new) load_ptr variable to access memory at address load_addr. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12sandbox: Update os_find_u_boot() to find the .img fileSimon Glass3-5/+8
At present this function can only locate the u-boot ELF file. For SPL it is handy to be able to locate u-boot.img since this is what would normally be loaded by SPL. Add another argument to allow this to be selected. While we are here, update the function to load SPL when running in TPL, since that is the next stage. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Allow SPL to run any available testSimon Glass4-18/+33
At present SPL only runs driver model tests. Update it to run all available tests, i.e. in any test suite. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Rename all linker lists to have a ut_ prefixSimon Glass2-5/+5
At present each test suite has its own portion of the linker_list section of the image, but other lists are interspersed. This makes it hard to enumerate all the available tests without knowing the suites that each one is in. Place all tests together in a single contiguous list by giving them common prefix not used elsewhere in U-Boot. This makes it possible to find the start and end of all tests. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Add a macros for finding tests in linker_listsSimon Glass14-32/+32
At present we use the linker list directly. This is not very friendly, so add a helpful macro instead. This will also allow us to change the naming later without updating this code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: log: Rename log main test file to log_ut.cSimon Glass2-1/+1
The current name is the same as the main test runner file. Rename it to avoid confusion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-12test: Move restoring of driver model state to ut_run_list()Simon Glass2-12/+29
Add this functionality to ut_run_list() so it can be removed from dm_test_run(). At this point all tests are run through ut_run_list(). Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Move the devicetree check into ut_run_list()Simon Glass2-13/+32
Add a check to ut_run_list() as to whether a list has driver model tests. Move the logic for the test devicetree into that function, in an effort to eventually remove all logic from dm_test_run(). Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Use return values in dm_test_run()Simon Glass1-8/+6
Update this function to use the return value of ut_run_list() to check for success/failure, so that they are in sync. Also return a command success code so that the caller gets what it expects. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Run driver-model tests using ut_run_list()Simon Glass3-93/+81
Use this function instead of implementing it separately for driver model. Make ut_run_tests() private since it is only used in test-main.c Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Use a local variable for test stateSimon Glass5-6/+47
At present we use a global test state for all driver-model tests. Make use of a local struct like we do with the other tests. To make this work, add functions to get and set this state. When a test starts, the state is set (so it can be used in the test). When a test finishes, the state is unset, so it cannot be used by mistake. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Add ut_run_test_live_flat() to run tests twiceSimon Glass3-44/+73
Driver model tests are generally run twice, once with livetree enable and again with it disabled. Add a function to handle this and call it from the driver model test runner. Make ut_run_test() private since it is not used outside test-main.c now. Signed-off-by: Simon Glass <sjg@chromium.org>
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