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2023-12-19get_maintainer.pl: Add --git to look up CCed in git historyWIP/19Dec2023Marek Vasut1-1/+1
Add the --git parameter, else recent contributors are left out of the CC list. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-19net: fix NetConsole documentation referenceBaruch Siach1-1/+1
Fixes: d0253f7e5ca1 ("doc: move README.NetConsole to HTML documentation") Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-12-19net: wget: Support non-default HTTP portMarek Vasut4-6/+16
Currently the wget command is hard wired to HTTP port 80. This is inconvenient, as it is extremely easy to start trivial HTTP server as an unprivileged user using e.g. python http module to serve the files, but such a server has to run on one of the higher ports: " $ python3 -m http.server -d $(pwd) 8080 " Make it possible to configure HTTP server port the same way it is possible to configure TFTP server port, using environment variable 'httpdstp' (similar to 'tftpdstp'). Retain port 80 as the default fallback port. This way, users can start their own trivial server and conveniently download whatever files they need into U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-12-19arm: dts: k3-am625-verdin: fix DDRSS configurationEmanuele Ghidoli1-75/+76
The current DDR subsystem configuration occasionally results in write failures, impacting memory stability, on Verdin AM62 Solo 512MB WB IT 0072 SKU. This commit addresses the issue by adjusting Drive Pull-Up/Down and Write Latency to improve the eye diagram and ensure reliable write operations. This configuration is shared with all Verdin AM62 SoM and it does not introduce regressions. Configurations changes from previous / default values: - Drive Pull-Up/Down from 40 to 34.3 Ohm - Write Latency from 8 to 10 - ODTLon / ODTLoff latency from 0 / 0 to 4 / 20 nCK - VREF control range 1 at 27 % - tFAW from 30 to 40 ns Configuration is output from SysConfig [1] web tool, currently at version 1.18.1+3343 (DDR SubSystem v9.10). [1] https://dev.ti.com/sysconfig Fixes: 7d1a10659f5b ("board: toradex: add verdin am62 support") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-12-19doc: Remove README.sha1 filePeter Robinson1-58/+0
The contents of README.sha1 only refer to process around verification of the pcs440ep board firmware in flash. The device was removed in commit 242836a893ae ("powerpc: ppc4xx: remove pcs440ep support") in 2015 so this readme isn't really relevant anymore so can be removed. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-18Prepare v2024.01-rc5v2024.01-rc5Tom Rini2-2/+2
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-15Merge tag 'clk-2024.01-rc5' of ↵WIP/15Dec2023Tom Rini8-12/+39
https://source.denx.de/u-boot/custodians/u-boot-clk clock changes for u-boot/master This has some clock fixes which should go in before the release. It's a bit late in the cycle, but most of these have tests to go along with them. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-12-15test: dm: clk_ccf: fix building errorYang Xiwen1-1/+2
Fix unused variable error produced by building tests Fixes: d3061824 (test: dm: clk_ccf: test ccf_clk_ops) Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216-b4-fix_build-v1-1-b8e79c94744f@outlook.com
2023-12-15test: dm: clk_ccf: test ccf_clk_opsYang Xiwen5-4/+17
Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an clk provider. Also add "#clock-cells=<1>" to its device tree node. Add "i2c_root" to clk_test in the device tree and driver for testing. Get "i2c_root" clock in CCF unit tests and add tests for it. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com
2023-12-15dm: test: clk: Add test for ccf clk_set_rate()Igor Prusov1-0/+9
Add a simple test case which sets clock rate to its current value. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231205232334.2931-3-ivprusov@salutedevices.com
2023-12-15clk: Check that composite clock's div has set_rate()Igor Prusov1-1/+1
It's possible for composite clocks to have a divider that does not implement set_rate() operation. For example, sandbox_clk_composite() registers composite clock with a divider that only has get_rate(). Currently clk_composite_set_rate() only checks thate rate_ops are present, so for sandbox it will cause NULL dereference during clk_set_rate(). This patch adds rate_ops->set_rate check tp clk_composite_set_rate(). Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com
2023-12-15clk: get correct ops for clk_enable() and clk_disable()Yang Xiwen1-0/+2
assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations are called on clocks. This fixes the incorrect enable_count issue as described in [1]. [1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/ Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com
2023-12-15clk: check parent_name in clk_register to avoid confusing log_error() outputYang Xiwen1-8/+10
For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Suggested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com
2023-12-15Merge tag 'u-boot-imx-20231214' of ↵Tom Rini12-2086/+301
https://gitlab.denx.de/u-boot/custodians/u-boot-imx - Fix for i.MX8M Plus eDM SBC DDR timings with inline ECC - Switch to FPWM mode on Data Modul i.MX8M Plus eDM SBC so that DRAM EDAC detects more correctable errors - Fix for imx8mp-venice board DDR initialization
2023-12-14imx8mp-venice: update DRAM config for 2000MHzTim Harvey1-107/+107
The imx8mp venice boards can support 2000Mhz DRAM. Update the DRAM config to support this. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14imx8mp-venice: fix DRAM bus configurationTim Harvey1-60/+61
The DRAM configuration for the 1GB and 4GB imx8mp venice boards had a bus mapping issue (channel A and B swapped) which creates an invalid deskewing configuration during training causing the DRAM to not be able to run at its full bus speed. Update the various config structures to resolve this. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14board: gateworks: venice: remove extra fileTim Harvey1-1849/+0
Remove lpddr4_timing_imx8mm_512mb.c mistakenly committed Fixes: a1c711046b0d "(board: gateworks: venice: add imx8mm-gw7903 support)" Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-12-14ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBCMarek Vasut3-74/+120
Import DRAM timings generated by the DDR tool 3.31 which introduce assorted tweaks to the DRAM controller settings. Furthermore, enable DBI to improve noise resilience of the DRAM bus by reducing the number of bit changes on the bus. Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors reported by EDAC . It is not entirely clear why the slightly faster setting does produce sporadic correctable errors, while this one does not, but this could be related to simpler PLL setting at 3600 MTps. Enable inline ECC which is necessary to detect ECC errors and collect statistics by the EDAC driver in Linux. This reduces the DRAM size by 64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available DRAM size becomes 3.5 GiB . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14ARM: imx: Force DRAM regulators into FPWM mode on Data Modul i.MX8M Plus eDM SBCMarek Vasut1-0/+5
In case the Buck5 and Buck6 regulators which supply DRAM Vdd1 and Vdd2/Vddq respectively operate in automatic PWM/PFM mode, the DRAM EDAC detects more correctable errors than if the regulators operate in forced PWM only mode. Force DRAM regulators to forced PWM mode only to stop tempting the DRAM. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14ARM: imx: Enable CAAM on DH i.MX8M Plus DHCOMMarek Vasut2-0/+2
Enable CAAM in U-Boot to make crypto available early in the boot process. This has a side-effect that in case an older kernel version contains a broken CAAM initialization timeout code, initialization in bootloader will help that old kernel version function correctly. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14ARM: imx: Enable CAAM on Data Modul i.MX8M Mini/Plus eDM SBCMarek Vasut2-0/+2
Enable CAAM in U-Boot to make crypto available early in the boot process. This has a side-effect that in case an older kernel version contains a broken CAAM initialization timeout code, initialization in bootloader will help that old kernel version function correctly. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14ddr: imx: Add 3600 MTps rate supportMarek Vasut2-0/+5
Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps PLL setting, except the divider is not 9 but 8 . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14ddr: imx: Handle 3734 in addition to 3733 and 3732 MTps ratesMarek Vasut1-0/+1
The new MX8M DDR tool 3.31 now generates a programming file which uses data rate 3734 instead of 3733 or 3732 . Handle another rounding option . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14arm64: imx8mp: Inhibit DTC warning on DH i.MX8MP DHCOM rev.100 DTOMarek Vasut1-0/+2
Inhibit DTC warning in imx8mp-dhcom-pdk3-overlay-rev100.dts: " arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (reg_format): /fragment@0/__overlay__:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #address-cells value arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #size-cells value " The DTO overwrites the 'reg' property of an ethernet PHY and is only used on specific combination of old prototype SoM and old prototype PDK3 carrier board, which had incorrectly placed pull resistor, which made the PHY change its MDIO address in that specific combination and which is already fixed on production hardware. The DTO is implemented in this simple manner because if it contained a full MDIO bus node reference to define #address-cells and #size-cells, it would also require a full new copy of the PHY node, i.e. ethernet-phy@5 { ... reg = <5>; ... }, to avoid DTC warnings about mismatch between node unit and reg value. The node unit in SoM DT is ethernet-phy@7 { ... }; . This simpler approach avoids unnecessary duplication without adverse side effects. Reported-by: Fabio Estevam <festevam@denx.de> Reported-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13Merge branch '2023-12-13-assorted-minor-fixes'Tom Rini5-6/+3
- A few MAINTAINERS updates and Kconfig wording fixes
2023-12-13maintainers: rk3399: remove maintainerShantur Rathore2-2/+0
Remove Akash Gajjar <akash@openedev.com> from MAINTAINERS as email is bouncing. Signed-off-by: Shantur Rathore <i@shantur.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-12-13maintainers: bcmns3: remove maintainerPeter Robinson1-1/+0
Remove Bharat Gooty as a maintainer as his mail is bouncing. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2023-12-13MAINTAINERS: Fix ARCH_APPLE file pathsMoritz Fischer1-1/+1
Fixes a filepath in MAINTAINERS file that wasn't updated when renaming the files to match the new SoC name. Fixes: a4bd5e4120d6 ('arm: apple: Change SoC name from "m1" into "apple"') Signed-off-by: Moritz Fischer <moritzf@google.com>
2023-12-13drivers: misc: Kconfig: Fix SPL_FS_LOADER promptAlexander Gendin1-1/+1
Both FS_LOADER and SPL_FS_LOADER have the same menu prompt. To avoid confusion, make prompt for SPL_FS_LOADER different. Signed-off-by: Alexander Gendin <agendin@matrox.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13lib/Kconfig: Correct typo about SYSINFO_SMBIOS in help messageTom Rini1-1/+1
The correct symbol to enable to have SMBIOS populate fields based on the device tree is SYSINFO_SMBIOS and not SMBIOS_SYSINFO. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-12Merge tag 'u-boot-imx-20231212' of ↵Tom Rini12-18/+39
https://gitlab.denx.de/u-boot/custodians/u-boot-imx - Fix emmc detection on colibri_imx7 - Fix DDR configuration on tqma6 to improve Ethernet performance - Fix aliases and chosen nodes indentation on imx7s-warp - Convert pico-imx6ul to DM_SERIAL - Convert pico-pi-imx7d to watchdog driver model to fix 'reset' command - Select CONFIG_NET_RANDOM_ETHADDR on imx8mp_evk to fix networking on older boards - Add USBH_EN gpio hog to fix USB host interface not working on some Apalis Toradex carrier boards with Apalis iMX8 SoM - Add PCI fixup for GW73xx-F+ - Fix broken EEPROM read on imx8mn-var-som
2023-12-12board: colibri_imx7: fix emmc detectionMarcel Ziswiler2-4/+3
Later versions of Colibri iMX7D V1.1B modules use a "new" SoC fusing. The difference lies in whether we enable the boot ROM to use the eMMC reset signal. Depending on the SoC fuse, the boot ROM configures this pin as a GPIO output to drive the reset signal. Our eMMC vs NAND detection currently only sets that signal to a GPIO without explicitly setting any direction. Previously, by default, it was set as an input. As the boot ROM now configures it as an output, we receive a value of zero instead of one, indicating the absence of the pull-up on eMMC modules. To fix this, set the SION bit, allowing the reading back of the value even if it is configured as an output by the boot ROM. It's important to note that with the new SoC fusing, we now read back what the boot ROM drives rather than the real value caused by the pull-up resistor. However, if it were ever driven low, the eMMC would permanently be reset. In addition, remove hard-coded variant in the eMMC build case as since the commit 0c39564d0281 ("toradex: colibri_imx7: Enable nand/emmc detection and set boot variant") will anyways always get overridden by the detection routing in board code. Fixes: 0c39564d ("toradex: colibri_imx7: Enable nand/emmc detection and set boot variant") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
2023-12-12tqma6: Fix DDR configurationMiquel Raynal1-1/+1
Initially investigating a Linux network issue causing a lot of drop and poor network performances on a custom system based on a TQMA6A module (based on an iMX6Q), [1st link below]. I eventually correlated my observations with a contention at the NIC level when in concurrency with the graphics pipeline. Troubleshooting this in the kernel lead to disabling DMA bursts accesses made by the IPU in order to avoid triggering the QoS at the interconnect level, reducing from 50 to 10% the drop rate on eth0, [2nd link below]. The solution worked on my setup but not on others, which still suffered from abnormally high drop rates even with this "fix". After looking a while into TQ Systems BSP I figured out a number of differences in recent U-Boot out-of-tree patches they had in their repository [3rd link]. Parsing the differences one after the other lead me to this final solution. The reset pad of the DDR controller was apparently misconfigured, Bit 18-19 picturing the "DDR select field". The current value b11 is reserved. The only defined value as of version 6 of the iMX6Q manual was b00 "DDR3 and LPDDR2 mode". In practice no register difference has been spotted after changing this configuration but all issues tracked thus far just vanished. All previous fixes have been proven irrelevant. Just clearing this field solved all our network issues and the drop rate as measured by iperf3 felt back to 0%. Link: https://lore.kernel.org/netdev/20231012193410.3d1812cf@xps-13/ Link: https://lists.freedesktop.org/archives/dri-devel/2023-October/428251.html Link: https://github.com/tq-systems/u-boot-tqmaxx/commit/15eb6abbefbf6916c28467b85485911dad3da6bc Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12imx7s-warp-u-boot: Fix aliases and chosen nodes indentationFabio Estevam1-7/+7
The aliases and chosen nodes are currently indented using spaces. Fix them to use the standard tab indentation. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-12pico-pi-imx6ul: Connvert to DM_SERIALFabio Estevam1-0/+1
The conversion to DM_SERIAL is mandatory, so select this option. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-12pico-pi-imx7d: Convert to watchdog driver modelFabio Estevam2-0/+13
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused the 'reset' command in U-Boot to not cause a board reset. Fix it by switching to the watchdog driver model via sysreset, which is the preferred method for implementing the watchdog reset Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-12imx8mp_evk: Select CONFIG_NET_RANDOM_ETHADDRFabio Estevam1-0/+1
On an early revision of the imx8mp-evk that I have access to, the MAC addresses fuses are not programmed, causing failure to bring the Ethernet interfaces. Fix this problema by selecting CONFIG_NET_RANDOM_ETHADDR so that random MAC addresses are assigned and the Ethernet ports become functional out of the box. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-12apalis-imx8: add USBH_EN gpio hogAndrejs Cainikovs2-0/+7
USB host interface is not working on some Apalis Toradex carrier boards with Apalis iMX8 SoM. This is due to USBH_EN pin, which powers USB peripherals, having a strong pull-down on some boards, and a weak pull-down on the others. This USBH_EN pin is left unconfigured, which means it is in its default state at cold boot: input with a strong pull-up. As a result, carrier boards with a weak pull-down have this signal high enough to trigger power delivery to USB peripherals, and opposite - boards with strong pull-down on USBH_EN have this signal below the threshold needed to trigger USB power delivery. This change configures the USBH_EN pin as gpio hog, fixing this issue for all Apalis carrier boards regardless of pull-down resistor value. Also, update apalis-imx8_defconfig via savedefconfig. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12board: gateworks: venice: add fixup for GW73xx-F+Tim Harvey1-3/+3
GW73xx-F board revision switched back to the original PCIe switch due to part availability. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12arm: dts: imx8mn-var-som: Fix broken EEPROM readHugo Villeneuve1-3/+3
On branch WIP/17Oct2023, the EEPROM can no longer be read: U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400) CPU: Freescale i.MX8MNano Quad rev1.0 at 1200 MHz Reset cause: POR Model: Variscite VAR-SOM-MX8MN Symphony evaluation board var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19 initcall failed at call 000000004022207c (err=-19) Convert EEPROM-related properties to bootph-all so that the EEPROM can also be read outside of SPL. Fixes: 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-09test/py: Disable error E0611 in two cases for pylintWIP/09Dec2023Tom Rini2-0/+2
Recently pylint has started to complain about: No name 'fs_helper' in module 'tests' (no-name-in-module) Due to: from tests import fs_helper However, we have: test/py/tests/fs_helper.py And since we do not want to add a dummy test/py/tests/__init__.py to silence this warning we instead just disable it as needed. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-09Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini10-29/+382
- StarFive: Add StarFive watchdog driver - VisionFive2: Support device tree overlay for VisionFive2 board - Andes: Fix PLIC-SW setting - RISC-V: Fix NVMe support by implying NVME_PCI for QEMU - RISC-V: Fix binman for 64 bit format load address
2023-12-09Merge patch series "bootflow: bootmeth_efi: Fix network efi boot."Tom Rini2-9/+29
To quote the author: Currently bootmeth_efi crashes while doing a network (dhcp) boot. This patch series fixes issues and both network and disk boot works. # Do not modify or remove the line above. # Everything below it will be ignored. # # Please enter a commit message to explain why this merge is necessary, # especially if it merges an updated upstream into a topic branch. # # An empty message aborts the commit.
2023-12-09bootflow: bootmeth_efi: don't free bufferShantur Rathore1-1/+6
bootmeth_efi doesn't allocate any buffer to load efi in any case. enable static buffer flag for all cases. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09bootflow: bootmeth_efi: Handle fdt not available.Shantur Rathore2-6/+15
While booting with efi, if fdt isn't available externally, just use the built-in one. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09bootflow: bootmeth_efi: set bflow->fname from bootfile nameShantur Rathore1-1/+7
We need to set boot->fname before calling efi_set_bootdev otherwise this crashes as bflow->fname is null. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09bootflow: bootmeth_efi: Set bootp_arch as hexShantur Rathore1-1/+1
bootmeth_efi sets up bootp_arch which is read later in bootp.c Currently bootp_arch is being set as integer string and being read in bootp.c as hex, this sends incorrect arch value to dhcp server which in return sends wrong file for network boot. For ARM64 UEFI Arch value is 0xb (11), here we set environment as 11 and later is read as 0x11 and 17 is sent to dhcp server. Setting it as hex string fixes the problem. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09arm: apple: t602x: Add missing MMIO regions to memmapJanne Grunau1-0/+48
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which was not used by any driver at the time. The display out exposed as simple-framebuffer use a power-domain controlled by a device in an unmapped region. Add a map covering this region as well as another MMIO region in the range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO annotated in Apple's device tree in this range. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Eric Curtin <ecurtin@redhat.com> Reviewed-by: Neal Gompa <neal@gompa.dev> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-12-08Merge tag 'u-boot-amlogic-20231207' of ↵WIP/08Dec2023Tom Rini5-0/+5
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add missing DM_USB_GADGET to amlogic boards
2023-12-08Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini13-7/+58
The first four patches are actual fixes. The last three patches add support for the apparently popular OrangePi Zero 3 board: multiple people seem to be champing at the bit, so I'd rather give them something real instead of people using random trees they found on the Internet. It's actually mostly the new defconfig file anyway, so the chances for regressions are very slim.
generated by cgit v1.1 at 2024-09-11 07:40:05 +0000