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2022-06-17Merge tag 'u-boot-stm32-20220617' of ↵WIP/17Jun2022Tom Rini9-3/+631
https://source.denx.de/u-boot/custodians/u-boot-stm - Fix the stm32prog command for stm32mp platform - Add stm32mp15x DHCOR based DRC Compact board
2022-06-17Merge commit '32e0379143b433e29d76404f5f4c279067e48853' of ↵Tom Rini10-15/+67
https://github.com/tienfong/uboot_mainline
2022-06-17Merge branch '2022-06-16-assorted-bugfixes'Tom Rini17-26/+67
- A wide array of regression fixes and minor updates
2022-06-17ddr: altera: soc64: Integer fix overflow that caused DDR size mismatchedDinesh Maniyam1-2/+3
Convert the constant integer to 'phys_size_t' to avoid overflow when calculating the SDRAM size. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17drivers: cache: ncore: Disable snoop filterDinesh Maniyam1-3/+3
There is hardware bug in NCORE CCU IP and it is causing an issue in the coherent directory tracking of outstanding cache lines. The workaround is disabling snoop filter. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17arm: dts: socfpga: stratix10: Add freeze controller nodeDinesh Maniyam1-1/+10
The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17arm: dts: socfpga: agilex: Add freeze controller nodeDinesh Maniyam1-1/+10
The freeze controller is required for FPGA partial reconfig. This node is disable on default. Enable this node via u-boot fdt command when needed. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17arch: arm: socfpga: timer_s10: Override udelay for secure sectionDinesh Maniyam1-1/+33
Override __udelay() as 'always inlined' function so that PSCI code run in '__secure' section can call this delay function as well. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-17ARM: dts: stm32: Add DHCOR based DRC Compact boardMarek Vasut7-1/+510
Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for SPI2 pinsMarek Vasut1-0/+15
Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for CAN1 pinsMarek Vasut1-0/+20
Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART5 pinsMarek Vasut1-0/+13
Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART4 pinsMarek Vasut1-0/+30
Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17ARM: dts: stm32: Add alternate pinmux for UART3 pinsMarek Vasut1-0/+41
Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17stm32mp: stm32prog: fix the last character of dfu_alt_add third parameterPatrick Delaunay1-2/+2
The third parameter of dfu_alt_add(), the string description of alternate, is build in stm32prog_alt_add() with a unnecessary character ';' at the end of the string. This separator was required in the first implementation of dfu_alt_add() but is no more needed in the current implementation; this separator is managed only in dfu_config_interfaces() which call dfu_alt_add() for this parameter without this separator. And since the commit 53b406369e9d ("DFU: Check the number of arguments and argument string strictly"), this added character cause an error when the stm32prog command is executed because the third parameter of dfu_alt_add() must be a string with a numerical value; 's' must be NULL in the result of call in dfu_fill_entity_mmc(): third_arg = simple_strtoul(argv[2], &s, 0); Fixes: 53b406369e9d ("DFU: Check the number of arguments and argument string strictly") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-16net: Fix discuss discard typoMarek Vasut1-1/+1
Replace discuss with discard, that is what happens with packet with incorrect checksum. Fix the typo. Fixes: 4b37fd146bb ("Convert CONFIG_UDP_CHECKSUM to Kconfig") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2022-06-16tools: binman: install btoolPeng Fan1-1/+1
btool is needed after install binman to system. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-06-16board: ti: am335x: eth_cpsw should depend on CONFIG_NETCorentin LABBE1-1/+1
The origin of this patch is the breaking of am335x-hs boot due to commit e41651fffda7 ("dm: Support parent devices with of-platdata") HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit. This commit added 10 driver binding pass and am335x boot only if one pass is done. SPL try to do more than one pass due to eth_cpsw failing. Since HS SPL does not need network (and NET is already disabled in config), the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled. Signed-off-by: Corentin LABBE <clabbe@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Andrew Davis <afd@ti.com>
2022-06-16armv8: always use current exception level for TCR_ELx accessAndre Przywara4-8/+30
Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org>
2022-06-16arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocksHeiko Thiery1-0/+15
With the move to use DM_CLK the boards uart stops working. The used properties are not supported by the imx8mq clock driver. Thus the correct baudrate cannot be selected. Remove this properties here and the board can start with working uart. Keep it in the main dts because linux handles these porperties fine. Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-06-16usb: host: ehci-generic: Make resets and clocks optionalAndre Przywara1-2/+2
The generic EHCI binding does not *require* resets and clocks properties, and indeed for instance the Allwinner A20 SoCs does not need or define any resets in its DT. Don't easily give up if clk_get_bulk() or reset_get_bulk() return an error, but check if that is due to the DT simply having no entries for either of them. This fixes USB operation on all boards with an Allwinner A10 or A20 SoC, which were reporting an error after commit ba96176ab70e2999: ======================= Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2) probe failed, error -2 ======================= Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-16fs/squashfs: sqfs_read: Prevent arbitrary code executionMiquel Raynal2-4/+8
Following Jincheng's report, an out-of-band write leading to arbitrary code execution is possible because on one side the squashfs logic accepts directory names up to 65535 bytes (u16), while U-Boot fs logic accepts directory names up to 255 bytes long. Prevent such an exploit from happening by capping directory name sizes to 255. Use a define for this purpose so that developers can link the limitation to its source and eventually kill it some day by dynamically allocating this array (if ever desired). Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com Reported-by: Jincheng Wang <jc.w4ng@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Jincheng Wang <jc.w4ng@gmail.com>
2022-06-16odroid_xu3: Fix board environment variableTom Rini1-0/+1
When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed what "board" evaluated to in the environment. This in turn meant that we would no longer try and find the correct fdtfile via the normal distro boot logic. Fix this by overriding board in the default environment, as done on other platforms where CONFIG_SYS_BOARD is not what we want to be in the board environment variable. Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig") Reported-by: Gabriel Hojda <ghojda@yo2urs.ro> Tested-by: Gabriel Hojda <ghojda@yo2urs.ro> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-16.gitignore: add files produced by b4Andrey Zhizhikin1-0/+2
b4 utility [1] is introduced by Linux Kernel developers and used to fetch patches and patch series from lore.kernel.org and is proven to be useful for U-Boot development. Detailed usage of the tool can be read under post from the original author [2]. This tool fetches files from the list and populates the source folder with additional files (*.cover and *.mbx) which are not ignored by git and shown as newly added files. Add those file patterns into .gitignore file, so they can be safely skipped during changes attestation. Link: [1]: https://pypi.org/project/b4/ Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-16arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlockChristian Gmeiner1-0/+3
Without this register unlock it is not possible to configure the pinmux used for mcu spi0. Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes") Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2022-06-16Update email address and company nameChristophe Leroy2-3/+3
This patch updates my email address and company name. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2022-06-16crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()Stefan Roese1-6/+0
While working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! Testing and checking with Gaurav Jain from NXP has revealed, that this alignment check is not necessary here at all. So let's remove this check completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gaurav Jain <gaurav.jain@nxp.com> Cc: dullfire@yahoo.com Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-06-16Merge tag 'u-boot-imx-20220616' of ↵WIP/16Jun2022Tom Rini14-30/+261
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220616 ------------------- Fixes for 2022.07 + Toradex apalis-imx8 (missed in last PR) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12322
2022-06-16arm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load scriptMarek Vasut1-1/+2
Clean up in ubiload script. Unmount UBIFS from which kernel image was loaded and detach UBI on which the UBIFS is located, otherwise message similar to the following is printed just before booting kernel: Removing MTD device #7 (rootfs) with use count 1 Error when deleting partition "rootfs" (-16) Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16ddr: altera: Stratix10: Use phys_size_t for memory sizeTien Fong Chee1-2/+2
Replace with phys_size_t for all memory size variables declaration for the sake of scalability. phys_size_t is defined in /arch/arm/include/asm/types.h. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPSTien Fong Chee1-1/+1
Bit[7-4] for both register seq2core and core2seq handshake in HPS are not required for triggering DDR re-calibration or resetting EMIF. So, ignoring these bits just for playing it safe. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-16arm: dts: socfpga: stratix10: Update MMC smplsel valueYau Wai Gan1-1/+1
This new MMC sample select value is obtained from running tests on multiple Stratix 10 boards and proven working. Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-15Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-pmicWIP/15Jun2022Tom Rini1-1/+3
2022-06-15Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini5-21/+45
2022-06-15intel: n5x: ddr: update licenseTien Fong Chee1-2/+2
All the source code of sdram_n5x.c are from Intel, update the license to use both GPL2.0 and BSD-3 Clause because this copy of code may used for open source and internal project. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2022-06-15spi: nxp_fspi: Fix clock imbalanceMarek Vasut1-3/+0
The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(), where the IP clock are initially disabled. Drop the second disabling of clock to prevent clock enable/disable imbalance reported by clock core: " clk qspi_root_clk already disabled " Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-06-15mmc: fsl_esdhc_imx: Implement wait_dat0 mmc opsLoic Poulain1-17/+33
Implement wait_dat0 mmc ops callbac, allowing to reduce SPL boot time. Before (using grabserial): [0.000001 0.000001] U-Boot SPL 2021.04-xxxx [0.028257 0.028257] DDRINFO: start DRAM init [0.028500 0.000243] DDRINFO: DRAM rate 3000MTS [0.304627 0.276127] DDRINFO:ddrphy calibration done [0.305647 0.001020] DDRINFO: ddrmix config done [0.352584 0.046937] SEC0: RNG instantiated [0.374299 0.021715] Normal Boot [0.374675 0.000376] Trying to boot from MMC2 [1.250580 0.875905] NOTICE: BL31: v2.4(release):lf-5.10.72-2.2.0-0-g5782363f9 [1.251985 0.001405] NOTICE: BL31: Built : 08:02:40, Apr 12 2022 [1.522560 0.270575] [1.522734 0.000174] [1.522788 0.000054] U-Boot 2021.04-xxxx After: [0.000001 0.000001] U-Boot SPL 2021.04-xxxx [0.001614 0.001614] DDRINFO: start DRAM init [0.002377 0.000763] DDRINFO: DRAM rate 3000MTS [0.278494 0.276117] DDRINFO:ddrphy calibration done [0.279266 0.000772] DDRINFO: ddrmix config done [0.338432 0.059166] SEC0: RNG instantiated [0.339051 0.000619] Normal Boot [0.339431 0.000380] Trying to boot from MMC2 [0.412587 0.073156] NOTICE: BL31: v2.4(release):lf-5.15.5-1.0.0-0-g05f788b [0.414191 0.001604] NOTICE: BL31: Built : 10:35:26, Apr 6 2022 [0.700685 0.286494] [0.700793 0.000108] [0.700845 0.000052] U-Boot 2021.04-xxxx Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-15mmc: Add support for wait_dat0 callbackLoic Poulain2-0/+4
There is no wait_dat0 mmc ops, causing operations waiting for data line state change (e.g mmc_switch_voltage) to fallback to a 250ms active delay. mmc_ops still used when DM_MMC is not enabled, which is often the case for SPL. The result can be unexpectly long SPL boot time. This change adds support for wait_dat0() mmc operation. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-15env: mmc : align erase address and size on erase_grp_sizePatrick Delaunay1-3/+7
On eMMC device, the erase_grp_size > 1 so the address and size for the erase block command in env/mmc.c can be unaligned on erase group size and some strange trace occurs and the result is not guarantee by MMC devices. The SD-Card behavior doesn't change as erase_grp_size = 1 for SD-Card. For example, on eMMC present on STM32MP15C-EV1 and before the patch: STM32MP> env erase Erasing Environment on MMC... Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x27ff 16 blocks erased: OK Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x23ff 16 blocks erased: OK OK After this patch: STM32MP> env erase Erasing Environment on MMC... 1024 blocks erased at 0x2000: OK 1024 blocks erased at 0x2000: OK OK Here the 2 copies of U-Boot environment are in the same devices Erase group: it is erased twice. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-15mmc: fix error message for unaligned erase requestPatrick Delaunay1-1/+1
Fix the end address in the message for unaligned erase request in mmc_berase() when start + blkcnt is aligned to erase_grp_size. for example: - start = 0x2000 - 26 - count = 26 - erase_grp_size = 0x400 Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x27ff But no issue when the end address is not aligned, for example - start = 0x2000 - 2 * 26 - count = 26 - erase_grp_size = 0x400 Caution! Your devices Erase group is 0x400 The erase range would be change to 0x2000~0x23ff Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-14secure boot: enable ARCH_MISC_INIT config.Gaurav Jain1-0/+1
add ARCH_MISC_INIT to initilaize caam jr driver. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14clk: imx8mp: use usb_core_ref for usb_root_clkAndrey Zhizhikin1-1/+1
Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") added usb_core_ref for USB Controller but never set it to be used as a clock source, using rather "osc_32k" instead. This produces following boot log message: "clk_register: failed to get osc_32k device (parent of usb_root_clk)" Fix the USB controller clock source by using usb_core_ref instead of osc_32k. Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14clk: imx8mp: fix root clock names for ecspiAndrey Zhizhikin1-3/+3
Root clock name contained underscore, which does not match to the actual clock name. Correct the name to match what is present in the FDT. Fixes: 87f958810fcb ("clk: imx8mp: Add ECSPI clocks") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14verdin-imx8mm, verdin-imx8mp: Fix default systemd console outputPhilippe Schenker2-3/+3
systemd prints its messages on the last console= statement that it finds in the kernel arguments. The current ordering sends the systemd messages to tty1, by default this is the display. Ensure that systemd sends its messages to the default UART, reorder the console= statements accordingly. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14mx6cuboxi: enable driver for adin1300 phyJosua Mayer1-0/+1
Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300. Enable the driver so that the new SoMs have functional networking. Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14mx6cuboxi: fixup dtb ethernet phy nodes before booting an OSJosua Mayer2-0/+79
SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300 at address 1. Because early SoMs had a hardware flaw, the ar8035 can also appear at address 4 - making it a total of 3 phy nodes in the DTB. To avoid confusing Linux with probe errors, fixup the dtb to only enable the phy node that is detected at runtime. Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14ARM: dts: imx6qdl-sr-som: add support for alternate phy addressesJosua Mayer1-2/+15
The Cubox has an unstable phy address - which can appear at either address 0 (intended) or 4 (unintended). SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which will always appear at address 1. Change the reg property of the phy node to the magic value 0xffffffff, which indicates to the generic phy driver that all addresses should be probed. That allows the same node (which is pinned by phy-handle) to match either the AR8035 PHY at both possible addresses, as well as the new one at address 1. Also add the new adi,phy-output-clock property for enabling the 125MHz clock used by the fec ethernet controller, as submitted to Linux [1]. Linux solves this problem differently: For the ar8035 phy it will probe both phy nodes in device-tree in order, and use the one that succeeds. For the new adin1300 it expects U-Boot to patch the status field in the DTB before booting While at it also sync the reset-delay with the upstream Linux dtb. [1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/ Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14phy: adin: add support for clock outputJosua Mayer1-0/+42
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as well as providing the reference clock on CLK25_REF. Add support for selecting the clock via device-tree properties. This patch is based on the Linux implementation for this feature, which has been added to netdev/net-next.git [1]. [2] https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-josua@solid-run.com/ Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14phy: adin: fix broken support for adi, phy-mode-overrideNate Drude1-11/+11
Currently, the adin driver fails to compile. The original patch introducing the adin driver used the function phy_get_interface_by_name to support the adi,phy-mode-override property. Unfortunately, a few days before the adin patch was accepted, another patch removed support for phy_get_interface_by_name: https://github.com/u-boot/u-boot/commit/123ca114e07ecf28aa2538748d733e2b22d8b8b5 This patch refactors adin_get_phy_mode_override, implementing the logic in the new function, ofnode_read_phy_mode, from the patch above. Signed-off-by: Nate Drude <nate.d@variscite.com> Tested-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14imx8mn_evk: Add Ethernet support to the LPDDR4 variantFabio Estevam1-0/+8
The imx8mn-ddr4-evk board has Ethernet support already, but the lpddr4 board does not. Add Ethernet support for the LPDDR4 variant too. Signed-off-by: Fabio Estevam <festevam@denx.de>
generated by cgit v1.1 at 2024-10-13 12:35:23 +0000