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2021-12-17Merge commit '4720b83d2c711062cfb55f03591b8f12c897d7cb' of ↵WIP/17Dec2021Tom Rini6-9/+260
https://github.com/tienfong/uboot_mainline
2021-12-17arm: socfpga: arria10: Enable double peripheral RBF configurationTien Fong Chee4-1/+54
Double peripheral RBF configuration are needed on some devices or boards to stabilize the IO configuration system. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBFTien Fong Chee5-6/+195
This patch triggers warm reset to recover the MPFE NoC from corruption due to high frequency transient clock output from HPS EMIF IOPLL at VCO startup after peripheral RBF is programmed. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17arm: socfpga: arria10: Setting image magic value to romcode initswstate regTien Fong Chee2-2/+11
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID value if the current FSBL image is found valid, otherwise BootROM will look for next subsequent valid FSBL image when warm reset is triggered. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-15Merge tag 'clk-2022.01-rc3' of ↵WIP/15Dec2021Tom Rini10-28/+59
https://source.denx.de/u-boot/custodians/u-boot-clk Clock patches for v2022.01-rc3 This adds better logging support for many CCF drivers, and clarifies some documentation regarding clk_get_rate.
2021-12-15clk: define LOG_CATEGORY for generic and ccf clocksPatrick Delaunay8-12/+39
Define LOG_CATEGORY to allow filtering with log command for generic clock and CCF clocks. This patch also change existing printf, debug and pr_ macro to log_ or dev_ macro. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15clk: cosmetic: reorder include filesPatrick Delaunay6-15/+18
Reorder include files in the U-Boot expected order: the common.h header should always be first, followed by other headers in order, then headers with directories, then local files. It is a preliminary step for next patch. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15clk: fix clk_get_rate() documentationGiulio Benetti1-1/+2
Improve clk_get_rate() @return documentation that otherwise is a bit ambiguous. At the moment I expect to return 0 as error since the return type is 'ulong', instead the function really returns negative value in case the corresponding function pointer is null and returns 0 if the clock is invalid. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15Merge tag 'rpi-next-2022.01' of ↵Tom Rini2-2/+8
https://source.denx.de/u-boot/custodians/u-boot-raspberrypi - enable RPi Zero 2 W - fix MMC numbering issue - Update link to documentation
2021-12-15Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini2-48/+61
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
2021-12-15arm: a37xx: pci: Do not allow setting ROM BAR on PCI BridgePali Rohár1-24/+30
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base Address register at offset 0x30 but its meaning is different than PCI's Expansion ROM BAR register. Only address format of register is same. In reality, this device does not have any configurable PCI BARs. So ensure that write operation into BARs (including Expansion ROM BAR) is noop and registers always contain zero address which indicates that bars are unsupported. Fixes: cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15pci: pci_mvebu: Do not allow setting ROM BAR on PCI BridgePali Rohár1-24/+31
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM Base Address register at offset 0x30 but its meaning is different that of PCI's Expansion ROM BAR register, although the address format of the register is the same. In reality, this device does not have any configurable PCI BARs. So ensure that write operation into BARs (including Expansion ROM BAR) is a noop and registers always contain zero address which indicates that BARs are unsupported. Fixes: a7b61ab58d5d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15pci: pci_mvebu, pci_aardvark: Fix size of configuration cacheMarek Behún2-2/+2
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4 for cfgcache. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-13Merge tag 'u-boot-stm32-20211213' of ↵WIP/13Dec2021Tom Rini5-5/+45
https://source.denx.de/u-boot/custodians/u-boot-stm - enable KSZ90x1 PHY driver on DHCOR - DHSOM boards: - increase USB power-good delay - add update_sf script to install U-Boot into SF - increase PHY auto-negotiation timeout to 20 seconds - fix SoM and board coding strap GPIO handling # gpg verification failed.
2021-12-13ARM: stm32: Enable KSZ90x1 PHY driver on DHCORMarek Vasut1-0/+2
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the AV96 board has this PHY populated on the PCB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13ARM: dts: stm32: Add custom PHY reset bindings on AV96Marek Vasut1-0/+11
The ethernet PHY must be reset on AV96, however DWMAC currently does not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC PHY reset property is going away on next DT sync. Add PHY specific reset bindings to trigger the PHY reset and fix sporadic ethernet malfunctions, until the next DT sync. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOMMarek Vasut1-4/+10
The variables retaining the strap values have to be initialized, always, make it so. Moreover, free the requested GPIO list at the end to avoid wasting memory. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOMMarek Vasut1-0/+3
The Micrel PHYs on known DHSOM based boards take a while to come out of reset, increase the auto-negotiation timeout to prevent it from timing out in case the ethernet is used right after the board was reset. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOMMarek Vasut1-1/+11
Add script to read U-Boot from SD card and write it to matching locations in the SPI NOR, thus making the SPI NOR bootable. The script erases the entire SPI NOR, including U-Boot environment, to make sure the installation is clean. To retain environment from current running U-Boot, run 'saveenv' after running the 'update_sf' script. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13ARM: stm32: Increase USB power-good delay on DHSOMMarek Vasut2-1/+9
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until the USB Vbus is stable. Increase the USB power-good delay to 1 s. This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into stm32mp15_common.h to reduce duplication in board-specific config files adding custom environment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-12-13Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini13-145/+129
- A few clean ups for the RZG2
2021-12-13configs: beacon-rzg2m: Config to address new aliasesAdam Ford1-1/+1
The resync of the device trees from Linux 5.16-rc3 caused aliases to appear on the MMC devices which changed the numbering. This changed the default boot device and caused boot failure. Update the mmcdev variable to reflect the new aliases. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliasesAdam Ford1-1/+0
The resync of the device trees from Linux 5.16-rc3 caused aliases to appear on the MMC devices which changed the numbering. This broke the reading/writing of the environmental variables, so update the defconfig accordingly. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13arm: dts: Create common rz-g2-beacon-u-boot fileAdam Ford5-100/+91
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and as such creates three different device trees and each of them have a corresponding -u-boot.dtsi file which are basically copies of each other. Create a common include file to be referenced by each of the respective board-u-boot.dtsi files to reduce duplicate code and simplify support going forward. This also restores some lost functionality from the device tree re-sync and updates the MAINTAINER file to include all beacon-renesom device tree files. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3Adam Ford5-38/+32
The device trees for the Beacon RZ/G2[MNH] boards have undergone some changes over time, so resync them now. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13net: ravb: Support multiple clocksAdam Ford1-5/+5
The RZ/G2 series uses an external clock as a reference to the AVB. If this clock is controlled by an external programmable clock, it must be requested by the consumer or it will not turn on. In order to do this, update the driver to use bulk enable and disable functions to enable clocks for boards with multiple clocks. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-10Merge tag 'efi-2022-01-rc4-2' of ↵WIP/10Dec2021Tom Rini24-44/+346
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2022-01-rc4-2 UEFI: * correctly handle missing TPM device * prepare for block devices for U-Boot as EFI app # gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST # gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4 # gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown] # gpg: aka "[jpeg image of size 1389]" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
2021-12-09efi: Add a media/block driver for EFI block devicesSimon Glass4-0/+137
Add a block driver which handles read/write for EFI block devices. This driver actually already exists ('efi_block') but is not really suitable for use as a real U-Boot driver: - The operations do not provide a udevice - The code is designed for running as part of EFI loader, so uses EFI_PRINT() and EFI_CALL(). - The bind method probes the device, which is not permitted - It uses 'EFI' as its parent device The new driver is more 'normal', just requiring its platform data be set up in advance. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09efi: Add uclass for devices provided by UEFI firmwareSimon Glass12-1/+101
UCLASS_EFI_LOADER is used for devices created by applications and drivers loaded by U-Boots UEFI implementation. This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices that provided by a UEFI firmware calling U-Boot as an EFI application. If the two uclasses can be unified, is left to future redesign. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09efi: Rename UCLASS_EFI and IF_TYPE_EFISimon Glass6-16/+16
These names are better used for access to devices provided by an EFI layer. Use EFI_LOADER instead here, since these are only available in U-Boot's EFI_LOADER layer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09efi_loader: correctly handle no tpm device errorMasahisa Kojima3-8/+18
When the TCG2 protocol is installed in efi_tcg2_register(), TPM2 device must be present. tcg2_measure_pe_image() expects that TCP2 protocol is installed and TPM device is available. If TCG2 Protocol is installed but TPM device is not found, tcg2_measure_pe_image() returns EFI_SECURITY_VIOLATION and efi_load_image() ends with failure. The same error handling is applied to efi_tcg2_measure_efi_app_invocation(). Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09efi_loader: check tcg2 protocol installation outside the TCG protocolMasahisa Kojima1-0/+18
There are functions that calls tcg2_agile_log_append() outside of the TCG protocol invocation (e.g tcg2_measure_pe_image). These functions must to check that TCG2 protocol is installed. If not, measurement shall be skipped. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09efi_loader: efi_tcg2_register returns appropriate errorMasahisa Kojima4-18/+55
This commit modify efi_tcg2_register() to return the appropriate error. With this fix, sandbox will not boot because efi_tcg2_register() fails due to some missing feature in GetCapabilities. So disable sandbox if EFI_TCG2_PROTOCOL is enabled. UEFI secure boot variable measurement is not directly related to TCG2 protocol installation, tcg2_measure_secure_boot_variable() is moved to the separate function. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09doc: usage: Fix command in fdt overlay apply sequenceAlexander Dahl1-1/+1
Literally adhering to the docs gave this wrong output: U-Boot> setenv fdtaddr 0x87f00000 U-Boot> fdtaddr $fdtaddr Unknown command 'fdtaddr' - try 'help' Fixes: d80162cfc559 ("doc: Document how to apply fdt overlays") Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-09Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2-8/+2
This fixes two regressions: eMMC operation on boards with WiFi (so using three MMC devices), and a repeated wrong error message in USB gadget mode (fastboot, ums).
2021-12-08sunxi: Remove misleading USB-OTG charger messageAndre Przywara1-7/+1
The sunxi MUSB glue driver has some code to check for external VBUS presence when it's going to use the MUSB host mode, and it warns if there is VBUS provided through the cable (in sunxi_musb_enable()). This code was apparently copied to the USB gadget detection code (g_dnl_board_usb_cable_connected()), but here we actually *expect* external VBUS power, so a warning is wrong and confusing. So far this message rarely triggered, but a recent patch (6fa41cdd19b9) changed this: =========================== => ums 0 mmc 2 UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000 A charger is plugged into the OTG /A charger is plugged into the OTG \A charger is plugged into the OTG |A charger is plugged into the OTG -A charger is plugged into the OTG .... =========================== Remove the message for the gadget cable detection call, and just return the status of the VBUS detection, as this is what the callers are after. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-08sunxi: dts: Fix typoed eMMC checkAndre Przywara1-1/+1
Commit 03510bf62149 ("sunxi: only include alias for eMMC when mmc2 used") protected the eMMC alias in U-Boot's DT stub the with the associated Kconfig symbol, but was actually using the wrong name. Fix the name of the symbol to match what's defined in Kconfig and what the defconfig files actually use. Fixes: 03510bf62149 ("sunxi: only include alias for eMMC when mmc2 used") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: 5kft@5kft.org Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-03Merge https://source.denx.de/u-boot/custodians/u-boot-riscvWIP/03Dec2021Tom Rini19-405/+1512
2021-12-02Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-netTom Rini2-12/+12
- Two fixes from Marek for designware and mdio.
2021-12-02riscv: Enable SPI flash env for SiFive Unmatched.Thomas Skibo2-0/+14
Enable saving environment to SPI flash memory on SiFive Unmatched. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo4-0/+51
Configure SPI flash devices into SPL. Add SPI boot option to spl.c. Document how to format flash for booting. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02doc: board: Update Microchip MPFS Icicle Kit docPadmarao Begari1-2/+5
UART1 use for U-Boot and Linux console instead of UART0 and UART0 is reserved for Hart Software Services(HSS). Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-12-02riscv: Update Microchip MPFS Icicle Kit supportPadmarao Begari3-2/+21
This patch updates Microchip MPFS Icicle Kit support. For now, add Microchip I2C driver, set environment variables for mac addresses and default build for SBI_V02. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02riscv: dts: Split Microchip device treePadmarao Begari4-389/+913
The device tree split into .dtsi and .dts files, common device node for eMMC/SD, enable I2C1, UART1 for console instead of UART0, enable the DDR 2GB memory and in that 288MB memory is reserved for fabric buffer. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02i2c: Add Microchip PolarFire SoC I2C driverPadmarao Begari3-0/+489
Add I2C driver code for the Microchip PolarFire SoC. This driver supports I2C data transfer and probe for I2C slave addresses. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02net: macb: Remove Microchip compatible stringPadmarao Begari1-11/+7
Remove the microchip compatible string and default compatible "cdns,macb" support both 32-bit and 64-bit DMA access. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02board: ae350: Support autoboot from RAMLeo Yu-Chi Liang1-1/+12
Add boot command "bootcmd_ram" to support autoboot from RAM. This feature could be useful at the very initial state of chip design when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc) The kernel image is default to be loaded at 0x2000000 via debug port, and the following script serves as an example: spl() { cmd="riscv64-linux-gdb -q \ -ex \"target remote $host:$port\" \ -ex \"load\" \ -ex \"thread apply all set \\\$pc=&_start\" \ -ex \"thread apply all set \\\$a0=\\\$mhartid\" \ -ex \"thread apply all set \\\$a1=<dtb address>\" \ -ex \"restore u-boot.itb binary 0x200000\" \ -ex \"restore Image binary 0x2000000\" \ -ex \"c\" \ spl/u-boot-spl " echo $cmd eval $cmd } The address where the kernel is loaded can be altered by changing the value of KERNEL_IMAGE_ADDR. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-12-02net: dwc_eth_qos: Enable clock in probeMarek Vasut1-11/+11
Enable DWC IP clock in driver probe, so the MII access is possible even outside of active network transfers. This is particularly useful when using 'mii' or 'mdio' commands to explore PHY state, neither of which works with DWMAC currently due to the disabled clock. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02net: eth-phy: Handle gpio_request_by_name() return valueMarek Vasut1-1/+1
The gpio_request_by_name() returns zero in case of success, however the conditional return value check in gpio_request_by_name() checks only for (ret != -ENOENT) and if the condition is true, returns ret outright. This leads to a situation where successful gpio_request_by_name() return leads to immediate successful eth_phy_of_to_plat() return as well, and to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the PHY driver operates with valid reset GPIO, but with assert/deassert times set to default, which is 0, instead of the values from DT. This breaks PHY reset. Fix this by checking if return value is non-zero and then for this one single allowed non-zero return value, -ENOENT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-30Fix MMC numbering issue for Raspberry Pi 3Mike Karels1-1/+2
Using mmc.dtbo from rpi-firmware to switch the controller for the SD card slot from sdhci to sdhost causes the numbering to change; the SD card is then not recognized at boot. Add to the range checked. Signed-off-by: Matthias Brugger <mbrugger@suse.com>