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2021-04-16Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiWIP/16Apr2021Tom Rini9-55/+215
This adds support for devices with R40 dual rank DRAM, and asymmetric A64 DRAM devices like the Pinephone/3GB. Also we enable automatic gzipped kernel support, and allow scripted DT overlay support. The rest of the patches are cleanups, but also some sunxi-specific preparatory patches for USB3.0 and improved HDMI support. The bulk of those changes will go through other trees, though. Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40, H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work there (where applicable), with the exception of Ethernet on the H5. Since this is already broken in v2021.04, I will send a separate fix.
2021-04-16sunxi: video: select dw-hdmi in Kconfig, not MakefileJernej Skrabec2-1/+2
Currently sunxi Makefile manually specifies full path to dw-hdmi common code. However, that is not needed because it can be selected in Kconfig instead. Select proper symbol in Kconfig and drop path from Makefile. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: arm64: Add addresses for compressed kernel loadArnaud Ferraris1-0/+15
The "booti" command to load arm64 Linux kernels supports automatic decompression of zipped kernel images, but relies on some environment variables to point to usable buffer RAM. Add those variables and let them point to some default values, that should cover most use-cases. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: binman: Do not hardcode U-Boot load addressSamuel Holland1-1/+1
The FIT description has access to the configuration variables. Use the appropriate variable instead of hardcoding the address. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: binman: Respect the default FIT configurationSamuel Holland1-1/+1
binman can fill in the default FIT configuration index as selected by the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE. Let's respect the user's configuration by taking advantage of this feature, instead of always defaulting to the first device tree in CONFIG_OF_LIST. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16clk: sunxi: h6: Add XHCI clocksSamuel Holland1-0/+2
The XHCI controller has its own clock and reset. Add them. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16clk: sunxi: Add a dummy clock driver for the RTCSamuel Holland2-0/+37
The 32kHz clock ("LOSC") on sunxi SoCs is provided by the RTC. It is used, among other things, by the XHCI controller in the H6. To be able to call clk_get_bulk() on the XHCI controller, some device needs to provide all referenced clocks. Since LOSC is a fixed-rate always-on clock, implementation is trivial. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: enable dual rank memory on R40Icenowy Zheng1-6/+49
Previously we do not have proper dual rank memory detection on R40 (because we omitted PIR_QSGATE, which does not work on R40 with our configuration), and dual rank memory is just simply disabled as early R40 boards available (Banana Pi M2 Ultra and Berry) have single rank memory. As a board with dual rank memory (Forlinx OKA40i-C) is now known to us, we need to have a way to do memory rank detection to support that board. Add some routine to detect memory rank by trying to access the memory in rank 1 and check for error status of the memory controller, and then enable dual rank memory on R40. Similar routine can be used to detect half DQ width (which is also detected by PIR_QSGATE on other SoCs), but it's left unimplemented because there's no known R40 board with half DQ width now. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: Move R40 detect code call into sunxi_dram_init()] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: support asymmetric dual rank DRAM on A64/R40Icenowy Zheng2-23/+82
Previously we have known that R40 has a configuration register for its rank 1, which allows different configuration than rank 0. Reverse engineering of newest libdram of A64 from Allwinner shows that A64 has this register too. It's bit 0 (which enables dual rank in rank 0 configuration register) means a dedicated rank size setup is used for rank 1. Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank DRAM support necessary. Add this support. The code could support both A64 and R40, but because dual rank detection is broken on R40 now, we cannot really use it on R40 currently. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16sunxi: add fdtoverlay_addr_r environment variableJernej Skrabec1-23/+26
Commit 69076dff2284 ("cmd: pxe: add support for FDT overlays") added support for loading DT overlay files to PXE boot. However, it needs additional environment variable which points to memory location which can be used to temporary store overlay data. Add it and in the process unify alignment using spaces and fix comment. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-15Merge branch '2021-04-14-assorted-vboot-improvements'WIP/15Apr2021Tom Rini31-266/+955
- Add ECDSA support to FIT images - Improve FIT image loadables (incl fpga) support - Further FIT improvements with SPL
2021-04-15Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini103-206/+2772
update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini9-863/+1073
- Minor fix to Apollo Lake devicetree bindings for FSP - Refactor Designware PCIe drivers to core and SoC parts - Add Amlogic Meson Designware PCIe controller driver
2021-04-15configs: T1042D4RDB: enable DM_ETHCamelia Groza5-2/+18
Enable DM_ETH and DM_MDIO for the T1042D4RDB. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t1042d4rdb: add FMan v3 nodesCamelia Groza1-1/+54
Add the FMan v3 nodes for the T1042D4RDB. The nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t1042: add QorIQ DPAA 1 FMan v3 nodesCamelia Groza1-0/+46
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T1042 SoC. The device tree nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15configs: T4240RDB: enable DM_ETHCamelia Groza2-0/+6
Enable DM_ETH and DM_MDIO for the T4240RDB. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: qoriq: update the mdio offsets under the second FMan v3Camelia Groza11-14/+14
When two FMan's are present on a board, the MDIO nodes are found at the same offsets inside each FMan. This causes "non unique device name" errors when registering the MDIO nodes under the second FMan. Fix this by updating the offsets of the MDIO nodes to include the parent FMan's offset. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t4240rdb: add FMan v3 nodesCamelia Groza1-1/+141
Add the FMan v3 nodes for the T4240RDB. The nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t4240: add QorIQ DPAA 1 FMan v3 nodesCamelia Groza1-0/+101
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T4240 SoC. The device tree nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15configs: T2080RDB: enable DM_ETHCamelia Groza4-0/+12
Enable DM_ETH and DM_MDIO for the T2080RDB. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15board: freescale: t208xrdb: fdt fixups under DM_ETHCamelia Groza3-0/+40
Disable the FMan mEMAC 5 and 6 nodes from the fdt since they are not available under the supported RCW. Also disable the associated "fsl,dpa-ethernet" nodes that reference them. This is a simplified version of the fdt_fixup_fman_ethernet call for use under DM_ETH. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t2080rdb: add FMan v3 nodesCamelia Groza1-1/+68
Add the FMan v3 nodes for the T2080RDB. The nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15powerpc: dts: t2080: add QorIQ DPAA 1 FMan v3 nodesCamelia Groza1-0/+51
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T2080 SoC. The device tree nodes are copied over with little modification from the Linux kernel source code. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15ls1012a: use default scan_dev_for_bootMian Yousaf Kaukab5-35/+0
scan_dev_for_efi is supposed to be called from scan_dev_for_boot. However, this call is missing for ls1012a boards. As a result EFI boot doesn’t work. Fix this issue by removing custom definition of scan_dev_for_boot and use the default definition instead. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15board: sl28: add config to enable console output on SER0Michael Walle4-1/+34
Sometimes it is desireable to have the console output on the first serial line. Introduce a configuration option for it (in the board scope). Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15board: sl28: enable DM_SERIALMichael Walle2-2/+1
With all preparations in place, switch over to DM_SERIAL. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15board: sl28: move DM_* configs to KconfigMichael Walle2-17/+19
Move the CONFIG_DM_* from the defconfig to the TARGET_SL28 config. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15armv8: fsl-layerscape: spl: call spl_early_init()Michael Walle1-0/+8
DM_SERIAL needs both the device tree as well as an early heap. Thus, we have to call spl_early_init() to initialize the memory allocator and the setup the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15armv8: fsl-layerscape: spl: add debug UART supportMichael Walle1-0/+3
To use the debug UART we have to call debug_uart_init() in the SPL. Do so as soon as possible. As an example, here is how you can use it on a LS1028A SoC: CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0x21c0500 CONFIG_DEBUG_UART_CLOCK=200000000 Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15freescale: ls1021atwr: Drop use of CONFIG_RESETSimon Glass2-5/+4
It is not recommended to use CONFIG_xxx defines for things which are not Kconfig options. Rename this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15doc: board: qemu-ppce500: Document eTSEC usageBin Meng1-0/+5
Document how to launch a QEMU session with eTSEC as a network device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15ppc: qemu: Enable eTSEC supportBin Meng1-0/+4
QEMU ppce500 target can dynamically instantiate an eTSEC device if "-device eTSEC" is given to QEMU. This commit enables eTSEC driver and the required fixed PHY driver to create a usable network configuration using eTSEC. Unlike a real world 85xx board that usually stores the eTSEC MAC address in an EEPROM, CONFIG_NET_RANDOM_ETHADDR is required for QEMU otherwise U-Boot ethernet initialization complains no valid ethernet address is set. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15ppc: qemu: Create a virtual memory mapping of the platform busBin Meng3-0/+36
QEMU ppce500 target can dynamically instantiate an eTSEC device on a platform bus if "-device eTSEC" is given to QEMU. It is presented as a "simple-bus" in the device tree, with an additional compatible string "qemu,platform". Let's create a virtual memory mapping for it in misc_init_r(), in preparation to adding eTSEC support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15test: dm: Add a test case for simple-bus <ranges>Bin Meng3-0/+35
This adds a test case to verify reading <ranges> of a simple-bus is working as expected. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15dm: core: Correctly read <ranges> of simple-busBin Meng3-10/+41
At present we decode simple bus <ranges> using the following assumption: - parent #address-cells 1 - child #address-cells 1 - child #size-cells 1 However this might not always be the case. Update to use fdt_addr_t and fdt_size_t in 'struct simple_bus_plat', and use fdt_read_ranges() to correctly decode it according to the actual parent and child #address-cells / #size-cells under a Kconfig option CONFIG_SIMPLE_BUS_CORRECT_RANGE which can be turned on for any board that needs it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: tsec: Support <reg> property from the subnode "queue-group"Bin Meng1-3/+27
At present the tsec driver uses a non-standard DT bindings to get its <reg> base / size. The upstream Linux kernel seems to require the <reg> base / size to be put under a subnode of the eTSEC node with a name prefix "queue-group". This is not documented in the kernel DT bindings, but it looks every dtsi file that contains the eTSEC node was written like this. This commit updates the tsec driver to handle this case. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15dt-bindings: net: Update Freescale TSEC to support "queue-group"Bin Meng1-1/+18
At present the Freescale TSEC node DT bindings doc requires a <reg> property in the TSEC node. But this might not always be the case. In the upstream Linux kernel, there is no DT bindings doc for it but the kernel driver tests a subnode of a name prefixed with "queue-group", as we can see from gfar_of_init(): for_each_available_child_of_node(np, child) { if (!of_node_name_eq(child, "queue-group")) ... in drivers/net/ethernet/freescale/gianfar.c Update our DT bindings to describe this alternate description. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: tsec: Use map_physmem() directly instead of dev_remap_addr()Bin Meng1-1/+3
dev_remap_addr() eventually calls dev_read_addr_index(), while pdata->iobase holds the return value of dev_read_addr() that calls dev_read_addr_index() too. Such duplication can be avoided by using map_physmem() directly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15test: dm: Add a case to test ofnode_phy_is_fixed_link()Bin Meng2-5/+19
This adds a test case to test the new ofnode_phy_is_fixed_link() API. Both the new and old DT bindings are covered. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15sandbox: Add a DSA sandbox driver and unit testClaudiu Manoil9-5/+329
The DSA sandbox driver is used for unit testing the DSA class code. It implements a simple 2 port switch plus 1 CPU port, and uses a very simple tag to identify the ports. The DSA sandbox device is connected via CPU port to a regular Ethernet sandbox device, called 'dsa-test-eth, managed by the existing eth sandbox driver. The 'dsa-test-eth' is not intended for testing the eth class code however, but it is used to emulate traffic through the 'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa sandbox driver registers a tx handler for the 'dsa-test-eth' device. The switch ports, labeled as 'lan0' and 'lan1', are also registered as eth devices by the dsa class code this time. So pinging through these switch ports is as easy as: => setenv ethact lan0 => ping 1.2.3.5 Unit tests for the dsa class code were also added. The 'dsa_probe' test exercises most API functions from dsa.h. The 'dsa' unit test simply exercises ARP/ICMP traffic through the two switch ports, including tag injection and extraction, with the help of the dsa sandbox driver. I took care to minimize the impact on the existing eth unit tests, though some adjustments needed to be made with the addition of extra eth interfaces used by the dsa unit tests. The additional eth interfaces also require MAC addresses, these have been added to the sandbox default environment. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Message-Id: <20210216224804.3355044-5-olteanv@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: tsec: Use dm_eth_phy_connect() directly for the DM caseVladimir Oltean1-5/+1
Now that the fixed phy driver has been fully adapted to OF APIs, and dm_eth_phy_connect() already can handle the fixed phy, call dm_eth_phy_connect() directly in the DM tsec driver. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20210216224804.3355044-4-olteanv@gmail.com> [bmeng: split from "net: mdio: teach dm_eth_phy_connect to connect to fixed PHY"] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: fixed: Support the old DT bindingBin Meng1-3/+23
Update fixedphy_probe() to support the old DT binding. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: fixed: Add the missing ending newlineBin Meng1-1/+1
The printf statement doesn't end with a newline. Add it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: fixed: Make driver ops staticBin Meng1-4/+4
The PHY driver ops should be made static. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: Simplify the logic of phy_connect_fixed()Bin Meng1-8/+8
Simplify the logic of phy_connect_fixed() by using the new API ofnode_phy_is_fixed_link(), which brings additional bonus of supporting the old DT bindings. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: xilinx: Drop #ifdef CONFIG_DM_ETH around phy_connect_gmii2rgmii()Bin Meng2-6/+1
At present phy_connect_gmii2rgmii() is implemented using a DM API dev_of_offset() hence it cannot support a non-DM configuration. Remove the non-DM version prototype of phy_connect_gmii2rgmii() and make the driver depend on CONFIG_DM_ETH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: xilinx: Be compatible with live OF treeBin Meng2-44/+40
Following the same updates that were done to the fixed phy driver, use ofnode_ APIs instead of fdt_ APIs so that the Xilinx PHY driver can support live DT. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: fixed: Drop #ifdef CONFIG_DM_ETH around phy_connect_fixedVladimir Oltean1-6/+0
In drivers/net/phy/Kconfig, CONFIG_PHY_FIXED already depends on CONFIG_DM_ETH, so the function prototype definition when CONFIG_DM_ETH=n does nothing, so it can be dropped. It is also never reachable, since the whole function is already under #ifdef CONFIG_PHY_FIXED (which again, as I said, depends on CONFIG_DM_ETH=y). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20210216224804.3355044-3-olteanv@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15net: phy: fixed: Be compatible with live OF treeVladimir Oltean3-26/+36
On systems that use CONFIG_OF_LIVE, the "ofnode" type is defined as const struct device_node *np, while on the flat DT systems it is defined as a long of_offset into gd->fdt_blob. It is desirable that the fixed PHY driver uses the higher-level ofnode abstraction instead of parsing gd->fdt_blob directly, because that enables it to work on live OF systems. The fixed PHY driver has used a nasty hack since its introduction in commit db40c1aa1c10 ("drivers/net/phy: add fixed-phy / fixed-link support"), which is to pass the long gd->fdt_blob offset inside int phydev->addr (a value that normally holds the MDIO bus address at which the PHY responds). Even ignoring the fact that the types were already mismatched leading to a potential truncation (flat OF offset was supposed to be a long and not an int), we really cannot extend this hack any longer, because there's no way an int will hold the other representation of ofnode, the struct device_node *np. So we unfortunately need to do the right thing, which is to use the framework introduced by Grygorii Strashko in commit eef0b8a930d1 ("net: phy: add ofnode node to struct phy_device"). This will populate phydev->node for the fixed PHY. Note that phydev->node will not be valid in the probe function, since that is called synchronously from phy_device_create and we really have no way of passing the ofnode directly through the phy_device_create API. So we do what other drivers do too: we move the OF parsing logic from the .probe to the .config method of the PHY driver. The new function will be called at phy_config() time. I do believe I've converted all the possible call paths for creating a PHY with PHY_FIXED_ID, so there is really no reason to maintain compatibility with the old logic of retrieving a flat OF tree offset from phydev->addr. We just pass 0 to phydev->addr now. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20210216224804.3355044-2-olteanv@gmail.com> [bmeng: keep fixedphy_probe(); update mdio-uclass.c to handle fixed phy] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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