aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2007-10-16Make MPC8266ADS board compile again.runet@innovsys.com1-0/+2
Signed-off-by: Runet Torgersen <runet@innovsys.com>
2007-10-16Merge branch 'master' of git+ssh://gemini_vpn/home/wd/git/u-boot/masterWolfgang Denk1-9/+21
2007-10-1686xx: Allow for fewer DDR slots per memory controller.Jon Loeliger1-9/+21
As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-10-15Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk1-40/+72
2007-10-15Merge branch 'master' of git://www.denx.de/git/u-boot-usbWolfgang Denk1-40/+72
2007-10-15Merge branch 'master' of git+ssh://gemini_vpn/home/wd/git/u-boot/masterWolfgang Denk1-0/+16
2007-10-15PXA USB OHCI: "usb stop" implementation.Rodolfo Giometti1-0/+16
Some USB keys need to be switched off before loading the kernel otherwise they can remain in an undefined status which prevents them to be correctly recognized by the kernel. Signed-off-by: Rodolfo Giometti <giometti@linux.it>
2007-10-15ppc4xx: Fix bug in I2C bootstrap values for Sequoia/RainierStefan Roese1-2/+7
The I2C bootstrap values that can be setup via the "bootstrap" command, were setup incorrect regarding the generation of the internal sync PCI clock. The values for PLB clock == 133MHz were slighly incorrect and the values for PLB clock == 166MHz were totally incorrect. This could lead to a hangup upon booting while PCI configuration scan. This patch fixes this issue and configures valid PCI divisor values for the sync PCI clock, with respect to the provided external async PCI frequency. Here the values of the formula in the chapter 14.2 "PCI clocking" from the 440EPx users manual: AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz 33MHz async PCI frequency: PLB = 133: => 32 <= 44.3 <= 65 (div = 3) PLB = 166: => 32 <= 55.3 <= 65 (div = 3) 66MHz async PCI frequency: PLB = 133: => 65 <= 66.5 <= 132 (div = 2) PLB = 166: => 65 <= 83 <= 132 (div = 2) Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & YosemiteStefan Roese4-5/+13
The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15TQM860M: adjust for doubled flash sector size.Martin Krause1-4/+9
Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-10-15TQM8xx: Fix CAN timing.Jens Gehrlein1-7/+9
Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-10-15TQM866M: fix SDRAM refreshMartin Krause1-16/+20
At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 97. This result in a refresh rate of 4 * 7.8 us at the default clock 50 MHz. At 133 MHz the value will be then 4 * 2.9 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-10-15TQM866M: adjust for doubled flash sector size.Martin Krause1-4/+9
Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-10-14[FIX] XUPV2P change command handlingMichal Simek1-19/+17
and remove code violation
2007-10-14Merge git://www.denx.de/git/u-bootMichal Simek46-442/+3332
2007-10-14Merge ../master/Michal Simek85-182/+636
2007-10-14Prepare for 1.3.0-rc3 releasev1.3.0-rc3Wolfgang Denk2-2/+341
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-13Fix warning differ in signedness in cpu/pxa/mmc.cJean-Christophe PLAGNIOL-VILLARD1-3/+3
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-10-13Fix warning differ in signedness in board/mpl/vcma9/vcma9.cWolfgang Denk1-2/+2
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-13Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk4-18/+38
2007-10-13Merge branch 'merge' of git://www.denx.de/git/u-boot-microblazeWolfgang Denk9-52/+64
2007-10-13Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeWolfgang Denk0-0/+0
2007-10-13Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flashWolfgang Denk14-4/+2400
2007-10-13Coding Style cleanup.Wolfgang Denk5-22/+194
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-13Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk7-314/+222
2007-10-12GP3 SSA: enable RTCWolfgang Denk1-7/+13
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-10Merge branch 'master' of /.automount/castor-vlab/root/home/wd/git/u-boot/master/Wolfgang Denk1-1/+1
2007-10-10Merge branch 'hellrosa_i2c' of /home/gjb/git/u-bootWolfgang Denk1-0/+9
2007-10-10Merge branch 'tqm5200_default_env' of /home/tur/git/u-bootWolfgang Denk1-16/+23
2007-10-09[ads5121] EEPROM support added.Grzegorz Bernacki1-0/+9
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-06AVR32: Initialize bi_flash* in board_init_rHaavard Skinnemoen2-5/+11
The ATSTK1000-specific flash driver intializes bi_flashstart, bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI driver, don't. Initialize these in board_init_r instead so that things will still be set up correctly when we switch to the CFI driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-05tqm5200: Fix CONFIG_CMD_PCI typo in board config file.Marian Balakowicz1-1/+1
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2007-10-05CM5200: Fix missing null-termination in hostname manipulation codeBartlomiej Sieka1-0/+1
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-10-04Merge with git://www.denx.de/git/u-boot.gitPeter Pearse11-27/+413
2007-10-02Fix memtest breakageHaavard Skinnemoen1-6/+2
CFG_MEMTEST_START uses weird magic involving gd, which fails to compile. Use hardcoded values instead (we actually know how much RAM we have on board.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-02Merge commit 'origin/master'Haavard Skinnemoen549-17597/+52316
2007-10-02Merge with git://www.denx.de/git/u-boot.gitStefan Roese1-0/+2
2007-10-02ppc4xx: Coding style cleanupStefan Roese3-13/+13
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yetStefan Roese1-0/+5
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02Program EPLD to force full duplex mode for PHY.Grzegorz Bernacki2-9/+20
EPLD forces modes of PHY operation. By default full duplex is turned off. This fix turns it on. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-02Bugfix: Use only one PTD for one endpointTimo Ketola1-40/+72
Original isp116x-hcd code prepared multiple PTDs for longer than 16 byte transfers for one endpoint. That is unnecessary because the ISP116x is able to split long data from one PTD into multiple transactions based on the buffer size of the endpoint. It also caused serious problems if the endpoint NAKed some of the transactions. In that case ISP116x wouldn't notice that the other PTDs were for the same endpoint and would try the other PTDs possibly out of order. That would break the whole transfer. This patch makes isp116x_submit_job to use one PTD for one transfer. Signed-off-by: Timo Ketola <timo.ketola@exertus.fi> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2007-09-28Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serialJean-Christophe PLAGNIOL-VILLARD1-0/+2
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-09-27Merge branch 'master' of /home/stefan/git/u-boot/lwmon5Stefan Roese1-4/+5
2007-09-27ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test)Stefan Roese1-1/+1
Signed-off-by: Stefan Roese <sr@denx.de>
2007-09-26Merge with git+ssh://gemini_vpn/home/wd/git/u-boot/masterWolfgang Denk1-1/+1
2007-09-26Fpga: fix incorrect test of CFG_FPGA_XILINX macroGrant Likely1-1/+1
CFG_FPGA_XILINX is a bit value used to test against the value in CONFIG_FPGA. Testing for a value will always return TRUE. I don't think that is the intention in this code. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-09-24Merge branch 'master' of git://www.denx.de/git/u-bootKim Phillips81-175/+626
2007-09-24[FIX] change command handling and removing code violationMichal Simek1-26/+24
2007-09-24[FIX] change sets of commandsMichal Simek1-10/+8
because changing of command handling brings compilation problems
2007-09-24[FIX] Email reparation & CopyrightMichal Simek2-3/+3
Both codes are written by myself without any support from CTU
generated by cgit v1.1 at 2024-07-15 21:56:18 +0000