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2018-10-29Prepare v2018.11-rc3v2018.11-rc3Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-29Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini11-39/+120
2018-10-29sunxi: store DRAM size in SPL headerAndre Przywara2-2/+29
At the moment we rely on the infamous get_ram_size() function to learn the actual DRAM size in U-Boot proper. This function has two issues: 1) It only works if the DRAM size is a power of two. We start to see boards which have 3GB of (usable) DRAM, so this does not fit anymore. 2) As U-Boot has no notion of reserved memory so far, it will happily ride through the DRAM, possibly stepping on secure-only memory. This could be a region of DRAM reserved for OP-TEE or some other secure payload, for instance. It will most likely crash in that case. As the SPL DRAM init routine has very accurate knowledge of the actual DRAM size, lets propagate this wisdom to U-Boot proper. We re-purpose a currently reserved word in our SPL header for that. The SPL itself stores the detected DRAM size there, and bumps the SPL header version number in that case. U-Boot proper checks for a valid SPL header and a high enough version number, then uses the DRAM size from there. If the SPL header field is not sufficient, we fall back to the old DRAM scanning routine. Part of the DRAM might be present and probed by SPL, but not accessible by the CPU. They're restricted in the main U-Boot binary, when accessing the DRAM size from SPL header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: add Kconfig option for the maximum accessible DRAMIcenowy Zheng1-0/+6
Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is accessible. Add a Kconfig option for the maximum accessible DRAM. For A80 it should be a much higher value (8GiB), but as I have no A80 device to test and originally U-Boot only supports 2GiB DRAM on A80, it currently still falls under the 2GiB situation. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: map DRAM part with 3G sizeIcenowy Zheng1-1/+1
All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: board.c: refactor SPL header checksAndre Przywara1-11/+30
So far we have two users which want to look at the SPL header. We will get more in the future. Refactor the existing SPL header checks into a common function, to simplify reusing the code. Now that this is easy, add proper version checks to the DT name parsing. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: Extend SPL header versioningAndre Przywara2-7/+16
On Allwinner SoCs we use some free bytes at the beginning of the SPL image to store various information. We have a version byte to allow updates, but changing this always requires all tools to be updated as well. Introduce the concept of semantic versioning [1] to the SPL header: The major part of the version number only changes on incompatible updates, a minor number bump indicates backward compatibility. This patch just documents the major/minor split, adds some comments to the header file and uses the versioning information for the existing users. [1] https://semver.org Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: disable Pine A64 model detection code on other boardsIcenowy Zheng3-0/+14
The Pine A64 Plus/non-Plus model detection code is now built on all 64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in use. Disable them when the board is Pine A64 by adding a Kconfig option that is only selected on Pine A64. On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and saves a 104 byte strstr() function, then makes SPL on H6 succeed to build. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-28Merge git://git.denx.de/u-boot-x86Tom Rini6-28/+36
2018-10-28drivers: cosmetic: Convert SPDX license tags to Linux Kernel stylePatrick Delaunay24-38/+32
Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style"). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-28x86: Fix car_uninit weak symbol definitionBin Meng1-6/+6
Since commit 80df194f0165 ("x86: detect unsupported relocation types"), an error message is seen on QEMU x86 target during boot: do_elf_reloc_fixups32: unsupported relocation type 0x1 at fff841f0, offset = 0xfff00087 do_elf_reloc_fixups32: unsupported relocation type 0x2 at fff841f8, offset = 0xfff00091 Check offset 0xfff00087 and 0xfff00091 in the u-boot ELF image, fff00087 000df401 R_386_32 00000000 car_uninit fff00091 000df402 R_386_PC32 00000000 car_uninit we see R_386_32 and R_386_PC32 relocation type is generated for symbol car_uninit, which is declared as a weak symbol in start.S. However the actual weak symbol implementation ends up nowhere. As we can see below, it's *UND*. $ objdump -t u-boot | grep car_uninit 00000000 w *UND* 00000000 car_uninit With this fix, it is normal now. $ objdump -t u-boot | grep car_uninit fff00094 w F .text.start 00000001 car_uninit Reported-by: Hannes Schmelzer <hannes@schmelzer.or.at> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-10-28x86: theadorable-x86-xxx_defconfig: Move VGA BIOS to make room for U-BootStefan Roese3-3/+3
The build breaks because its not fitting the U-Boot binary into the ROM image. So lets move VGA BIOS a bit to make room for the grown U-Boot binary. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-28x86: theadorable-x86: Generate and pass root=PARTUUID instead of /dev/sdaXStefan Roese3-14/+23
To enable the root device selection (kernel cmd-line) via PARTUUID, this patch enables CMD_PART on all missing theadorable-x86 boards and changes the default environment to generate the root=PARTUUID string automatically. This fixes problems that have been noticed on systems with multiple SATA/AHCI controller connected via PCIe, where the device name for the root device / partition (/dev/sdaX) was incorrect. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-28x86: theadorable-x86-common: Change pci hotplug cmdline parameters (again)Stefan Roese1-2/+1
This is needed for the PCIe hotplug to work correctly on some boards with the newer Linux kernel versions. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-28x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / regionStefan Roese1-3/+3
To allow bigger 64 bit prefetchable PCI regions in Linux, this patch changes the base address and range of the ACPI area passed to Linux. BayTrail can only physically access 36 bit of PCI address space. So just chaning the range without changing the base address won't work here, as 0xf.ffff.ffff is already the maximum address. With this patch, a maximum of 16 GiB of local DDR is supported. This should be enough for all BayTrail boards though. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-26vf610twr: Enable thumb2 for buildsTom Rini2-0/+4
To help with size constraints, enable thumb2 when building. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-25Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini63-86/+446
2018-10-25Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini144-282/+9488
Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25arm: dts: imx8qxp: fix build wariningPeng Fan1-2/+0
Fix below build warning. arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size): /regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-25imx: mkimage: avoid stop CI when required files not existsPeng Fan2-2/+37
Introduce a new script to check whether file exists and use that check in Makefile to avoid break CI system. The script return 1 when the required files not exists, return 0 when files exists. The script will ignore check to u-boot-dtb.bin, because if there is something wrong to generate u-boot-dtb.bin, there must be some code error. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-24net: fec_mxc: add support for i.MX8XAnatolij Gustschin3-4/+61
Add compatible property and enable the FEC ipg clock when probing on i.MX8X. Add specific function for reading FEC clock rate via clock driver when configuring MII speed register. Allow FEC_MXC selection for i.MX8. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: mvpp2: increase PHY reset pulseBaruch Siach1-1/+1
The default Linux PHY reset delay is 10ms. This is also the requirement for Marvell 88E151x PHYs, which are likely to be used with this Ethernet MAC. Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Roese <sr@denx.de>
2018-10-24net: mvpp2: fix polarity of PHY reset signalBaruch Siach1-2/+2
The dm_gpio_set_value() call sets the logical level of the GPIO signal. That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The driver needs to assert the reset, and then deassert it. Not the other way around. Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Roese <sr@denx.de>
2018-10-24net/phy: Add phy-id for IN112525_S03Priyanka Jain1-3/+4
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: dm: fec: Obtain the transceiver type from the DTMartin Fuzzey1-1/+20
The DT property "phy-mode" already provides the transceiver type. Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: dm: fec: Support the phy-supply bindingMartin Fuzzey2-0/+23
Configure the phy regulator if defined by the "phy-supply" DT phandle. Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: dm: fec: Fix phy-reset-duration clamping and defaultsMartin Fuzzey1-11/+8
The DT binding says: - phy-reset-duration : Reset duration in milliseconds. Should present only if property "phy-reset-gpios" is available. Missing the property will have the duration be 1 millisecond. Numbers greater than 1000 are invalid and 1 millisecond will be used instead. However the current code: - clamps values greater than 1000ms to 1000ms rather than 1. - does not initialize the delay if the property does not exist (else clause mismatch) - returns an error if phy-reset-gpios is not defined Fix all this and simplify by using dev_read_u32_default() Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: dm: fec: Fix time unit error in phy-reset-durationMartin Fuzzey1-1/+1
The DT binding says that phy-reset-duration is in ms, but the driver currently uses udelay(). Switch to mdelay() to fix this. Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: phy: aquantia: autodetect if firmware needs to be loadedJeremy Gebben1-6/+22
If the phy reports a valid firmware version and doesn't indicate a fault, skip loading the firmware. This allows the same image to be used on boards that have firmware storage and those that do not. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24net: phy: aquantia: add firmware loading supportJeremy Gebben2-2/+256
Aquantia phys have firmware that can be loaded automatically from storage directly attached to the phy or via MDIO commands. Add support for loading firmware from either a file or a raw location on an MMC device. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24configs: migrate CONFIG_PHY_AQUANTIA to KconfigJeremy Gebben55-61/+48
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24miiphy: Add function to retrieve MDIO bus list headPankaj Bansal2-0/+6
In upcoming freescale board LX2160AQDS, the MDIO bus is muxed. i.e. same MDIO bus can be routed to eight different slots depending on mux register settings. To support this mdio mux behavior, we add each MDIO bus mux as a separate MDIO bus. Now, various phy devices can be attached to each of these slots(mux). The information about these devices is passed to OS via device tree. To do the fdt fixups related to MDIO bus, its necessary that MDIO bus list is accessed.Therefore, add a function to retrieve the list head. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24cmd: mii: don't check address for 'device' subcommandHector Palacios1-1/+1
All mii operations require a valid PHY address except the 'device' command, which expects the PHY name rather than the address. Signed-off-by: Hector Palacios <hector.palacios@digi.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-24sunxi: display: Mark sunxi_rgb2yuv_coef array as constPriit Laes1-1/+1
sunxi_rgb2yuv_coef is readonly and never modified. Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24sunxi: docs: Mention CONFIG_NAND requirementPriit Laes1-3/+3
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24sunxi: Fix typos of spelling AllwinnerPriit Laes3-3/+3
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24pwm: sunxi: choose best prescaler to improve PWM resolutionVasily Khoruzhick1-13/+19
Choose best prescaler to improve PWM resolution. Without this change driver chooses first prescaler that gives us period value within range, but it could be not the best one. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24pwm: sunxi: use new prescaler when configuring PWMVasily Khoruzhick1-1/+1
Looks like old prescaler was used when configuring PWM, fix it. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24pwm: sunxi: fix off-by-one that prevented PWM to use prescaler bypassVasily Khoruzhick1-1/+1
Fix off-by-one that prevented PWM driver to use prescaler bypass. Without this change prescaler is always enabled. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfigFabio Estevam1-0/+1
Add an entry for the warp7_bl33_defconfig target. This fixes the following warnings: WARNING: no status info for 'warp7_bl33' WARNING: no maintainers for 'warp7_bl33' Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
2018-10-23Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini4-6/+18
2018-10-23travis: Rework Freescale ARM jobs a bitTom Rini1-5/+11
- Split the AArch64 LS10xx and LS20xx builds into their own jobs, and then exclude only ls1/ls2 from the catch-all. This moves the S32V234 job (and future i.MX8*) to the catch-all. - Split spear out from arm926ejs and exclude freescale, not mx from that job. The older Freescale i.MX boards are caught by the catch-all job for Freescale but now we build the non-Freescale older i.MX platforms. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-23ARM: Samsung: Add Exynos5422-based Odroid HC2 supportDirk Meul4-6/+18
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1. The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used for the Odroid HC2. Resend because MUA changed whitespace. Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-10-22binman: Add a test for Intel reference codeSimon Glass2-0/+21
Unfortunately the test was not included in the original implementation. Add one. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-22Merge git://git.denx.de/u-boot-x86Tom Rini13-45/+111
2018-10-22serial: mxc: Add match string for i.mx6 quad/dual lite serialBernhard Messerklinger1-0/+1
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2018-10-22arm: ti: boot: Remove environment partitionSam Protsenko1-3/+0
Remove "environment" partition and do not read it when booting Android from eMMC. We don't use this partition anymore, so this is just an unintentional leftover. Earlier we were reading dtb file from "environment" partition to feed it further to kernel. Now we are using dtb from FIT image ("boot" partition contains boot_fit.img image), which can be seen from this command: bootm ${loadaddr}#${fdtfile} where "#" character means we have FIT image in ${loadaddr} RAM address. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Praneeth Bajjuri <praneeth@ti.com>
2018-10-22watchdog: aspeed: restore default value of reset_maskCédric Le Goater2-0/+10
This is required for the current Linux kernel to reboot. It should also probably be fixed in Linux. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-22ARM: omap3_logic: Add NOR Flash Support for SOM-LVAdam Ford4-7/+70
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR flash part connected to CS2 in addition to the NAND part on CS0. This patch setups the GPMC timings for the MT28 NOR Flash and enables the CFI-Flash driver now that the CFI stuff is in Kconfig Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22arm: udoo: Convert to distro configMeul, Dirk2-89/+25
Instead of keeping a custom environment, use a more generic approach by switching to distro config. Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
generated by cgit v1.1 at 2024-09-16 17:11:07 +0000