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2021-03-12Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/12Mar2021Tom Rini23-175/+37
- Some more updates/sync's to A38x DDR3 code (Marek & Pali) - marvell/ddr/AXP: Some type fixes found in the LTO work (Marek) - Espressobin: Enable more options (Pali) - pci-aardvark: Implement workaround for the readback value of VEND_ID (Paili)
2021-03-12arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár9-126/+3
Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12arm: a37xx: pci: Implement workaround for the readback value of VEND_IDPali Rohár1-0/+10
Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243): The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it should read 11ABh. The firmware can write the correct value, 11ABh, through VEND_ID (RD0076044h [15:0]). Implement this workaround in U-Boot PCIe controller driver aardvark for both PCI vendor id and PCI subsystem vendor id. This change affects PCI vendor id of PCIe root bridge emulated by Linux kernel. With this change Linux kernel reports correct vendor id 11AB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12arm: mvebu: Espressobin: Enable additional optionsPali Rohár1-1/+4
Enable support for NVMe disks which can be connected to mPCIe slot via M.2 reduction. Enable btrfs and squashfs filesystems which are used by more Linux distributions. And enable fsuuid and setexpr commands which can be useful in scripting. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12ddr: marvell: axp: fix array types have different bounds warningMarek Behún2-3/+3
The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have different bounds declared in header files where these variables are also defined from the ones declared in source files. This causes the compiler to complain (when building with LTO): ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match original declaration [-Wlto-type-mismatch] ddr3_patterns_64bit.h:911:5: note: array types have different bounds ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously declared here ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:167:4: note: array types have different bounds ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared here ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:196:4: note: array types have different bounds ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared here CI managed to trigger this as an error when compiling with LTO for AXP. Fix this by using values from the header files, which seem to be the correct ones. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-03-12ddr: marvell: axp: align signature of mv_xor_mem_init() with a38xMarek Behún2-4/+4
In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common XOR definitions, regardless whether we compile for axp or a38x. But the declaration of this function has a different signature in axp's xor.h from the one used in a38x' implementation - one parameter is u64 instead of u32. This can result in wrong argument's being passed to that function on a38x with no one the wiser. I discovered this when building U-Boot for Turris Omnia with LTO. The compiler complains about the different signatures being thrown into the same linking process: axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match original declaration [-Wlto-type-mismatch] 67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, | ^ a38x/xor.c:165:5: note: type mismatch in parameter 3 165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long | ^ a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match type ‘u32’ Fix this by changing the type of the block_size argument in the axp's implementation and header file to the one used in a38x (and upstream mv-ddr-marvell). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repositoryPali Rohár10-40/+6
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the commit 7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot"). This patch was created by following steps: 1. Replace all a38x files in U-Boot tree by files from upstream github Marvell mv-ddr-marvell repository. 2. Run following command to omit portions not relevant for a38x and ddr3: files=drivers/ddr/marvell/a38x/* sed 's/#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)/#ifdef TRUE/' -i $files unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 -UCONFIG_APN806 \ -UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \ -UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DTRUE $files 3. Manually omit SPDX-License-Identifier changes from this patch as upstream license in upstream github repository contains long license texts and U-Boot is using just SPDX-License-Identifier. After applying this patch, a38x ddr3 code in upstream Marvell github repository and in U-Boot would be fully identical. So in future applying above steps could be used to sync code again. The only change in this patch is removal of dead code and some fixes with include files. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12ddr: marvell: a38x: Add more space for additional info from SPDSujeet Baranwal1-1/+7
commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream. At this moment, only page 0 of SPD is being read but to support smbios, we need to read page 1 also which has more info. In order to do that, we need to allocate more space. Signed-off-by: Sujeet Baranwal <sujeet.baranwal@cavium.com> Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Sujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-03-10Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini1-0/+3
2021-03-10usb: mtu3: flush cache for next GPDChunfeng Yun1-0/+3
When flush cache of the current GPD and resume QMU, the controller will try to access the next GPD after processing the current one, if not flush the next GPD, the controller may get wrong GPD status. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-03-09Merge https://source.denx.de/u-boot/custodians/u-boot-x86WIP/09Mar2021Tom Rini5-10/+30
- Various minor fixes for x86
2021-03-09x86: Select advanced Intel code only if allowedSimon Glass2-0/+16
At present most of the Intel-specific code is built on all devices, even those which don't have software support for the features provided there. This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does not have the required features. Add a new INTEL_SOC option to control this access. This must be selected by SoCs that can support the required features. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in arch/x86/Kconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: Move INTEL_ACPIGEN to arch/x86Simon Glass2-9/+9
This option is better placed in the x86 code since it is not generic enough to be in the core code. Move it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in arch/x86/Kconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: Fix member check in intel_gnvsSimon Glass1-0/+4
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: sizeof-array-div error in lpc_common_early_initHeinrich Schuchardt1-1/+1
Building qemu-x86_64_defconfig with GCC 11.0 fails with: arch/x86/cpu/intel_common/lpc.c: In function ‘lpc_common_early_init’: arch/x86/cpu/intel_common/lpc.c:56:40: error: expression does not compute the number of elements in this array; element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’} [-Werror=sizeof-array-div] 56 | sizeof(values) / sizeof(u32)); | ^ arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the second ‘sizeof’ to silence this warning arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here 50 | } values[4], *ptr; | ^~~~~~ Add parentheses to silence warning. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-08Merge tag 'u-boot-amlogic-20210308' of ↵Tom Rini2-7/+8
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - button: adc: fix treshold typo - configs: meson64: add fdtoverlay_addr_r
2021-03-08Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-bootTom Rini24-30/+484
- Add VAB support
2021-03-08configs: meson64: add fdtoverlay_addr_rNeil Armstrong1-0/+1
In order to support loading FTD Overlays when booting with the pxe command (or extlinux.conf), supported with [1], add the missing fdtoverlay_addr_r used to load the overlay before applying it to the FDT loaded at fdt_addr_r. [1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-narmstrong@baylibre.com/ Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-03-08button: adc: fix treshold typoNeil Armstrong1-7/+7
Fix the treshold typo in code by threshold. Fixes: c0165c85c3 ("button: add a simple Analog to Digital Converter device based button driver") Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2021-03-08Makefile: socfpga: Add target to generate hex output for combined spl and dtbDalon Westergreen3-6/+14
Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex" is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to generate the final configuration bitstream for Intel SOCFPGA SOC64 devices. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08configs: socfpga: Add defconfig for Agilex with VAB supportSiew Chin Lim1-0/+75
Booting Agilex with Vendor Authorized Boot. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfigSiew Chin Lim5-7/+9
CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to *_defconfig file for both Stratix 10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08arm: socfpga: dts: soc64: Update filename in binman node of FIT image with ↵Siew Chin Lim1-0/+22
VAB support FIT image of Vendor Authentication Coot (VAB) contains signed images. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08arm: socfpga: cmd: Support 'vab' commandSiew Chin Lim2-0/+35
Support 'vab' command to perform vendor authentication. Command format: vab addr len Authorize 'len' bytes starting at 'addr' via vendor public key Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)Siew Chin Lim7-5/+309
Vendor Authorized Boot is a security feature for authenticating the images such as U-Boot, ARM trusted Firmware, Linux kernel, device tree blob and etc loaded from FIT. After those images are loaded from FIT, the VAB certificate and signature block appended at the end of each image are sent to Secure Device Manager (SDM) for authentication. U-Boot will validate the SHA384 of the image against the SHA384 hash stored in the VAB certificate before sending the image to SDM for authentication. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-08arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64Siew Chin Lim7-12/+15
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-07Merge tag 'efi-2021-04-rc3-3' of ↵WIP/07Mar2021Tom Rini6-29/+242
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-04-rc3-3 New: * Provide library functions for converting UTF-8 streams either to code page 437 or Unicode code points. Bug fixes: * Fix the capsule update unit tests. * Use the terminal size of the video console if it is the primary output.
2021-03-07efi_loader: correct uboot_bin_env.its file formatHeinrich Schuchardt1-2/+2
Up to now the EFI capsule Python tests were always skipped. The reason is that mkimage fails with: uboot_bin_env.its:13.21-23.5: Warning (unit_address_vs_reg): /images/u-boot-bin@100000: node has a unit name, but no reg property uboot_bin_env.its:24.21-34.5: Warning (unit_address_vs_reg): /images/u-boot-env@150000: node has a unit name, but no reg property If a unit in a device-tree has an address, a reg property must be provided. But adding a reg property is not the solution here. Since 2017 unit addresses are disallowed for FIT, cf. common/image-fit.c:1624. So remove the unit addresses in uboot_bin_env.its. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07lib/charset: UTF-8 stream conversionHeinrich Schuchardt3-9/+142
Provide functions to convert an UTF-8 stream to code page 437 or UTF-32. Add unit tests. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07lib/charset: utf8_get() should return errorHeinrich Schuchardt2-9/+23
utf8_get() should return an error if hitting an illegal UTF-8 sequence and not silently convert the input to a question mark. Correct utf_8() and the its unit test. console_read_unicode() now will ignore illegal UTF-8 sequences. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07efi_loader: carve out utf_to_cp()Heinrich Schuchardt4-16/+71
Carve out a function to translate a Unicode code point to an 8bit codepage. Provide a unit test for the new function. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07efi_loader: move codepage 437 tableHeinrich Schuchardt3-1/+12
Move the Unicode to codepage 437 table to charset.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07efi_loader: console size of vidconsoleHeinrich Schuchardt1-1/+1
If stdout is 'vidconsole', we correctly set the console size. If stdout is 'vidconsole,serial', the video console is ignored. We should always evaluate the size of vidconsole if it is the primary console. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-06Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqWIP/06Mar2021Tom Rini64-817/+924
- Convert qemu-ppce500 to driver model and enable additional driver support - bug fixes/updates in net-dsa driver, vid driver, move configs to kconfig - Update Maintainers of some powerpc, layerscape platforms
2021-03-05doc: Add a reST document for qemu-ppce500Bin Meng2-0/+89
Add a reST document to describe how to build and run U-Boot for the QEMU ppce500 machine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Move board directory from board/freescale to board/emulationBin Meng5-3/+5
board/emulation is the place for other QEMU targets like x86, arm, riscv. Let's move the qemu-ppce500 board codes there. List me as a co-maintainer for this board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop fixed_sdram()Bin Meng1-5/+0
This function is not called anywhere. Only fsl_ddr_sdram_size() is necessary [1] for QEMU. Drop it. [1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init() Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop a custom env variable 'fdt_addr_r'Bin Meng2-4/+1
Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Delete the temporary FDT virtual-physical mapping after U-Boot is ↵Bin Meng1-1/+10
relocated After U-Boot is relocated to RAM already, the previous temporary FDT virtual-physical mapping that was used in the pre-relocation phase is no longer needed. Let's delete the mapping. get_fdt_virt() might be used before and after relocation, update it to return different virtual address of FDT. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable RTC support via I2CBin Meng2-0/+6
The QEMU ppce500 target integrates a Freescale I2C controller and has a Pericom pt7c4338 RTC connected to it. Enable corresponding DM drivers so that 'date' command is actually useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable support for power off via GPIOBin Meng1-1/+5
The QEMU ppce500 target provides the power off functionality via the GPIO pin#0, and we can support this using the sysreset gpio poweroff driver. Let's enable it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05dm: sysreset: Add a Kconfig option for the 'reset' commandBin Meng2-0/+8
sysreset uclass driver provides an implementation of 'reset' command using the sysreset_ APIs unconditionally. It also supports the 'poweroff' command using the sysreset_ APIs, but under a Kconfig option CONFIG_SYSRESET_CMD_POWEROFF. Let's do the same for the 'reset' command, by introducing a new Kconfig option CONFIG_SYSRESET_CMD_RESET, and set it to on by default, to allow a board that don't have a sysreset reset driver yet, but have a sysreset poweroff driver to compile without any issue. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable GPIO supportBin Meng1-0/+3
QEMU ppce500 target integrates a GPIO controller that is compatible with the QorIQ GPIO controller. Enable the DM GPIO driver for it and the 'gpio' command. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05gpio: mpc8xxx: Support controller register physical address beyond 32-bitBin Meng2-4/+5
dev_read_addr_size_index() returns fdt_addr_t which might be a 64-bit physical address. This might be true for some 85xx SoCs whose CCSBAR is mapped beyond 4 GiB. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: mpc85xx: Add 'gpibe' register to 'struct ccsr_gpio'Bin Meng1-0/+1
Without this, the DM GPIO driver for MPC8xxx does not compile for MPC85xx SoCs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable VirtIO BLK supportBin Meng1-0/+3
Enable VirtIO BLK driver so that we can store a kernel image to a disk image and boot from there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05virtio: Fix VirtIO BLK driver dependencyBin Meng1-0/+1
The VirtIO BLK driver depends on the blk uclass driver. Add the dependency in the Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable VirtIO NET supportBin Meng2-0/+10
By default the QEMU ppce500 machine connects a VirtIO NET to the PCI controller, although it can be replaced to an e1000 NIC via additional command line options. Now that we have switched over to DM PCI, VirtIO support becomes possible. This commit enables the support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05cmd: Fix virtio command dependencyBin Meng1-0/+1
The 'virtio' command calls blk_common_cmd() which is only available when CONFIG_HAVE_BLOCK_DEVICE is on. Fix the Kconfig dependency. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop CONFIG_OF_BOARD_SETUPBin Meng2-8/+0
ft_board_setup() is now empty. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.1 at 2024-07-10 21:21:41 +0000