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2021-02-10Merge tag 'u-boot-amlogic-20210210' of ↵WIP/10Feb2021Tom Rini13-2/+1229
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Add configuration helpers for MIPI D-PHY - generic-phy: add configure op - Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver - odroid: add runtime detection of the N2/N2+/C4/HC4 variants
2021-02-10board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variantsMarek Szyprowski5-2/+98
Use the ADC channel 1 to check the hardware revision of the board and detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use different dtb file, so adjust fdtfile environment variable to the detected variant. The ADC min/max values for each variant are taken from the vendor code, adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit mode). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10phy: Add Amlogic AXG MIPI PCIe Analog PHY driverNeil Armstrong3-0/+243
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission and Analog part of the PCIe lines. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10phy: Add Amlogic AXG MIPI D-PHY driverNeil Armstrong3-0/+403
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI panels. This D-PHY depends on a separate analog PHY. Signed-off-by:Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10generic-phy: add configure opNeil Armstrong2-0/+34
Add the PHY configure op callback to the generic PHY uclass to permit configuring the PHY. It's useful for MIPI DSI PHYs to setup the link timings. Signed-off-by:Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-10phy: dphy: Add configuration helpersNeil Armstrong4-0/+451
The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-09Merge tag 'u-boot-stm32-20210209' of ↵WIP/09Feb2021Tom Rini16-93/+249
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Enable the fastboot oem commands in stm32mp15 defconfig - Fixes pinctrol for stmfx and stm32 - Add support of I2C6_K in stm32mp15 clock driver - Alignment with Linux kernel device tree v5.11-rc2 for ST boards
2021-02-09arm: dts: stm32mp15: alignment with v5.11-rc2Patrick Delaunay8-75/+200
Device tree alignment with Linux kernel v5.11-rc2 - fix DCMI DMA features on stm32mp15 family - Add alternate pinmux for FMC EBI bus - Harmonize EHCI/OHCI DT nodes name on stm32mp15 - update sdmmc IP version for STM32MP15 - Add LP timer irqs on stm32mp151 - Add LP timer wakeup-source on stm32mp151 - enable HASH by default on stm32mp15 - enable CRC1 by default on stm32mp15 - enable CRYP by default on stm32mp15 - set bus-type in DCMI endpoint for stm32mp157c-ev1 board - reorder spi4 within stm32mp15-pinctrl - add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx - fix mdma1 clients channel priority level on stm32mp151 - fix dmamux reg property on stm32mp151 - adjust USB OTG gadget fifo sizes in stm32mp151 - update stm32mp151 for remote proc synchronization support - support child mfd cells for the stm32mp1 TAMP syscon Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz abbreviationFabrice GIRARDOT2-2/+2
The kilohertz unit abbreviation should read 'kHz'. Note to STM32 team: modified files were generated, it may be worth to fix STM32CubeMX tool. Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09clk: stm32mp1: add support of I2C6_KPatrick Delaunay1-0/+1
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR = I2C6EN: I2C6 peripheral clocks enable. This patch allows customer to use I2C6 in SPL or in U-Boot as other I2C instance, already support in clk driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09pinctrl: stm32: bind only the enabled GPIO subnodePatrick Delaunay1-0/+3
Bind only the enabled GPIO subnode, to avoid to probe the node "gpio-controller" present in SOC dtsi (disabled by default) but not enabled in the included pincontrol dtsi file. For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent: gpioj: gpio@5000b000 gpiok: gpio@5000c000 Then these GPIO are absent in output of command "dm tree" and "gpio status -a" Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09pinctrl: stm32: correct management pin display of OTYPEPatrick Delaunay1-10/+8
OTYPE can be used for output or for alternate function to select PP = push-pull or OP = open-drain mode, according reference manual (Table 81. Port bit configuration table). This patch removes this indication for input pins and adds it for AF and output pins for pinmux command output. Fixes: b305dbc08b08 ("pinctrl: stm32: display bias information for all pins") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-09pinctrl: stmfx: Use PINNAME_SIZE for pin's name sizePatrice Chotard1-4/+3
Instead of redefining a pin's name size, use PINNAME_SIZE defined in include/dm/pinctrl.h Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09pinctrl: stmfx: Fix pin configuration issuePatrice Chotard1-4/+4
pin-controller pin's name must be equal to pin's name used in device tree with "pins" DT property. Issue detected on stm32mp157c-ev1 board with goodix touchscreen. In DT, the goodix's pin is declared in DT with the node: goodix_pins: goodix { pins = "gpio14"; bias-pull-down; }; Whereas in stmfx pin-controller driver, pin's name are equal to "stmfx_gpioxx" where xx is the pin number. This lead to not configure stmfx's pins at probe because pins is identified by its name (see pinctrl_pin_name_to_selector() in pinctrl-generic.c) and stmfx pin "gpio14" can't be found. To fix this issue, come back to the original stmfx pin's name. Revert "pinctrl: stmfx: update pin name" This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-02-09configs: stm32mp1: enable the fastboot oem command bootbusPatrick Delaunay2-0/+2
Enable the fastboot oem command bootbus, used to configure the eMMC boot behavior, with same format than 'mmc bootbus' and with parameter: boot_bus_width reset_boot_bus_width boot_mode On stm32mp1 boards the expected command is $> fastboot oem partconf:0 0 0 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09configs: stm32mp1: enable the fastboot oem command partconfPatrick Delaunay2-0/+2
Enable the fastboot oem command partconf, used to select the correct eMMC boot partition, with same format than 'mmc partconf' with parameter: boot_ack boot_partition On stm32mp1 family: - boot_ack = 1 (Boot Acknowledge is needed by ROM code) - boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot) So on EV1 board the expected commands to select boot partition 1 or 2 $> fastboot oem partconf:1 1 $> fastboot oem partconf:1 2 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09configs: stm32mp1: enable the fastboot oem command formatJean-Philippe ROMAIN3-0/+16
Enable the fastboot oem command format and set the variable "partitions" with default eMMC partitions list. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-09configs: stm32mp1: enable fastboot support of eMMC boot partitionJean-Philippe ROMAIN2-0/+10
Activate fastboot support on boot partition for eMMC, mmc1 device on STMicroelectronics board (EV1). Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-02-08Merge git://git.denx.de/u-boot-marvellWIP/08Feb2021Tom Rini9-68/+202
- Espressobin: Set default env values at runtime (Pali) - Espressobin: Set the maximum slave SPI speed to 40MHz (Pali) - theadorable: PCIe test code enhancement and early deemphasis enabling (Stefan) - pci_mvebu: Disable config access to PCI host bridge ports (Stefan) - mv_sdhci: parse device-tree entry (Baruch)
2021-02-08Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini183-192/+3894
Layerscape: Enable gpio Bug fixes & updates related to dspi, qspi, pciep, SVR mask, stream-id, env variables, mdio for LAyerscape Platforms Add SATA, network variant 1, 2 support on sl28 powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile Bug fixes and updates for keymile, Kontron
2021-02-08Merge git://git.denx.de/u-boot-shTom Rini17-134/+2247
- Beacon EmbeddedWorks RZG2H/N Dev Kit support
2021-02-08Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini12-99/+188
2021-02-08configs: lx2160aqds: enable CMD_GPIOBiwen Li2-0/+2
Enable CMD_GPIO for board lx2160aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: lx2160ardb: enable CMD_GPIOBiwen Li3-0/+3
Enable CMD_GPIO for board lx2160ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1088ardb: enable DM_GPIO and CMD_GPIOBiwen Li6-0/+10
Enable DM_GPIO and CMD_GPIO for board ls1088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1088aqds: enable DM_GPIO and CMD_GPIOBiwen Li6-0/+11
Enable DM_GPIO and CMD_GPIO for board ls1088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls2088aqds: enable CMD_GPIOBiwen Li1-0/+1
Enable CMD_GPIO for board ls2088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls2088ardb: enable DM_GPIO and CMD_GPIOBiwen Li4-0/+6
Enable DM_GPIO and CMD_GPIO for board ls2088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1046aqds: enable CMD_GPIOBiwen Li9-0/+9
Enable CMD_GPIO for board ls1046aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1046ardb: enable CMD_GPIOBiwen Li8-0/+8
Enable CMD_GPIO for board ls1046ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1043ardb: enable CMD_GPIOBiwen Li8-0/+8
Enable CMD_GPIO for board ls1043ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1043aqds: enable CMD_GPIOBiwen Li9-0/+9
Enable CMD_GPIO for board ls1043aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1028ardb: enable CMD_GPIOBiwen Li2-0/+2
Enable CMD_GPIO for board ls1028ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1028aqds: enable CMD_GPIOBiwen Li3-0/+3
Enable CMD_GPIO for board ls1028aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021atwr: enable CMD_GPIOBiwen Li7-0/+7
Enable CMD_GPIO for ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021aqds: enable CMD_GPIOBiwen Li9-0/+9
Enable CMD_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012ardb: enable CMD_GPIOBiwen Li4-0/+4
Enable CMD_GPIO for ls1012ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012afrwy: enable CMD_GPIOBiwen Li4-0/+4
Enable CMD_GPIO for ls1012afrwy Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1046a: enable MPC8XXX_GPIOBiwen Li1-0/+7
Enable MPC8XXX_GPIO for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: lx2160a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls208xa: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1088a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1028a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1043a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08configs: ls1012a: enable CONFIG_MPC8XXX_GPIOBiwen Li1-0/+7
Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls208xa: add gpio nodeBiwen Li1-1/+45
Add gpio node for SoC LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1088a: add gpio nodeBiwen Li1-1/+46
Add gpio node for SoC LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08arm64: dts: ls1046a: add gpio nodeBiwen Li1-0/+40
Add gpio node for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.1 at 2025-01-11 22:50:19 +0000