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2018-06-17x86: cherryhill: Fix DTC warningBin Meng1-2/+0
Fix warning when compiling cherryhill.dts with latest DTC: "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property" Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-16Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini3-43/+170
2018-06-15Merge tag 'arc-updates-for-2018.07-rc2' of git://git.denx.de/u-boot-arcTom Rini4-0/+287
Here we just add a tool for HSDK flashable images preparation together with extensive documentation for HSDK board. This will help real-life users to update U-Boot on the board.
2018-06-15Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblazeTom Rini25-49/+196
Xilinx fixes for v2018.07-rc2 Zynq: - Fix missing watchdog header - DT fixes ZynqMP: - emmc configuration split - Enable SPD - Fix PMUFW_INIT_FILE logic - Coverity fixes in SoC code timer - Add timer_get_boot_us mmc: - Fix MMC HS200 tuning command serial: - Fix scrabled chars with OF_LIVE
2018-06-15ARC: HSDK: Add readmeAlexey Brodkin1-0/+121
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15ARC: HSDK: Add tool and make target to generate bspEugeniy Paltsev3-0/+166
HSDK board has preloader that reads SPI flash pages and searches for a special image header to fetch and load binary. Add tool, make target (bsp-generate) to generate update script and u-boot binary image with header for preloader. Also add script to default environment to apply updates. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15serial: zynq: Make zynq_serial_setbrg staticMichal Simek1-1/+1
This function is used only inside this driver that's why should be static. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15serial: zynq: Initialize uart only before relocationMichal Simek1-0/+6
This issue was found when OF_LIVE was enabled that there are scrambled chars on the console like this: Chip ID: zu3eg Watchdog: Started��j� sdhci@ff160000: 0, sdhci@ff170000: 1 In: serial@ff010000 I found a solution for this problem exactly the same as I found later in serial_msm fixed by: "serial: serial_msm: initialize uart only before relocation" (sha1: 7e5ad796bcd65772a87da236ae21cd536ae3a4d2) What it is happening is that output TX fifo still contains chars to be sent and _uart_zynq_serial_init() resets TX fifo even in the middle of transfer. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15serial: zynq: Write chars till output fifo is fullMichal Simek1-2/+2
Change logic and put char to fifo till there is a space in output fifo. Origin logic was that output fifo needs to be empty. It means only one char was in output queue. Also remove unused ZYNQ_UART_SR_TXEMPTY macro. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15serial: zynq: Use BIT macros instead of shifts and full hex numbersMichal Simek1-8/+8
Coding style is checking to use BIT macros instead of shifts. The patch is also fixing the rest of macros which should be BITs instead of hex numbers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15gpio: zynq_gpio: bank description should use unsigned typeMichal Simek1-4/+4
Use u32 instead of int for max_bank, bank_min and bank_max. These values can't be negative that's why no reason to use signed type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()Michal Simek1-1/+5
There should be return value check from zynqmp_mmio_read() in zynqmp_mmio_rawwrite() to make sure that errors are propagated properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm64: zynqmp: Check return value from callocMichal Simek1-0/+2
calloc() can fail and return NULL. The patch is checking return value and return in case of error. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()Michal Simek1-1/+1
Code around tuning_loop_counter variable expects to go below zero. That's why this variable can't use unsigned type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15gpio: zynq: Do not check unsigned type that is >= 0Michal Simek1-1/+1
There is no reason to check that unsigned type that is >= 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15mmc: sdhci: Fix MMC HS200 tuning command failuresSiva Durga Prasad Paladugu1-4/+4
This patch fixes the mmc tuning command failures when tuning pattern data needs to read back for comparision against the expected bit pattern. Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-15arm64: zynqmp: accept an absolute path for PMUFW_INIT_FILELuca Ceresoli1-1/+7
The value of PMUFW_INIT_FILE is prefixed with "$(srctree)/", thus forcing it to be a relative path inside the U-Boot source tree. Since the PMUFW is a binary file generated outside of U-Boot, the PMUFW binary must be copied inside the U-Boot source tree before the build. This generates a few problems: * if the source tree is shared among different out-of-tree builds, they will pollute (and potentially corrupt) each other * the source tree cannot be read-only * any buildsystem must add a command to copy the PMUFW binary * putting an externally-generated binary in the source tree is ugly as hell Avoid these problems by accepting an absolute path for PMUFW_INIT_FILE. This would be as simple as removing the "$(srctree)/" prefix, but in order to keep backward compatibility we rather use the shell and readlink to get the absolute path even when starting from a relative path. Since 'readlink -f' produces an empty string if the file does not exist, we also add a check to ensure the file configured in PMUFW_INIT_FILE exists. Otherwise the build would exit successfully, but produce a boot.bin without PMUFW as if PMUFW_INIT_FILE were empty. Tested in the 12 possible combinations of: - PMUFW_INIT_FILE empty, relative, absolute, non-existing - building in-tree, in subdir, in other directory Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm64: zynqmp: Enable SPD ddr support for zcu102 targetsMichal Simek4-0/+6
zcu102 contains DIMM with SPD on it at 0x51 address. For example: i2c dev 13 i2c sdram 51 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15timer: cadence: Implement timer_get_boot_usMichal Simek2-0/+24
This function is required for adding bootstage support. Also enable it directly for ZynqMP R5 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm: zynq: Drop #address-cells and #size-cells from gpio-keysMichal Simek6-12/+0
dtc is showing some warnings and this change was also done in the Linux kernel as "Input: gpio-keys - clean up device tree binding example" with this fragment in commit message "Drop #address-cells and #size-cells, which are not required by the gpio-keys binding documentation, as button sub-nodes are not devices." Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm64: zynqmp: Split emmc configuration into emmc0 and emmc1Siva Durga Prasad Paladugu5-16/+126
This patch splits the current mini emmc configuration into emmc0 and emmc1 configurations because emmc is probed at boot time and on systems which have only one interface mini configuration is failing on unused interface. This patch also adds required clock node in dts and enables CONFIG_MMC_SDHCI_ZYNQ through defconfig. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15arm: zynq: Add missing watchdog headerMichal Simek1-0/+1
Add missing header detected by sparse. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-14Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini9-20/+54
Patch queue for efi - 2018-06-14 A few minor fixes for the release: - Compile fixes - HI20 relocations for RISC-V - Fix bootefi without load path - Fix Runtime Services with certain compilers
2018-06-14Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini23-73/+1383
2018-06-14usb: sunxi: access ahb_reset0_cfg in CCM using its offsetVasily Khoruzhick2-6/+37
struct sunxi_ccm_reg doesn't have ahb_reset0_cfg on sun4i and sun5i, thus compilation fails with: drivers/usb/host/ohci-sunxi.c:96:26: error: 'struct sunxi_ccm_reg' has no member named 'ahb_reset0_cfg' Access this reg using its offset to fix this issue. Fixes commit 1ed9c1118 ("usb: sunxi: ehci: get rid of ifdefs") and commit 56830cee3 ("usb: sunxi: ohci: get rid of ifdefs") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-14efi_loader: Allocate memory handle for mem dpAlexander Graf1-0/+9
When we boot using memdp (bootefi on an address without previous load that populates the device path) then the memory device path we pass in is not backed by any handle. That can result in weird effects. For example grub gets very grumpy about this inside the efi_net module and just loops endlessly. So let's expose a simple handle that the memory device path is backed on. That way any code that looks for the device the dp is on, finds one. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14efi_loader: avoid make race conditionHeinrich Schuchardt1-2/+8
When U-Boot is built with 'make -j' there is not guarantee that targets in directory arch/ are built before targets in directory lib/. The current build instruction for EFI binaries in lib/ rely on dependencies in arch/. If $(EFI_CRT0) or $(EFI_RELOC) is not yet built before trying to build %.efi an error *** No rule to make target '%.efi' occurs. With the patch separate copies of $(EFI_CRT0) and $(EFI_RELOC) named efi_crt0.o and efi_reloc.o are built in lib/efi_loader and lib/efi_selftest. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14efi_loader: avoid initializer element is not constantHeinrich Schuchardt2-4/+8
When building with -pedantic the current definition of EFI_GUID() causes an error 'initializer element is not constant'. Currently EFI_GUID() is used both as an anonymous constant and as an intializer. A conversion to efi_guid_t is not allowable when using EFI_GUID() as an initializer. But it is needed when using it as an anonymous constant. We should not use EFI_GUID() for anything but an initializer. So let's introduce a variable where needed and remove the conversion. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14efi: Add a comment about duplicated ELF constantsSimon Glass1-0/+4
These constants are defined in arch-specific code but redefined here. Add a TODO to clean this up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14efi_loader: Convert runtime reset from switch to if statementsAlexander Graf2-14/+8
We currently handle the UEFI runtime reset / power off case handling via a switch statement. Compilers (gcc in my case) may opt to handle these via jump tables which they may conveniently put into .rodata which is not part of the runtime section, so it will be unreachable when executed. Fix this by just converting the switch statement into an if/else statement. It produces smaller code that is faster and also correct because we no longer refer .rodata from efi runtime code. Reported-by: Andreas Färber <aferber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14riscv: Add support for HI20 PE relocationsAlexander Graf2-0/+17
The PE standard allows for HI20/LOW12 relocations. Within the efi_loader target we always know that our relocation target is 4k aligned, so we don't need to worry about the LOW12 part. This patch adds support for the respective relocations. With this and a few grub patches I have cooking in parallel I'm able to run grub on RISC-V. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-13net: gem: Check return value from memalign/mallocMichal Simek1-0/+6
Functions can return NULL in case of error that's why checking return value is needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: zynq_gem: Initialize phyreg variableMichal Simek1-1/+1
In case of phyread()/phy_setup_op() timeout code is working with uninitialized phyreg variable. Initialize this variable to make sure that code it not working with random value. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: zynq_gem: Fix return type for phy...()Michal Simek1-4/+4
wait_for_bit_le32 returns negative value on failure. Fix phy...() to handle these failures properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: mvgbe: extract common code for SMI waitChris Packham2-24/+24
Combine repeated code from smi_reg_read/smi_reg_write into a common function smi_wait_ready. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: designware: set the PS bit when resetting DMA bus in MII configurationQuentin Schulz1-0/+9
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block, the DMA reset never succeeds when a MII PHY is used (no problem with a GMII PHY). The designware_eth_init() function sets the DMAMAC_SRST bit in the DMA_BUS_MODE register, and then polls until this bit clears. When a MII PHY is used, with the current driver, this bit never clears and the driver therefore doesn't work. The reason is that the PS bit of the GMAC_CONTROL register should be correctly configured for the DMA reset to work. When the PS bit is 0, it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells the MAC we have a MII PHY. Doing a DMA reset clears all registers, so the PS bit is cleared as well. This makes the DMA reset work fine with a GMII PHY. However, with MII PHY, the PS bit should be set. We have identified this issue thanks to two SPEAr600 platform: - One equipped with a GMII PHY, with which the existing driver was working fine. - One equipped with a MII PHY, where the current driver fails because the DMA reset times out. Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: phy: mv88e61xx: Force CPU port link upChris Packham1-21/+30
When connecting to from a CPU direct to a 88e6097 typically RGMII is used. In order for traffic to actually pass we need to force the link up so the CPU MAC on the other end will see the link. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13mvebu: neta: align DMA buffersJon Nettleton1-6/+12
This makes sure the DMA buffers are properly aligned for the hardware. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: add Socionext AVE ethernet driver supportKunihiko Hayashi3-0/+1006
Add driver for Socionext AVE ethernet controller that includes MAC and MDIO bus supporting RGMII/RMII modes. The driver behaves the ethernet driver model (DM_ETH) with devicetree. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: include/phy.h: add new mode for internal phyKunihiko Hayashi1-0/+2
Add the new mode to indicate a built-in PHY. This will be used by UniPhier AVE ethernet driver. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13drivers/net/vsc9953: Initialize action RAM in VCAP complexRadu Bulie2-0/+204
VCAP tables must be initialized even if no advanced classification is used. If no initialization is performed, then ECC error will be observed by the user when the first packet enters the l2switch. The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM multi-bit ECC error. This patch fixes the aforementioned ECC error by performing the initialization of VCAP tables. Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROPVasily Khoruzhick1-0/+2
That can happen if duplicate UDP packet arrived, and that's not uncommon. Anyway, we ignore packets with rpc_id lower than last we sent for other requests, so it makes sense to do that for read request as well. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: cpsw: ti: Reap completed packets before stopping interfaceAlex Kiernan1-8/+16
If you send a final packet just before stopping the interface (e.g. a final ACK as part of the UDP fastboot protocol), then that packet isn't reliably delivered onto the wire. Reap packets prior to stopping the interface to ensure any which are in-flight make it out. Also remove buffer and len from the call to cpdma_process() as we weren't using them on their return. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: Protect net_state from reentrant net_loop()Leonid Iziumtsev1-0/+3
Global variable "net_state" is used in net_loop() state-machine. But it happens that some times the net_loop() can be called multiple times in the same call stack. For example when the netconsole is enabled and we print the message while some other net protocol is in action. Netconsole will overwrite the "net_state" and that will break the logic for earlier started protocol. To protect the state save and restore "net_state" variable each time when we enter and exit net_loop(). Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net/phy/cortina: Add support for CS4223 PHYVicentiu Galanopulo3-1/+52
Add support for Cortina CS4223 10G PHY - As per the CS4223 specs, an EEPROM module is connected to the PHY. At startup the PHY reads the firmware line and tries to load the firmware into the internal memory. - This driver reads the EEPROM status and checks if firmware has been loaded Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: sunxi: Correct MAC address register orderJoe Hershberger1-2/+2
Put the enetaddr data in the same order as it was before the change in commit ace1520cb5fc ("net: sunxi-emac: Write HW address via function") Reported-by: Udo Maslo <u.maslo@web.de> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: Express LINK_LOCAL dependency on LIB_RANDJoe Hershberger1-0/+1
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13tsec: Fix reading phy registers from DTMario Six1-2/+3
Bus translations should be applied when reading the address of the sgmii phy registers from the DT. Use ofnode_get_addr_index instead of the plain ofnode_read_u32_default to fix this. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: Initialize as many ethernet devices as possibleMario Six1-2/+2
On devices that have their first network interface provided by a FPGA, the initialization of further interfaces will fail if the FPGA is not yet programmed. This leads to problems during factory setup when the data is supposed to be loaded over secondary netowork interfaces. To avoid this, use the uclass_{first,next}_device_check functions to initialize as many ethernet devices as possible. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13net: Always align tx packetsMario Six2-2/+4
Make sure that TX packets are always cache-aligned. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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