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2017-05-31regulator: pfuze100: unsigned compared against 0Peng Fan1-3/+3
Fix unsigned compared against 0. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-05-31regulator: pfuze100: add SPDX LicensePeng Fan1-0/+8
Add SPDX license Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-05-31mx25pdk: Set the eSDHC PER clock to 48 MHzBenoît Thébaudeau1-0/+6
The maximum SD clock frequency in High Speed mode is 50 MHz. This change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31mx25: Add function to set PER clocksBenoît Thébaudeau2-0/+20
Introduce the imx_set_perclk() function to make it possible to set the PER clocks. Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31mx25: Fix imx_get_perclk()Benoît Thébaudeau1-1/+10
imx_get_perclk() used the AHB clock as the clock source for all PER clocks, but the USB PLL output can also be a PER clock source if the corresponding PER CLK MUX bit is set in CCM.MCR. Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31mmc: fsl_esdhc: Allow all supported prescaler valuesBenoît Thébaudeau1-11/+12
On i.MX, SYSCTL.SDCLKFS may be set to 0 in order to make the SD clock frequency prescaler divide by 1 in SDR mode. In DDR mode, the prescaler can divide by up to 512. Allow both of these settings. The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25, this change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL (240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31arm: mx6: remove unused config variable CONFIG_SPL_NAND_MXSLothar Waßmann2-6/+0
The config variable CONFIG_SPL_NAND_MXS is only set in include/configs/imx6_spl.h but used nowhere. Remove it. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-31drivers: pci: imx: add imx_pcie_remove functionTim Harvey3-0/+45
There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>
2017-05-31mx7dsabresd: Increase CONFIG_ENV_OFFSETFabio Estevam1-1/+1
After running 'saveenv' we can no longer boot. Adjust CONFIG_ENV_OFFSET so that U-Boot binary and the environment section do not overlap. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31pico-imx7d: Add initial supportVanessa Maegima9-0/+650
Add the initial support for pico-imx7d board based on Wig Cheng's source code. Add support for eMMC, USB gadget, I2C, PMIC and Ethernet. For more information about this board, please visit: http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-30Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini7-15/+52
2017-05-29doc: document u-boot, mmc-env-offset and u-boot, mmc-env-offset-redundPhilipp Tomsich1-0/+12
Adding documentation on the new config properties: 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-05-29env_mmc: configure environment offsets via device treePhilipp Tomsich1-4/+27
This introduces the ability to override the environment offets from the device tree by setting the following nodes in '/config': 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND To keep with the previous logic, the CONFIG_* defines still need to be available and the statically defined values become the defaults, when the corresponding properties are not set in the device-tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-29power: pmic: tps65218: Fix tps65218_voltage_update functionKeerthy2-1/+3
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask. Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf Signed-off-by: Keerthy <j-keerthy@ti.com> Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC") Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-05-29mmc: meson: increase max block number per requestHeiner Kallweit1-1/+1
Number of blocks is a 9 bit field where 0 stands for a unlimited number of blocks. Therefore the max number of blocks which can be set is 511. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
2017-05-29drivers/power/regulator/max77686.c: Fix comparisons of unsigned expressionsTom Rini1-8/+8
Inside of max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we check that the value we calculate is >= 0 however we declare 'hex' as unsigned int making these always true. Mark these as 'int' instead. We also move hex_max to int as they are constants that are 0x3f/0xff. Given that the above functions are marked as returning an int, make the variables we assign their return value to also be int to be able to catch the error condition now. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-29mmc: Change 'part_config' to be a u8 not char.Tom Rini1-1/+1
In some places we check if part_config is set to MMCPART_NOAVAILABLE (0xff). With part_config being a char this is always false. We should be using a u8 to store this value instead, after a quick consultation with the Linux Kernel. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-26Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini38-122/+657
2017-05-26Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini10-61/+251
Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
2017-05-23Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini26-803/+8307
2017-05-23armv8: LS2080A: Adjust memory map for secure boot headers for NOR-bootUdit Agarwal4-10/+12
This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-bootSantan Kumar6-15/+40
This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046AAlison Wang4-20/+20
This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043AAlison Wang4-19/+19
This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWRAlison Wang2-10/+10
This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain11-4/+246
LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC supportPriyanka Jain7-5/+33
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls2080ardb: Add QSPI-boot supportPriyanka Jain9-11/+195
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23board: freescale: ls2080ardb: Update QIXIS codePriyanka Jain1-4/+17
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS flag is enabled. In case QIXIS code is not enabled, use default sysclk value as 100MHz per board documentation. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() pathYogesh Gaur1-7/+13
Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls1043ardb: Make NET independent of FManYork Sun2-6/+9
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
2017-05-23armv8: ls1046ardb: Make NET independent of FManYork Sun2-7/+10
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
2017-05-23armv8: ls1012a: fix the size of flash for multiple boardsSuresh Gupta1-1/+1
LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-05-23armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platformsSuresh Gupta3-3/+0
ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23board: freescale: ls2080ardb: Enable SD interface for RevF boardPriyanka Jain2-0/+22
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator which needs to be programmed to enable high speed SD interface by setting GPIO4_10 output to zero. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls1046a: enable PCI command toolHou Zhiqiang1-0/+10
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23nds32: eth: Support ftmac100 DM.rick10-61/+251
Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
2017-05-22mksunxi_fit_atf.sh: Allow for this to complete when bl31.bin is missingTom Rini1-0/+6
In situations like an autobuilder we are likely to not have bl31.bin present and thus would fail to build and propagate the error upwards. Instead, print a big warning to stderr so that human will see that something is wrong but complete the build. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Merge git://git.denx.de/u-boot-sunxiTom Rini18-225/+714
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini4-2/+119
2017-05-22Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini38-116/+1491
2017-05-22ColdFire: Remove rogue 'CONFIG_SYS_NO_FLASH' embedded within another CONFIG_ ↵Lothar Waßmann2-2/+1
name The original commit for the MCF54418TWR ColdFire development board support defined a 'CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN' which obviously has a rogue 'CONFIG_SYS_NO_FLASH' embedded in the intended 'CONFIG_SYS_FAULT_ECHO_LINK_DOWN' define. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
2017-05-22sandbox: Enable CMD_GETTIMESimon Glass1-0/+1
Enable this option by default on sandbox to increase build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_LZMADEC to KconfigSimon Glass5-5/+12
This converts the following to Kconfig: CONFIG_CMD_LZMADEC Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_LZMA to KconfigSimon Glass28-37/+22
This converts the following to Kconfig: CONFIG_LZMA Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Kconfig: Drop CONFIG_CMD_LOADYSimon Glass2-2/+0
This is not used in U-Boot. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_KGDB to KconfigSimon Glass4-3/+9
This converts the following to Kconfig: CONFIG_CMD_KGDB Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_IRQ to KconfigSimon Glass94-64/+45
This converts the following to Kconfig: CONFIG_CMD_IRQ Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22fs: Kconfig: Add a separate option for FS_JFFS2Simon Glass5-3/+14
Rather than using CMD_JFFS2 for both the filesystem and its command, we should have a separate option for each. This allows us to enable JFFS2 support without the command, if desired, which reduces U-Boot's size slightly. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22Convert CONFIG_CMD_JFFS2 to KconfigSimon Glass176-76/+121
This converts the following to Kconfig: CONFIG_CMD_JFFS2 Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-14 09:47:20 +0000