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2017-08-09dm: arm: ls1021a: Move to driver model for USBAlison Wang12-0/+12
This patch enables driver model for USB in defconfigs for LS1021A platforms. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09fsl-lsch2: csu: remove multiple calling functionHou Zhiqiang4-13/+0
Function enable_layerscape_ns_access() is alreayd called soc-wide. Remove duplicated calling from individual boards. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Add commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8/fsl-lsch2: correct the config description of DSPI clock dividerHou Zhiqiang1-1/+1
It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board:ls2080ardb: Update execution of config_board_muxSantan Kumar1-13/+14
Function config_board_mux() reads env variable 'hwconfig' which is only available after relocation for QSPI boot. Move calling config_board_mux() to misc_init_r(). Signed-off-by: Santan Kumar <santan.kumar@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board/ls2080ardb: Disable SD-related GPIO programmingSantan Kumar1-16/+2
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB RevF boards. It is only used on LS2081ARDB. Programming GPIO is only required for LS2081ARDB. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8: ls1046ardb: update core frequency to 1800MHZQianyu Gong2-2/+2
Update the default core frequency to 1800MHZ for best performance under SD boot and eMMC boot. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09driver: mmc: fsl_esdhc: Fix compiling warningYork Sun1-0/+2
Commit 4483b7eb added variable vqmmc_dev but only uses it under CONFIG_DM_REGULATOR. Add the same macro to variable declaration to get rid of compiling warning. Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-04common/env_embedded.c: rename PPCENV/PPCTEXT macrosThomas Petazzoni2-7/+5
The environment has pretty much nothing to do with just "PPC", so rename the macros to just __UBOOT_ENV_SECTION__ which is more readable. In addition, only a single macro is needed: the environment now goes either to the default section (USE_HOSTCC is defined) or in the .text section. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-08-04common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENVThomas Petazzoni1-10/+3
CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put the environment in the special .ppcenv section, but the last architecture using this section (SuperH) has been changed to not use it. Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV entirely. We only handle two cases: - We're building the host tool tools/envcrc, in which case the environment is place with no special section attribute (so it depends up in .data) - We're building U-Boot itself, in which case the environnement is placed in the .text section. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-08-04Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to KconfigAdam Ford28-1/+30
This converts the following to Kconfig: CONFIG_SYS_TEXT_BASE The includes, whitelist, etc. were left for now but I don't get any build errors or warnings on the omap3_logic_defconfig or am3517_evm_defconfig builds I tried. Signed-off-by: Adam Ford <aford173@gmail.com>
2017-08-04stmf32f4: soc: fix buildman compilation errorPatrice Chotard1-1/+3
fix the following compilation error reported by buidlman: arm: + stm32f429-discovery +arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init': +arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + ^ +arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code +make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1 +make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2 +make[1]: *** [arch/arm/mach-stm32] Error 2 +make: *** [sub-make] Error 2 Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Vikas Manocha <vikas.manocha@st.com>
2017-08-04configs: sama5d4_xplained: Fix input clock for debug UARTWenyou.Yang@microchip.com3-3/+3
Fix the UART input clock for the early debug UART, it should be 100MHz, instead of 88MHz. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-08-04board: usb_a9263: Update to support DT and DMWenyou.Yang@microchip.com4-43/+168
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: meesc: Update to support DT and DMWenyou.Yang@microchip.com4-39/+45
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: pm9261: Update to support DT and DMWenyou.Yang@microchip.com4-45/+28
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: ethernut5: Update to support DT and DMWenyou.Yang@microchip.com5-83/+179
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: pm9263: Update to support DT and DMWenyou.Yang@microchip.com5-44/+29
Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: at91sam9260ek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com16-40/+98
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: at91sam9rlek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com6-17/+29
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: at91sam9263ek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com9-20/+45
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04board: at91sam9261ek: Update to support DT and DMWenyou.Yang@microchip.com13-116/+483
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04gpt: harden set_gpt_info() against non NULL-terminated stringsAlison Chaiken1-27/+36
Strings read from devices may sometimes fail to be NULL-terminated. The functions in lib/string.c are subject to failure in this case. Protect against observed failures in set_gpt_info() by switching to length-checking variants with a length limit of the maximum possible partition table length. At the same time, add a few checks for NULL string pointers. Here is an example as observed in sandbox under GDB: => gpt verify host 0 $partitions Program received signal SIGSEGV, Segmentation fault. 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 267 for (sc = s; *sc != '\0'; ++sc) (gdb) bt #0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 #1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>, str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8, parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415 #2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580 #3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0) at cmd/gpt.c:783 #4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>, cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500 #5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0, repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539 Suggested-by: Lothar Waßmann <LW@karo-electronics.de> Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: provide commands to selectively rename partitionsAlison Chaiken3-5/+260
This patch provides support in u-boot for renaming GPT partitions. The renaming is accomplished via new 'gpt swap' and 'gpt rename' commands. The 'swap' mode returns an error if no matching partition names are found, or if the number of partitions with one name does not equal the number with the second name. The 'rename' variant always succeeds as long as a partition with the provided number exists. Rewriting the partition table has the side-effect that all partitions end up with "msftdata" flag set. The reason is that partition type PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte() function. This does not appear to cause any harm. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: read partition table from device into a data structureAlison Chaiken2-0/+132
Make the partition table available for modification by reading it from the user-specified device into a linked list. Provide an accessor function for command-line testing. Signed-off-by: Alison Chaiken <alison@peloton-tech.com> [trini: Make this depend on CMD_GPT_RENAME, as it is the user of this code] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-04GPT: add accessor function for disk GUIDAlison Chaiken4-1/+74
In order to read the GPT, modify the partition name strings, and then write out a new GPT, the disk GUID is needed. While there is an existing accessor for the partition UUIDs, there is none yet for the disk GUID. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04partitions: increase MAX_SEARCH_PARTITIONS and move to part.hAlison Chaiken2-1/+1
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd directory can find it. At the same time, increase the value to 64 since some operating systems use many, and the resources consumed by a larger value are minimal. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04cmd gpt: test in sandboxAlison Chaiken1-0/+10
Make minor changes to README.gpt and sandbox_defconfig to support testing of the gpt command's functionality in the sandbox. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04GPT: fix error in partitions string docAlison Chaiken1-4/+4
The existing partitions-list parsing in cmd/gpt.c passes a value from gpt_default() to set_gpt_info() that README.gpt suggests should begin with 'partitions='. Partition-list strings should in fact begin with 'uuid_disk', as otherwise the call from set_gpt_info() to extract_val() to find 'uuid_disk' will fail. Change README.gpt accordingly. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04disk_partition: introduce macros for description string lengthsAlison Chaiken1-2/+5
Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04EFI: replace number with UUID_STR_LEN macroAlison Chaiken2-3/+4
Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblazeTom Rini22-238/+1038
Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver
2017-08-03PowerPC: mpc85xx: Update ft_verify_fdtTom Rini1-2/+9
With the changes to fdt_get_base_address() we need to modify the logic in ft_verify_fdt() for how we check the validity of the CCSR address. Tested-on: qemu-ppce500 -M mpc8544ds Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Cc: York Sun <york.sun@nxp.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03qemu-ppce500: Update get_phys_ccsrbar_addr_early()Tom Rini1-1/+7
The logic of what fdt_get_base_address() will search for and return has changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that fdt_get_base_address used to perform. Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03ahci-pci: Update call to ahci_probe_scsi_pci()Bin Meng1-1/+1
ahci_probe_scsi() now takes a 'base' argument, and there is an API that prepares base address for us: ahci_probe_scsi_pci(). Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-02Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini98-47/+6282
2017-08-03ARM: rmobile: Update defconfig of R-Car Gen3Nobuhiro Iwamatsu4-0/+12
This updates defconfig of R-Car Gen3 to keep with the latest Kconfig. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Add clock handling supportMarek Vasut1-2/+19
Add support for enabling and disabling the clock using the clock framework based on the content of OF instead of doing it manually in the board file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Detect PHY correctlyMarek Vasut1-3/+4
The order of parameters passed to the phy_connect() was wrong. Moreover, only PHY address 0 was used. Replace this with code capable of detecting the PHY address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03net: ravb: Add OF probing supportMarek Vasut1-0/+37
Add support for probing the RAVB Ethernet block from device tree. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03serial: sh: Use the clock framework to obtain clock configMarek Vasut1-2/+11
Since we now have clock driver on the RCar Gen3 , obtain the clock configuration using the clock framework functions. In case this fails, fall back to the original code for pulling the clock config directly out of OF. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03serial: sh: Convert to KconfigMarek Vasut71-34/+44
Convert the SH Serial to Kconfig using tools/moveconfig.py tool and a bit of manual adjustment to cater for failed conversions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable clock framework on ULCBMarek Vasut2-0/+4
Since there is now a clock driver for RCar Gen3, enable it on this board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable clock framework on Salvator-XMarek Vasut2-0/+4
Since there is now a clock driver for RCar Gen3, enable it on this board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03clk: rmobile: Add RCar Gen3 clock driverMarek Vasut5-0/+967
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Enable OF_CONTROL on RCar Gen3Marek Vasut4-4/+4
Since the DTs are now in place, enable OF control so that they get bundled into the U-Boot. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: dts: rmobile: Import DTS from Linux 4.12Marek Vasut12-0/+4558
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6, commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Increase console buffer sizesMarek Vasut1-5/+5
Allow pasting extra long lines into the U-Boot console on RCar Gen3. This is OK since we have plenty of resources and it's convenient. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: ulcb: Add ULCB board supportMarek Vasut9-0/+614
Add initial support for the R8A7795 and R8A7796 based ULCB board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03ARM: rmobile: Add PFC PUEN bank 5 addressMarek Vasut1-0/+2
Add the PFC5 PUEN address and SSI SDATA4 bit offset into the rcar-gen3-base.h . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-02Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini38-119/+394
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1046aqds.h include/configs/ls1046ardb.h
generated by cgit v1.1 at 2024-07-13 08:53:22 +0000