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2023-05-03Merge tag 'u-boot-imx-20230503' of ↵WIP/03May2023Tom Rini37-60/+3162
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230503 ------------------- - Fixes for : pico-imx6ul, smegw01 - new boards: DMSSE20, Reform 2 - fix: get_boot_device, PLL video rate CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
2023-05-03Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini5-20/+54
- kwboot/mmc: Misc fixes for eMMC booting (Pali) - mvebu: avoid buffer overflow in hws_serdes_topology_verify (Heinrich)
2023-05-03Merge branch '2023-05-02-assorted-platform-updates-and-additions'Tom Rini91-6146/+2613
- Updates for starqltechn and other qualcomm platforms, hi3798mv200, Broadcom Northstar, and mediatek platforms - Drop omap5_uevm, and assorted TI platform updates - Add MAX14526
2023-05-03starqltechn: enable bootmenuDzmitry Sankouski1-0/+1
Needed for multiboot with vendor's Android. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
2023-05-03starqltechn: use button keyboard driverDzmitry Sankouski3-1/+22
Button keyboard driver used to navigate bootmenu entries. Add gpio buttons, button keyboard driver. Add gpio keys dts bindings. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-03starqltechn: use 16x32 fontDzmitry Sankouski1-0/+2
This font is more readable on high ppi display Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-03arm: histb: hi3798mv200: add initial support for Hi3798MV200 HC2910-2AGHD05 ↵Yang Xiwen12-0/+480
board A board with Hi3798MV200 SoC and various peripherals. Details are in the board README.md. Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03dt-binding: histb-clock: add clocks definition for Hi3798MV200Yang Xiwen1-0/+12
These clocks are found on Hi3798MV200 Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03mmc: hi6220_dw_mmc: add compatible for HC2910 supportYang Xiwen1-0/+2
It adds compatible "hisilicon,hi3798mv200-dw-mshc" for HC2910 SoC Hi3798MV200 to probe this mmc driver. Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03arm: add support for Hisilicon HiSTB family SoCsYang Xiwen7-0/+94
First supported chip is hi3798mv200 (which is similar to Hi3798cv200 used by poplar). Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03arm: Remove omap5_uevm boardTom Rini16-6095/+0
This platform is unsupported by TI and was never widely distributed. As this is untested for a long while and missing some DM conversions, remove it and related device tree files. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-03arm: mach-k3: Workaround errata ID i2331Nitin Yadav2-0/+36
Errata doc: https://www.ti.com/lit/pdf/sprz457 Errata ID i2331 CPSW: Device lockup when reading CPSW registers Details: A device lockup can occur during the second read of any CPSW subsystem register after any MAIN domain power on reset (POR). A MAIN domain POR occurs using the hardware MCU_PORz signal, or via software using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR. After these resets, the processor and internal bus structures may get into a state which is only recoverable with full device reset using MCU_PORz. Due to this errata, Ethernet boot should not be used on this device. Workaround(s): To avoid the lockup, a warm reset should be issued after a MAIN domain POR and before any access to the CPSW registers. The warm reset realigns internal clocks and prevents the lockup from happening. Workaround above errata by calling do_reset() in case of cold boot in order to trigger warm reset. This needs enabling SYSRESET driver in R5 SPL to enable TI SCI reset driver. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-05-03board: ti: j721s2: Add support to detect daughtercardsKishon Vijay Abraham I1-0/+130
Add support to detect daughtercards (GESI Ethernet card) in-order to set the MAC address of the main CPSW2G interface. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-05-03configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHYKishon Vijay Abraham I1-1/+1
Update the default BOOTCOMMAND to provide an automatic and easier way to configure ethernet PHY before loading the firmware. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-05-03configs: change bpi-r3 to board specific dts and change promptFrank Wunderlich2-6/+6
Use own devicetree for the board and change the prompt. Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2023-05-03board: mediatek: add Bananapi-R3 devicetreeDaniel Golle3-0/+302
Add board specific devicetree for Bananapi R3 SBC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2023-05-03pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeededDaniel Golle1-2/+2
Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") changed the logic deciding to set R0 and R1 registers for V1 devices. Before: /* Also set PUPD/R0/R1 if the pin has them */ err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup); if (err != -EINVAL) { mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0); mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1); } After: /* try pupd_r1_r0 if pullen_pullsel return error */ err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup, val); if (err) return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable, pullup, val); Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function always either returns 0 in case of success or -EINVAL in case any error has occurred. Hence the logic responsible of the decision to program R0 and R1 has been inverted. This leads to problems on BananaPi R2 (MT7623N) when booting from SDMMC, it turns out accessing eMMC no longer works since U-Boot 2022.07: MT7623> mmc dev 0 Card did not respond to voltage select! : -110 The problem wasn't detected for a long time as both eMMC and SDMMC work fine if they are used to boot from, and hence R0 and R1 were already setup by the bootrom and/or preloader. Fix the logic to restore the originally intended and correct behavior and also change the descriptive comment accordingly. Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Tested-By: Frank Wunderlich <frank-w@public-files.de>
2023-05-03arm: mach-k3: am62a7: Enable QoS for DSSAradhya Bhatia5-0/+187
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is done by setting the DSS DMA orderID to 8. The C7x and VPAC have been overwhelming the DSS's access to the DDR (when it was accessing via the Non Real-Time (NRT) Queue), primarily because their functional frequencies, and hence DDR accesses, were significantly higher than that of DSS. This led the display to flicker when certain edgeAI models were being run. With the DSS traffic serviced from the RT queue, the flickering issue has been found to be mitigated. The am62a qos files are auto generated from the k3 resource partitioning tool. Section-3.1.12, "QoS Programming Guide", in the AM62A TRM[1], provides more information about the QoS, and section-14.1, "System Interconnect Registers", provides the register descriptions. [1] AM62A Tech Ref Manual: https://www.ti.com/lit/pdf/spruj16 Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
2023-05-03arm: mach-k3: j7200: Fix firewall warnings at boot timeManorit Chawdhry1-0/+6
J721E and J7200 have same file j721e_init.c which had the firewall configs for J721E being applied on J7200 causing the warnings. Split the firewalls for both the boards to remove those warnings. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-03board: Fix documentation for Snapdragon based Samsung and Qualcomm boardsBhupesh Sharma2-4/+4
The current documentation for Snapdragon based Samsung and Qualcomm boards is vague in the sense that at one place it mentions that u-boot can be used as a replacement for ABL bootloader and at another it mentions that u-boot is loaded as an Android boot image through ABL. Fix the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2023-05-03board: Fix board file path for sdm845.c for Samsung and Qualcomm boardsBhupesh Sharma2-2/+2
Currently a few 'board/qualcomm/../Makefile' point to incorrect path of sdm845 board file. Fix the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2023-05-03arm: mvebu: avoid buffer overflow in hws_serdes_topology_verifyHeinrich Schuchardt1-2/+2
If serdes type is invalid, we cannot assume that it is a valid index for serdes_type_to_str[]. Fixes: edb470253346 ("arm: mvebu: Add Armada 38x SERDES / PHY init code from Marvell bin_hdr") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-05-03arm: mvebu: clearfog: Update eMMC/SD/SATA instructionsPali Rohár1-10/+10
BootROM and neither SPL does not use eMMC boot acknowledgement or boot enable bits in EXT_CSD_PART_CONF eMMC register. And also fixed SATA disk sector 0x141 is not used at all. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
2023-05-03arm: mvebu: spl: Load proper U-Boot from correct eMMC partitionPali Rohár1-2/+8
A38x BootROM completely ignores EXT_CSD_PART_CONF eMMC register and tries to load SPL from any partition in defined order. Chosen partition can be determined from the access bits in EXT_CSD_PART_CONF eMMC register. So implement custom spl_mmc_emmc_boot_partition() function to always returns eMMC partition from which BootROM loaded SPL. So this partition would be used for loading proper U-Boot too. Fixes: 2f27db2fbd6e ("arm: mvebu: spl: Load proper U-Boot from selected eMMC boot partition") Signed-off-by: Pali Rohár <pali@kernel.org>
2023-05-03mmc: Read eMMC partition access bits before card resetCHECK/eMMC-partconf-checkPali Rohár1-3/+28
eMMC specification in section "Access partitions" says that all reset events will restore the access bits in PARTITION_CONFIG CSD register to default User Data Area value (0b000). So read partition access bits from PARTITION_CONFIG CSD register before issuing card reset. This allows SPL/U-Boot to get information which eMMC partition was in use before SPL/U-Boot was booted. For some platforms this is the way how to determinate boot partition from which BootROM loaded SPL. Signed-off-by: Pali Rohár <pali@kernel.org>
2023-05-03tools: kwboot: Fix MMC partitions documentationPali Rohár1-3/+6
Boot configuration stored in EXT_CSD_PART_CONF register is completely ignored by BootROM. Fixes: fa03279e198d ("tools: kwboot: Add image type documentation") Signed-off-by: Pali Rohár <pali@kernel.org>
2023-05-02arm: mach-k3: common: don't reconfigure background firewallsManorit Chawdhry2-1/+8
K3 devices have some firewalls set up by ROM that we usually remove so that the development is easy in HS devices. While removing the firewalls disabling a background region before disabling the foreground regions keeps the firewall in a state where all the transactions will be blacklisted until all the regions are disabled. This causes a race for some other entity trying to access that memory region before all the firewalls are disabled and causes an exception. Since the background regions configured by ROM are in such a manner that they allow all transactions, don't touch the background regions at all. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02arm: mach-k3: common: Default to non fitImage boot on HS-FSVignesh Raghavendra1-2/+2
Allow non fitImage bootflow on Field Securable (HS-FS) devices in addition to GP, force fitImage boot only on Security enforced (HS-SE) devices where signed images are necessary to maintain chain of trust. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02arm: dts: msm: add GENI SE QUP device tree nodeVladimir Zapolskiy3-12/+17
On modern Qualcomm platforms including SDM845 a GENI SE QUP IP description is supposed to be found in board device tree nodes, the version of the IP is used by the GENI UART driver to properly set an oversampling divider value, which impacts UART baudrate. The change touches dragonboard845c and starqltechn board device tree source files, a device tree node label to "debug" UART is renamed to 'uart9' according to the naming found in Linux. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02serial: msm-geni: correct oversampling value based on QUP hardware revisionVladimir Zapolskiy2-1/+36
Starting from QUP v2.5 the value of oversampling is changed from 32 to 16, keeping the old value on newer platforms results on wrong set UART IP clock divider, thus the asked baudrate does not correspond to the actually set with all the consequencies for a user. The change links the driver to a new Qualcomm GENI SE QUP driver to get its hardware version and update the oversampling value. Deliberately the code under CONFIG_DEBUG_UART_MSM_GENI is not touched, since a wanted baudrate can be controlled by setting a modified CONFIG_DEBUG_UART_CLOCK build time variable. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02serial: msm-geni: Use upstream Linux bindingsKonrad Dybcio3-4/+6
The name "se" is used in upstream Linux device trees and has been for ages, long before this U-Boot-ism was introduced. Same goes for the existing compatible. Get rid of that. [vzapolskiy: removed a ready change in the driver] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02serial: msm-geni: fix a compile time warning from msm_serial_setbrg()Vladimir Zapolskiy1-3/+3
A compiler warns about a missing function prototype, which is valid and fixed by converting the function into static one, also fix interleaved local variable declarations and assignments. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02serial: msm-geni: fix code indentationVladimir Zapolskiy1-6/+5
This a cosmetic change, which corrects code indentation in a few places. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02serial: msm-geni: remove invalid se-clk clock nameVladimir Zapolskiy1-1/+1
There is only one clock supplier to the serial IP, thus getting it by name is not needed, also note that "clock-names" property is not listed under doc/device-tree-bindings/serial/msm-geni-serial.txt, and finally "se-clk" clock name is invalid, if added, it shall get "se" value like it's already described in Linux device tree documentation. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02serial: msm-geni: Always bind before relocationKonrad Dybcio1-0/+1
In preparation for supporting upstream Linux device trees on Qualcomm platforms, make this the default behavior. [vzapolskiy: extracted the driver change from a combination with dts changes] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02serial: msm-geni: remove redundant includesVladimir Zapolskiy1-6/+0
For whatever reason, likely a driver stub was copied from another driver, the driver contains a bunch of unnecessary and confusing includes like watchdog.h etc., the change reduces the list. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02misc: add Qualcomm GENI SE QUP device driverVladimir Zapolskiy3-0/+49
This change adds a Qualcomm GENI SE QUP device driver as a wrapper for actually enabled and used serial devices found on a board. At the moment the driver is pretty simple, its intention is to populate childred devices and provide I/O mem read interface to them as clients, this is needed for GENI UART driver to set up a proper clock divider and provide the actually asked baud rate. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02board: Add new Broadcom Northstar boardLinus Walleij11-0/+275
This adds a simple Northstar "BRCMNS" board to be used with the BCM4708x and BCM5301x chips. The main intention is to use this with the D-Link DIR-890L and DIR-885L routers for loading the kernel into RAM from NAND memory using the BCH-1 ECC and using the separately submitted SEAMA load command, so we are currently not adding support for things such as networking. The DTS file is a multiplatform NorthStar board, designed to be usable with several NorthStar designs by avoiding any particulars not related to the operation of U-Boot. If other board need other ECC for example, they need to create a separate DTS file and augment the code, but I don't know if any other users will turn up. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02arm: Add support for the Broadcom Northstar SoCsLinus Walleij1-1/+20
The original Northstar is an ARM SoC series that comprise BCM4709x and BCM5301x and uses a dual-core Cortex A9, the global timer and a few other things. This series should not be confused with North Star Plus (NSP) which is partly supported by U-Boot already. The SoC is well supported by the Linux kernel and OpenWrt as it is used in many routers. Since we currently don't need any chip-specific quirks and can get the system up from just the device tree, a mach-* directory doesn't even need to be added, just some small Kconfig fragments. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02arm: dts: Import device tree for Broadcom NorthstarLinus Walleij2-0/+632
This brings in the main SoC device tree used by the Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x. This is taken from the v6.3 Linux kernel. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02extcon: add MAX14526 MUIC supportSvyatoslav Ryhel3-0/+161
MAX14526 is a powerful extcon chip which allows detection of various plugs like usb, mhl, uart, headset etc. This version of driver implements support of AP-usb and CP-usb/uart paths. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02test: Add tests for the extconSvyatoslav Ryhel6-0/+51
Provide tests to the simple extcon device. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02dm: extcon: add an uclass for extconSvyatoslav Ryhel7-0/+59
Add a new simple uclass for extcon. Currently all setup is done in the probe. Uclass struct and ops are empty for now. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02Merge tag 'tpm-master-02052023' of ↵Tom Rini2-0/+3
https://source.denx.de/u-boot/custodians/u-boot-tpm adjust maintainers
2023-05-02Merge branch '2023-05-01-assorted-powerpc-updates'Tom Rini12-203/+79
- A number of PCI fixes, and one Kconfig cleanup for PowerPC platforms
2023-05-02pci: auto: Remove PCI_CLASS_PROCESSOR_POWERPC autoconfig casePali Rohár1-4/+0
PCI autoconfig case for PCI_CLASS_PROCESSOR_POWERPC just prints debug message and then calls autoconfig setup code like for any other standard endpoint device. We do not need special debug message for it, so remove this case and handle PCI_CLASS_PROCESSOR_POWERPC via default code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-05-02MAINTAINERS: assign include/tpm*, cmd/tpm*Heinrich Schuchardt1-0/+2
The files include/tpm* are an integral part of the TPM drivers. The tpm* commands are used to access TPM devices. Both should be managed by the TPM DRIVERS maintainer. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02cmd: missing break in test_write_limit()Heinrich Schuchardt1-0/+1
In test_write_limit() an unintended fall-through occurs. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02usb: ehci-mx6: move phy setup before register accessTim Harvey1-6/+4
For the CONFIG_PHY case, move the PHY setup before the register access. This avoids a hang when updating the imx8mm.dtsi which moves the USB OTG power-domains to the PHY. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Fabio Estevam <festevam@denx.de>
2023-05-02smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env fileFabio Estevam2-68/+89
Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to an env file, so do the conversion. Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-09-11 06:08:02 +0000