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2021-12-02Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net ↵WIP/02Dec2021Tom Rini12-43/+3605
into next - New Broadcom NetXtreme driver - Support for socat for netconsole - Felix switch soft reset fix
2021-12-02Merge branch '2021-12-01-assorted-updates' into nextTom Rini5-9/+23
- Have SPL skip length 0 images, some clean-ups related to CONFIG symbols and the known list of unmigrated symbols and pinctrl updates.
2021-12-02board: brcm-ns3: Load netXtreme firmwareBharat Gooty1-1/+4
Load NetXtreme firmware in board_init when BNXT_ETH is selected. Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2021-12-02net: brcm: netXtreme driverBharat Gooty9-0/+3540
Broadcom bnxt L2 driver support. Used by the Broadcom iproc platforms. Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
2021-12-02driver: net: Makefile: order file alphabeticallyRamon Fried1-39/+39
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02drivers: net: Soft reset felix switch coreRadu Bulie1-1/+12
It turns out that in custom designs if the system is reset multiple times in conjunction with a slight increase in external temperature, the felix switch starts to behave in a strange way: packets are no longer received on the ENECT interface connected to the L2switch internal port (the TX side of internal port stops working or the packets do not reach there. It is not very clear where the packets remain blocked. None of the counters points to a disruption in the L2switch) The issue is not reproducible on NXP reference designs. It was observed that by adding the switch core reset, the problem goes aways, even if intensive testing in temperature chambers is applied. The current patch performs soft reset on the switch core to ensure proper operation of the L2switch. Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02tools/netconsole: Add support for socatAndy Shevchenko1-2/+10
socat is a very powerful tool to work with socets (and not only) in UNIX systems. Let's add support for it in netconsole. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ferry Toth <fntoth@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-01spl: fit: Skip attempting to load 0 length imageNishanth Menon1-0/+7
When, for various reasons, a bad FIT image is used where a loadable image is marked as 0 length, attempt is made for a 0 length allocation and read of 0 byte read operation. Instead provide warning in log and skip attempting to do such a load. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
2021-12-01dm: add debug message when failed to select the default pinctrlPatrick Delaunay1-4/+12
Add a message on probe in driver model core when the default pinctrl selection failed. This message is displayed only when the pinctrl API is implemented, i.e. when result is not ENOSYS. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-01pinctrl: change result for unsupported APIPatrick Delaunay1-2/+2
Use the return value ENOSYS for unsupported API - pinctrl_generic_set_state - pinctrl_select_state Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-01scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txtPatrick Delaunay1-2/+0
The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real configurations and they are no more present in u-boot.cfg so they can be removed in config_whitelist.txt. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfgPatrick Delaunay1-1/+2
The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in include/linux/kconfig.h but they are not real configurations; they can be safely removed in the generated configuration file "u-boot.cfg". This patch simplifies the comparison of this U-Boot configuration file. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Simon Glass <sjg@chromium.org>
2021-12-01Merge branch '2021-12-01-Kconfig-migrations' into nextTom Rini680-2486/+1427
- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND, CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and CONFIG_FSL_DDR_INTERACTIVE.
2021-12-01Convert CONFIG_FSL_DDR_BIST et al to KconfigWIP/2021-12-01-Kconfig-migrationsTom Rini2-2/+4
This converts the following to Kconfig: CONFIG_FSL_DDR_BIST CONFIG_FSL_DDR_INTERACTIVE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01Convert CONFIG_SYS_BR0_PRELIM et al to KconfigTom Rini66-440/+653
This converts the following to Kconfig: CONFIG_SYS_BR0_PRELIM CONFIG_SYS_OR1_PRELIM CONFIG_SYS_BR1_PRELIM CONFIG_SYS_OR2_PRELIM CONFIG_SYS_BR2_PRELIM CONFIG_SYS_OR2_PRELIM CONFIG_SYS_BR3_PRELIM CONFIG_SYS_OR3_PRELIM CONFIG_SYS_BR4_PRELIM CONFIG_SYS_OR4_PRELIM CONFIG_SYS_BR5_PRELIM CONFIG_SYS_OR5_PRELIM CONFIG_SYS_BR6_PRELIM CONFIG_SYS_OR6_PRELIM CONFIG_SYS_BR7_PRELIM CONFIG_SYS_OR7_PRELIM This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms that can set these values do so. Add the relevant SYS_BRx_PRELIM_BOOL to platforms that had not been previously migrated. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01Convert CONFIG_USE_BOOTCOMMAND et al to KconfigTom Rini661-2042/+770
This converts the following to Kconfig: CONFIG_USE_BOOTCOMMAND CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND CONFIG_NFSBOOTCOMMAND Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01Merge tag 'u-boot-stm32-20211130' of ↵WIP/01Dec2021Tom Rini62-1922/+463
https://source.denx.de/u-boot/custodians/u-boot-stm into next - add nor1 device support for DFU command - remove CONFIG_STM32_IPCC from stm32mp15 defconfigs - enable simple framebuffer node for splashscreen for stm32mp1 - use lower-case hex for address for stm32 MCU and MPU's device tree - define LOG_CATEGORY for stmfx pinctrl driver - add support for probing bus voltage level translator - add custom PHY reset bindings on AV96 - enable KSZ90x1 PHY driver on DHCOR - stm32mp1 DDR update: - add DDR read data eye training - remove DDR calibration result - remove DDR tuning support - compute DDR size from DDRCTL registers - DHSOM boards: - increase USB power-good delay - add update_sf script to install U-Boot into SF - increase PHY auto-negotiation timeout to 20 seconds - fix SoM and board coding strap GPIO handling - auto-detect uSD level translator
2021-11-30board: stm32mp1: add support of nor1 device in dfu commandPatrick Delaunay2-8/+14
Add support of mtd backend for nor1 when this device is present on the board, on STM32MP157C-EV1 for example, as the support of several MTD spi-nor instance are now supported with commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled"). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setupPatrick Delaunay1-1/+1
Since the commit f42045b2e750 ("stm32mp15: replace CONFIG_TFABOOT when it is possible") the function stm32mp1_ddr_setup is always called so the __maybe_unused can be removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30ram: stm32mp1: compute DDR size from DDRCTL registersPatrick Delaunay2-3/+191
Compute the DDR size from DDR controller register (mstr and addrmap) in U-Boot proper as the DDR information are useful only for SPL but not for U-Boot proper, for example with TFABOOT. This patch simplify U-Boot DT when several DDR size are supported and support of next SOC in STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30configs: stm32mp15: deactivate the CONFIG_STM32_IPCCPatrick Delaunay9-18/+0
The IPCC mailbox is only used for communication with M4 firmware but it is not used in the stm32 remoteproc driver; it was planed but the support of this mailbox in remoteproc for STM32MP15x is dropped. So the associated drivers and config CONFIG_STM32_IPCC can be deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be also deactivated as the mailbox UCLASS is no more used. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30board: stm32mp1: enable simple framebuffer node for splashscreenPatrick Delaunay4-0/+7
Enable an existing simple framebuffer node in the Linux kernel device tree and the add the associated reserved memory node to preserved the resources (clock, memory) used by the stm32 video driver to display the splashscreen = background in exlinux.conf file. These resources will be released by the Linux driver only when the associated driver is ready to avoid transition issues during the Linux kernel initialization between U-Boot splash screen and the final display. See Linux documentation for details: Documentation/devicetree/bindings/display/simple-framebuffer.yaml Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30video: stm32: stm32_ltdc: align framebuffer on 2MBPatrick Delaunay1-1/+4
Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for LPAE for armV7, to avoid issue with the simple frame buffer activation, when U-Boot add a reserved memory in the kernel device tree to preserve the splash screen until Linux driver initialization. See Linux documentation for details: Documentation/devicetree/bindings/display/simple-framebuffer.yaml Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30common: add fdt_simplefb_enable_and_mem_rsv functionPatrick Delaunay2-0/+28
Add a new function to activate an existing simple frame buffer node and add the associated reserved memory, with no-map properties. This device tree update is only done when the video device is active and the video buffer is used. This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO is activated. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30video: Add video_is_active functionPatrick Delaunay2-0/+21
Add the helper function video_is_active() to test if one video device is active. This function can be used in board code to execute operation only when the display is probed / really used. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30common: rename functions lcd_dt_simplefb to fdt_simplefbPatrick Delaunay3-8/+8
Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned with the associated file name fdt_simplefb.h/fdt_simplefb.c Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30common: rename lcd_simplefb.c file to fdt_simplefb.cPatrick Delaunay2-1/+1
Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned with the configuration name and with the associated include file ./include/fdt_simplefb.h Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30Convert CONFIG_LCD_DT_SIMPLEFB to KconfigPatrick Delaunay13-3/+19
This converts the following to Kconfig: CONFIG_LCD_DT_SIMPLEFB This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30stm32mp1: ram: remove tuning supportPatrick Delaunay7-1636/+7
Remove the DDR interactive command tuning, as the support of a predefined DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A and the result of this tuning will be never used. Moreover this SW tuning procedure can failed on some hardware configuration (to many BIST errors and no convergence); it will be no more supported in the next delivery of the DDR utilities included in the CubeMX tool of STMicroelectronics. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30stm32mp1: ram: remove the support of calibration resultPatrick Delaunay12-226/+27
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when built-in calibration is executed. The calibration parameters were provided in the device tree by the optional node "st,phy-cal", activated in ddr helper file by the compilation flag DDR_PHY_CAL_SKIP and filled with values generated by the CubeMX DDR utilities. This patch - updates the binding file to remove "st,phy-cal" support - updates the device trees and remove the associated defines - simplifies the STM32MP1 DDR driver and remove the support of the optional parameter "st,phy-cal" After this patch, the built-in calibration is always executed and the calibration registers are moved in the phy dynamic part; that allows manual tests. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30stm32mp1: ram: add read valid training supportPatrick Delaunay2-2/+7
Add the read data eye training = training for optimal read valid placement (RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3. This training is supported on the PUBL integrated in the STM32MP15x DDR subsystem and it is not required for DDR3. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30ARM: dts: stm32: Auto-detect DHSOM with uSD level translatorMarek Vasut2-0/+8
The uSD level translator on DHSOM and Avenger96 are optional, however it is possible to auto-detect it. This is done by setting SD CMD line high, and then testing whether signal level on CK line matches the signal level on CKIN line. If so, the uSD level translator is present, otherwise it is not populated. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30mmc: stm32_sdmmc2: Add support for probing bus voltage level translatorMarek Vasut1-1/+62
Add support for testing whether bus voltage level translator is present and operational. This is useful on systems where the bus voltage level translator is optional, as the translator can be auto-detected by the driver and the feedback clock functionality can be disabled if it is not present. The translator test sets CMD high to avoid interfering with a card, and then verifies whether signal set on CK is detected on CKIN. If the signal is detected, translator is present, otherwise the CKIN feedback clock are disabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
2021-11-30ARM: stm32: Enable KSZ90x1 PHY driver on DHCORMarek Vasut1-0/+2
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the AV96 board has this PHY populated on the PCB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Add custom PHY reset bindings on AV96Marek Vasut1-0/+11
The ethernet PHY must be reset on AV96, however DWMAC currently does not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC PHY reset property is going away on next DT sync. Add PHY specific reset bindings to trigger the PHY reset and fix sporadic ethernet malfunctions, until the next DT sync. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOMMarek Vasut1-4/+10
The variables retaining the strap values have to be initialized, always, make it so. Moreover, free the requested GPIO list at the end to avoid wasting memory. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOMMarek Vasut1-0/+3
The Micrel PHYs on known DHSOM based boards take a while to come out of reset, increase the auto-negotiation timeout to prevent it from timing out in case the ethernet is used right after the board was reset. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOMMarek Vasut1-1/+11
Add script to read U-Boot from SD card and write it to matching locations in the SPI NOR, thus making the SPI NOR bootable. The script erases the entire SPI NOR, including U-Boot environment, to make sure the installation is clean. To retain environment from current running U-Boot, run 'saveenv' after running the 'update_sf' script. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: stm32: Increase USB power-good delay on DHSOMMarek Vasut2-1/+9
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until the USB Vbus is stable. Increase the USB power-good delay to 1 s. This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into stm32mp15_common.h to reduce duplication in board-specific config files adding custom environment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30pinctrl: stmfx: define LOG_CATEGORYPatrick Delaunay1-0/+4
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsiPatrice Chotard1-1/+1
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsiPatrice Chotard1-1/+1
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsiPatrice Chotard1-1/+1
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsiPatrice Chotard1-3/+3
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsiPatrice Chotard1-2/+2
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsiPatrice Chotard1-1/+1
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsiPatrice Chotard1-3/+3
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30ARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsiPatrice Chotard1-4/+4
Replace upper-case hex with lower-case hex for address. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-29Merge tag 'v2022.01-rc3' into nextTom Rini77-345/+2131
Prepare v2022.01-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-29Prepare v2022.01-rc3v2022.01-rc3Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-11-17 09:38:07 +0000