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2018-01-27env: Make the env save message a bit more explicitMaxime Ripard1-1/+2
Since we'll soon have support for multiple environments, the environment saving message might end up being printed multiple times if the higher priority environment cannot be used. That might confuse the user, so let's make it explicit if the operation failed or not. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27env: Pass additional parameters to the env lookup functionMaxime Ripard2-49/+116
In preparation for the multiple environment support, let's introduce two new parameters to the environment driver lookup function: the priority and operation. The operation parameter is meant to identify, obviously, the operation you might want to perform on the environment. The priority is a number passed to identify the environment priority you want to retrieve. The lowest priority parameter (0) will be the primary source. Combining the two parameters allow you to support multiple environments through different priorities, and to change those priorities between read and writes operations. This is especially useful to implement migration mechanisms where you want to always use the same environment first, be it to read or write, while the common case is more likely to use the same environment it has read from to write it to. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27env: Rename env_driver_lookup_default and env_get_default_locationMaxime Ripard1-9/+9
The env_driver_lookup_default and env_get_default_location functions are about to get refactored to support loading from multiple environment. The name is therefore not really well suited anymore. Drop the default part to be a bit more relevant. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27cmd: nvedit: Get rid of the env lookupMaxime Ripard3-12/+3
The nvedit command is the only user of env_driver_lookup_default outside of the environment code itself, and it uses it only to print the environment it's about to save to during env save. As we're about to rework the environment to be able to handle multiple environment sources, we might not have an idea of what environment backend is going to be used before trying (and possibly failing for some). Therefore, it makes sense to remove that message and move it to the env_save function itself. As a side effect, we also can get rid of the call to env_driver_lookup_default that is also about to get refactored. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-26Merge git://git.denx.de/u-boot-sunxiTom Rini11-2/+24
2018-01-26ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32Tom Rini1-5/+5
Now that we have and use wait_for_bit_le32() available, the callers of cm_write_with_phase() should not be casting values to u32 and instead we expect a const void *, so provide that directly. Fixes: 48263504c8d5 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit") Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-26gpio: sunxi: Add compatible string for H5 PIOChris Blake1-0/+1
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards. Signed-off-by: Chris Blake <chrisrblake93@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: remove external link and format commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-26sunxi: Add limit with the MMC environmentMaxime Ripard1-0/+10
The MMC environment offset is getting very close to the end of the U-Boot binary now. Since we want to make sure this will not overflow, add a size limit in the board for arm64. arm32 has already that limit enforced in our custom image generation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26Makefile: Add size check to the u-boot.itb make targetMaxime Ripard1-0/+1
The make macro to check if the binary exceeds the board size limit is not called. Make sure that is the case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26sunxi: imply CONFIG_OF_LIBFDT_OVERLAYAndre Heider3-2/+1
fdt overlay support is useful for all sunxi boards, enable per default and remove it from sunxi defconfigs. Signed-off-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26net: regex: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this option that is not critical until we can adress the issue properly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26video: bpp16: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26video: bpp8: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: misc: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: loads: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: loadb: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: unzip: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26cmd: crc32: Disable by default on sunXiMaxime Ripard1-0/+1
The sunXi arm64 build has overflown, leading to the main U-boot binary overwriting the environment when flashing the new image, or even worse, overwriting itself when we're calling saveenv. Disable this command that is not critical until we can adress the issue properly. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26dfu: select HASHMaxime Ripard1-0/+1
The DFU code relies on the HASH config option. Make sure it is always there by selecting it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26Merge git://git.denx.de/u-boot-mipsTom Rini28-1/+995
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini79-519/+1616
2018-01-26MIPS: add BMIPS Comtrend AR-5315u boardÁlvaro Fernández Rojas9-0/+195
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6318 SoC familyÁlvaro Fernández Rojas6-0/+270
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: ram: bmips: add BCM6318 supportÁlvaro Fernández Rojas1-0/+19
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: cpu: bmips: add BCM6318 supportÁlvaro Fernández Rojas1-0/+35
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add BMIPS Comtrend WAP-5813n boardÁlvaro Fernández Rojas9-0/+170
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26MIPS: add support for Broadcom MIPS BCM6368 SoC familyÁlvaro Fernández Rojas5-0/+263
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26dm: cpu: bmips: add BCM6368 supportÁlvaro Fernández Rojas1-0/+36
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26DW SPI: Get clock value from Device TreeEugeniy Paltsev1-2/+43
Add option to set spi controller clock frequency via device tree using standard clock bindings. Define dw_spi_get_clk function as 'weak' as some targets (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API and implement dw_spi_get_clk their own way in their clock manager. Get rid of clock_manager.h include as we don't use cm_get_spi_controller_clk_hz function anymore. (we use redefined dw_spi_get_clk in SOCFPGA clock managers instead) Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26SOCFPGA: clock manager: implement dw_spi_get_clk functionEugeniy Paltsev2-0/+18
Implement dw_spi_get_clk function to override its weak implementation in designware_spi.c driver. We need this change to get rid of cm_get_spi_controller_clk_hz function and clock_manager.h include in designware_spi.c driver. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-25mips: bmips: increment SYS_MALLOC_F_LENÁlvaro Fernández Rojas1-0/+3
This prevents the following ENOMEM: Error binding driver 'bmips_cpu': -12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25boston: Pad binary in .mcs to a multiple of 16 bytesPaul Burton1-1/+4
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the final 0x00 byte which ends the .relocs section seems to be skipped & left in flash as 0xff unless the data contained in the .mcs is padded out to a 16 byte boundary. Without our final zero byte relocation will fail with an error about a spurious reloc: Avoid this problem by padding out the data in the .mcs file to a 16 byte boundary using srec_cat's -range-pad functionality. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-24Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini9-17/+41
2018-01-24Merge git://git.denx.de/u-boot-mmcTom Rini14-33/+836
2018-01-24mmc: Poll for broken card detection caseJun Nie2-0/+9
Poll for broken card detection case instead of return no card detected. Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24mmc: fix to assign to correct clock value when clock is enablingJaehoon Chung1-1/+1
When clock is enabling, it's assigned to 0 as mmc->clock. Then it can't initialize any card. Fix to assign to correct clock value as mmc->cfg->f_min or f_max. Fixes: 9546eb92cb6 ("mmc: fix the wrong disabling clock") Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Guillaume GARDET <guillaume.gardet@free.fr> Tested-by: Anand Moon <linux.amoon@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24configs: odroid-xu3: enable the configs relevant to regulatorJaehoon Chung1-0/+2
Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24power: pmic: s2mps11: probe the regulator driverJaehoon Chung1-0/+28
Add the probe function to support the s2mps11 regulator driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24power: regulator: s2mps11: add a regulator driver for s2mps11Jaehoon Chung4-0/+661
exynos5422 has the s2mps11 PMIC. s2mps11 pmic has the 10-BUCK and 38-LDO regulators. Each IP and devices in exynos5422 can be controlled by each regulators. This patch is support for s2mps11 regulator driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24spi: cadence_qspi_apb: Make flash writes 32 bit alignedVignesh R1-6/+25
Make flash writes 32 bit aligned by using bounce buffers to deal with non 32 bit aligned buffers. This is required because as per TI K2G TRM[1], the external master is only permitted to issue 32-bit data interface writes until the last word of an indirect transfer. Otherwise indirect writes is known to fail sometimes. [1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when ↵Vignesh R4-23/+6
possible" This reverts commit 57897c13de03ac0136d64641a3eab526c6810387. Using bounce_buf.c to handle non-DMA alignment problems is bad as bounce_buf.c does cache manipulations which is not required. Therefore revert this patch in favour of local bounce buffer solution in the next patch. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when ↵Goldschmidt Simon1-16/+10
possible" This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f. This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates the data cache after reading. This is meant for dma transfers only and breaks the cadence_qspi driver which copies via cpu only: data that is copied by the cpu is in cache only and the cache invalidation at the end throws away this data. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jason Rush <jarush@gmail.com> Acked-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24dts: cadence_spi: Update documentation for DT bindingsJason Rush1-5/+8
Update documentation to reflect adopting the Linux DT bindings. Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com> Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
2018-01-24config: cadence_spi: Remove defines read from DTJason Rush3-3/+0
Cleanup unused #define values that are read from the DT. Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com> Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
2018-01-24dts: cadence_spi: Sync DT bindings with LinuxJason Rush12-89/+84
Adopt the Linux DT bindings and clean-up duplicate and unused values. Fix indentation of the QSPI node in the keystone k2g device tree. Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com> Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
2018-01-24spi: cadence_spi: Sync DT bindings with LinuxJason Rush3-20/+21
Adopt the Linux DT bindings. This also fixes an issue with the indaddrtrig register on the Cadence QSPI device being programmed with the wrong value for the socfpga arch. Tested on TI K2G platform: Tested-by: Vignesh R <vigneshr@ti.com> Tested on a socfpga-cyclonev board: Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Signed-off-by: Jason Rush <jarush@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com> Acked-by: Marek Vasut <marex@denx.de>
2018-01-24spi: kirkwood_spi: implement workaround for FE-9144572Chris Packham2-3/+72
Erratum NO. FE-9144572: The device SPI interface supports frequencies of up to 50 MHz. However, due to this erratum, when the device core clock is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and CPOL=CPHA=1 there might occur data corruption on reads from the SPI device. Implement the workaround by setting the TMISO_SAMPLE value to 0x2 in the timing1 register. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24sf_probe: Merge spi_flash_probe_tail into spi_flash_probeMario Six1-12/+7
spi_flash_probe_tail is now only called from spi_flash_probe, hence we can merge its body into spi_flash_probe. Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24spi: spi-uclass: Fix style violationsMario Six1-3/+2
Remove a superfluous newline, and reduce the scope of a variable. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24spi: sf_probe: Fix style violationsMario Six1-2/+2
Fix two indention-related style violations. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Jagan Teki <jagan@openedev.com>