aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2021-06-09imx: support for conga-QMX8 boardOliver Graute17-0/+1469
Add i.MX8QM qmx8 congatec board support U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Congatec QMX8 Qseven series Board: conga-QMX8 Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9 Boot: SD2 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 switch to partitions #0, OK mmc2 is current device Net: Error: ethernet@5b040000 address not set. No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2021-06-09arm: imx: imx8mm: correct unrecognized fracpll frequencyAndrey Zhizhikin1-1/+1
Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() macro, which expands the value provided to the Hz range without taking into account the precise Hz setting. This causes the frequency of 266 MHz not ot be found in the imx8mm_fracpll_tbl, since it is entered there with a precise Hz value. This in turn causes the boot hang in SPL, as proper DDR fracpll frequency cannot be determined. Correct the value in imx8mm_fracpll_tbl to match the one expanded by MHZ(266) macro, rounding it down to MHz range only. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m") Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09pico-imx6: README: Fix the boot mode settings URLFabio Estevam1-1/+1
The original URL that explains the boot mode setting is no longer valid. Update to the new one. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-06-09imx: ventana: enable dm support for PCI and FEC ethernetTim Harvey17-94/+61
Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration. Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x. Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-06-09arm: imx: imx8mm: clock: make debug output more descriptiveAndrey Zhizhikin1-3/+3
Clock initialization functionality has ambitious debug messages, which are printed out when failures are triggered during execution: - Separate frequency table lookup functions have the the same output that makes it impossible to understand which function failed and produced the output - PLL decoding routine has a generic debug statement printed, which does not state the actual value failed to be found Extend the output for both cases with prefixing table lookup functions output with function name, and report the failed value in PLL decoding routine. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09Add EV-iMX280-NANO-X-MB boardOleh Kravchenko6-10/+224
A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09Add out4.ru O4-iMX-NANO boardOleh Kravchenko12-0/+819
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09ARM: imx8m: verdin-imx8mm: Increase bootm size to 64 MiBMarek Vasut1-0/+2
Uncompressed aarch64 kernel Image are rather large, increase the bootm size limit to 64 MiB to cater for that. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-06-09configs: imxrt1050-evk: enable host usb support and its commandGiulio Benetti1-1/+6
Now that usb host is supported let's enable it on this board. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: enable usbotg1 node as hostGiulio Benetti1-0/+5
Enable usbotg1 port node as host usb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodesGiulio Benetti1-0/+27
Usb is now supported so add all required nodes for it in imxrt1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09usb: ehci-mx6: add support for i.MXRTGiulio Benetti3-7/+12
Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3Giulio Benetti2-1/+4
Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()Giulio Benetti3-0/+19
We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpio5 node to this SoCGiulio Benetti1-0/+11
i.MXRT1020 supports gpio5, so let's add a node for it. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to ↵Giulio Benetti2-10/+34
imxrt1020-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1020-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to ↵Giulio Benetti2-13/+38
imxrt1050-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1050-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: remove u-boot,dm-splGiulio Benetti1-1/+0
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driverGiulio Benetti1-2/+3
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to lcdif node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: move lcdif assigned clock to dtsiGiulio Benetti2-3/+2
Since we assume pll5 is the default lcdif clock source let's move assigned-clocks(-parents) properties to .dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APBGiulio Benetti2-4/+7
Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09video: mxsfb: add enabling of "disp_axi" clockGiulio Benetti1-0/+11
Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it and enabling. If it fails it gives only a debug(), but this clock as well as "axi" clock is not mandatory. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09video: mxsfb: add enabling of "axi" clock other than "per" clockGiulio Benetti1-7/+18
On some SoC mxsfb needs more than one clock gate(actual "per" clock). So let's introduce "axi" clock that can be provided but it's not mandatory. This is inspired from linux mxsfb driver. Also let's rename "per" clock to "pix" clock for compatibility with already existing .dts lcdif nodes implementation. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09configs: imxrt1050-evk: enable imx gpt timer as tick-timerGiulio Benetti1-0/+1
Let's enable imx-gpt-timer in imx1050-evk defconfig. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: add device_type = "memory" to memory nodeGiulio Benetti1-0/+1
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPLGiulio Benetti1-0/+4
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-bootGiulio Benetti1-0/+1
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: enable gpt1 timerGiulio Benetti1-0/+4
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add gpt1 nodeGiulio Benetti1-0/+8
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add node label to oscGiulio Benetti1-1/+1
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09configs: imxrt1020-evk: enable imx gpt timer as tick-timerGiulio Benetti1-0/+1
Let's enable imx-gpt-timer in imx1020-evk defconfig. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: add device_type = "memory" to memory nodeGiulio Benetti1-0/+1
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPLGiulio Benetti1-0/+4
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-bootGiulio Benetti1-0/+1
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: enable gpt1 timerGiulio Benetti1-0/+4
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpt1 nodeGiulio Benetti1-0/+8
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add node label to oscGiulio Benetti1-1/+1
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09timer: imx-gpt: Add timer support for i.MX SoCs familyGiulio Benetti3-0/+170
This timer driver uses GPT Timer (General Purpose Timer) available on a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator as well as peripheral clock. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> [Giulio: added the driver's stub and handled peripheral clock prescaler setting making driver to work correctly] Signed-off-by: Jesse Taube <mr.bossman075@gmail.com> [Jesse: added init, setting prescaler for 24Mhz support and enabling timer]
2021-06-09arm: imxrt: soc: make mpu regions genericGiulio Benetti1-3/+3
This mpu handling works for every i.MXRT SoC that we have, so let's generalize imxrt1050_region_config to imxrt_region_config. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-08Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini12-1115/+1834
- More pinctrl updates
2021-06-07pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12Marek Vasut12-1115/+1834
Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large commit, since the macros in sh-pfc.h also got updated, so all the PFC tables must be updated in lockstep. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-07Prepare v2021.07-rc4v2021.07-rc4Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07configs: Resync with savedefconfigTom Rini12-68/+13
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07Merge tag 'u-boot-rockchip-20210606' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-rockchip
2021-06-06Merge tag 'dm-pull-6jun21' of https://source.denx.de/u-boot/custodians/u-boot-dmWIP/06Jun2021Tom Rini5-13/+44
Minor fixes for sandbox and handling of dm-ranges
2021-06-05Merge tag 'video-for-2021-07-rc3' of ↵WIP/05Jun2021Tom Rini11-25/+33
https://source.denx.de/u-boot/custodians/u-boot-video - disable legacy video for brxre1, mx28evk, pico-imx6ul, pxm2 and rut boards after DM_VIDEO conversion deadline
2021-06-05test: add dm_test_read_resourcePatrick Delaunay1-0/+33
Add a test of dev_read_resource with translation or without translation Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05net: luton: remove address translation after ofnode_read_resourcePatrick Delaunay1-4/+1
Removed call of ofnode_translate_address() after ofnode_read_resource in luton_switch.c:luton_probe(); it is unnecessary since the commit feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource"). Fixes: feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource") Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-05pwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"Alper Nebi Yasak1-1/+1
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This driver was sent to the mailing list before that change, merged after it, and still has the old form. Apply the rename here as well. Fixes: 1b9ee2882e6b ("pwm: Add a driver for Chrome OS EC PWM") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05sandbox: correct determination of the text baseHeinrich Schuchardt1-1/+4
os_find_text_base() assumes that first line of /proc/self/maps holds information about the text. Hence we must call the function before calling os_malloc() which calls mmap(0x10000000,). Failure to do so has led to incorrect values for pc_reloc when an exception was reported => exception undefined Illegal instruction pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c as well as incorrect output of the bdinfo command => bdinfo relocaddr = 0x0000000007858000 reloc off = 0x0000000010000000 Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-15 20:17:40 +0000