aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2019-01-24net: move ether_crc to tsec driverChris Packham3-25/+25
ether_crc was added to the core net code in commit 53a5c424bf86 ("multicast tftp: RFC2090") so that other drivers could use it. However the only current user of it is tsec.c so move it there. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: phy: realtek: Add functions to read PHY's extended registersCarlo Caione1-0/+29
According to the datasheet to access the extended registers we have to: 1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ) 2. Read/Write the target Register Data 3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE Standard Registers) Hook the missing functions so that we can use the `mdio rx/wx` command to easily access the extended registers. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: macb: fix mapping of registersRamon Fried1-1/+3
Some architectures (MIPS) needs mapping to access IOMEM. Fix that. Fixes: f1dcc19b213d ("net: macb: Convert to driver model") Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: mvneta: Add GPIO configuration supportAditya Prayoga1-0/+15
This patch add GPIO configuration support in mvneta driver. Driver will handle PHY reset. GPIO pins should be set in device tree. Ported from mvpp2x [https://patchwork.ozlabs.org/patch/799654/] Initial discussion to port the changes into mvneta [https://patchwork.ozlabs.org/patch/1005765/] Signed-off-by: Aditya Prayoga <aditya@kobol.io> Tested-by: Dennis Gilmore <dgilmore@redhat.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: mvgbe: fallback phy-mode to GMIIChris Packham1-4/+2
Some existing device trees don't specify a phy-mode so fallback to GMII when a phy-mode is not provided. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: phy: micrel: fix KSZ9031 clock skew for values greater 0psAndreas Pretzsch1-2/+2
For KSZ9021, all skew register fields are 4-bit wide. For KSZ9031, the clock skew register fields are 5-bit wide. The common code in ksz90x1_of_config_group calculating the combined register value checks if the requested value is above the maximum and uses this maximum if so. The calculation of this maximum uses the register width, but the check itself does not. It uses a hardcoded value of 0xf, which is too low in case of the 5-bit clock (0x1f). This detail was probably lost during driver unification. Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps), this silently results in 1860 (== +960ps) instead of the requested one. Fix the check by using the bit width instead of hardcoded value(s). Signed-off-by: Andreas Pretzsch <apr@cn-eng.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: fix env flags for eth10addr and aboveSimon Goldschmidt1-1/+1
With CONFIG_REGEX enabled, ETHADDR_WILDCARD is set up for up to 10 interfaces (0..9) as the number can only have one digit. On boards with more than 10 interfaces, this leads to the protection and format checks being absent for eth10addr and above. Fix this by changing ETHADDR_WILDCARD from "\\d?" to "\\d*" to allow more than one digit. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: remove duplicate definition of ETHADDR_WILDCARDSimon Goldschmidt1-2/+0
ETHADDR_WILDCARD is defined as the same value in both env_flags.h and env_callback.h As env_callback.h includes env_flags.h, remove the duplicate definition from env_callback.h Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: explicitly assign errno to return code in case of network failureThomas RIENOESSL2-1/+2
When dealing with two ethernet ports and having "netretry" set to "once", it could occur that the connection (e.g. an ARP request) failed, hence the status of the netloop was "NETLOOP_FAIL". Due to the setting of "netretry", the network logic would then switch to the other network interface, assigning "ret" with the return value of "net_start_again()". If this call succeeded we would return 0 (i.e. success) to the caller when in reality the network action failed. Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: mvpp2: mdio device per portBaruch Siach1-36/+33
Current code forces all ports on a given Ethernet device to use the same mdio device. In practice different ports might be wired to separate mdio devices. Move the mdio device from the container struct mvpp2 to the per port struct mvpp2_port. Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: mvpp2: fix lookup of mdio registers base addressBaruch Siach1-10/+7
Current mdio base lookup code relies on a 'reg' property at the upper CP node. There is no 'reg' property there in current DT files of Armada CP110. Use ofnode_get_addr() instead since it provides proper DT address translation. Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: designware: clear padding bytesSimon Goldschmidt1-2/+4
Short frames are padded to the minimum allowed size of 60 bytes. However, the designware driver sends old data in these padding bytes. It is common practice to zero out these padding bytes ro prevent leaking memory contents to other hosts. Fix the padding code to zero out the padded bytes at the end. Tested on socfpga gen5. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-24net: designware: fix tx packet lengthSimon Goldschmidt1-5/+7
The designware driver has a bug in setting the tx length into the dma descriptor: it always or's the length into the descriptor without zeroing out the length mask before. This results in occasional packets being transmitted with a length greater than they should be (trailer). Due to the nature of Ethernet allowing such a trailer, most packets seem to be parsed fine by remote hosts, which is probably why this hasn't been noticed. Fix this by correctly clearing the size mask before setting the new length. Tested on socfpga gen5. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-24net: phy: Add clause 45 identifier to phy_devicePankaj Bansal2-5/+11
The phy devices can be accessed via clause 22 or via clause 45. This information can be deduced when we read phy id. if the phy id is read without giving any MDIO Manageable Device Address (MMD), then it conforms to clause 22. otherwise it conforms to clause 45. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-01-23Merge tag 'mips-pull-2019-01-23' of git://git.denx.de/u-boot-mipsTom Rini42-18/+3040
- MIPS: mscc: ocelot: add ethernet switch and network support - MIPS: mscc: add support for ServalT SoC family - MIPS: mscc: add support for Serval SoC family
2019-01-23MSCC: Add board support for Serval SoC family.Horatiu Vultur6-0/+155
Add board support and configuration for Jaguar2 SoC family. The detection of the board type is based on the phy ids. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add device tree for Serval pcb106 boardHoratiu Vultur1-0/+56
Add device tree based on evaluation board pcb106. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: add device tree for Serval pcb105 boardHoratiu Vultur2-0/+205
Add device tree based on evaluation board pcb105. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: Add support for Serval SoC family.Horatiu Vultur11-14/+438
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.Horatiu Vultur3-0/+244
The Serval SoC family has 32 pins. Currently there is no support for Serval in Linux kernel. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MSCC: Add board support for Servalt SoC familyHoratiu Vultur7-0/+335
Add board support, configuration and DTS for Servalt SoC family. Currently there is one board in this family. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23MSCC: Add support for Servalt SoC family.Horatiu Vultur10-11/+419
As Ocelot, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.Horatiu Vultur3-0/+279
The Servalt SoC family has 36 pins. Currently there is not support for Servalt pinctrl in Linux kernel. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23configs: mscc_ocelot: add network supportGregory CLEMENT1-0/+1
Now that network support is added for the ocelot platform, let's add it in the default configuration. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-01-23MIPS: mscc: ocelot: add switch reset supportGregory CLEMENT1-0/+24
On some ocelots platform a workaround is needed in order to be able to reset the switch without resetting the DDR. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-01-23net: add MSCC Ocelot switch supportGregory CLEMENT4-0/+774
This patch adds support for the Microsemi Ethernet switch present on Ocelot SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23MIPS: mscc: ocelot: Add ethernet nodes for OcelotGregory CLEMENT2-0/+117
Import Ethernet related nodes from Linux Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-01-22Merge git://git.denx.de/u-boot-nds32Tom Rini4-5/+14
- Support nds32 prebuilt toolchain. - Fix some compile issues. - Fix dts mmc node compatible string.
2019-01-22nds32: dts: Fix mmc node compatible stringRick Chen2-2/+2
In the two commits: cf3922dddc44a968685b535f2af195f1e51f4a7b mmc: ftsdc010_mci: Sync compatible with DT mmc node c14e90e8445e7b1c3531b4bdeb778c47bd6570eb riscv: dts: Sync DT with Linux Kernel ftsdc010_mci's compatible has been modified as "andestech,atfsdc010" for RISC-V synchronization. But ae3xx.dts and ag101p.dts which are used for nds32 adp-ae3xx and adp-ag101p platforms did not be modified correctly at that time. It will cause mmc detection failure. Fix it here. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2019-01-22nds32: Fix boot fail issue when build with elf-mculib.Rick Chen1-1/+1
Add -mcmodel=large can let elf-mculib have the same default behavior just like linux-glibc. And it help to pass U-Boot booting sequence. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2019-01-22nds32: Generate SW fpu instruction.Rick Chen1-2/+2
Force it to generate SW fup instruction. It help to avoid bugs when running on no-HW-fpu board, but compile with v3f which support HW fpu instruction. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2019-01-22nds32: Remove gcc unused optionRick Chen1-1/+1
-G0 is an old option, not support now, So remove it. It can help to fix compile error when build with nds32 pre-build toolchain. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2019-01-22.travis.yml: Support nds32 prebuilt toolchainRick Chen1-0/+9
Download nds32 prebuild toolchain from github which is base on gcc 8.0.1 version for regression. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
2019-01-21Merge git://git.denx.de/u-boot-marvellTom Rini40-400/+1918
- Sync Armada-38x dts with Linux 4.20 from Chris - Misc changes and enhancements to Turris Mox (v4) from Marek - Reserve PSCI area for Armada 8k from Heinrich - New Allied Telesis x530 board (Armada-385) from Chris - Misc minor changes (defconfig etc)
2019-01-21Merge git://git.denx.de/u-boot-mpc83xxTom Rini2-0/+4
2019-01-21Revert "env: sf: fix environment in SPI NOR"Tom Rini1-1/+1
Per Heiko the original changes were correct and something is misbehaving on his hardware. This reverts commit 3d5931e5986a49c44cdab845c6751d845812e8d8. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-21ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to KconfigDerald D. Woods39-69/+80
This commit converts the following items to Kconfig: CONFIG_ATMEL_NAND_HWECC CONFIG_ATMEL_NAND_HW_PMECC CONFIG_PMECC_CAP CONFIG_PMECC_SECTOR_SIZE CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER [PMECC References] https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap [Mailing List Thread] https://lists.denx.de/pipermail/u-boot/2018-December/350666.html Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") [trini: Make the migration be size neutral and possibly not fix the above in all cases] Reported-by: Daniel Evans <photonthunder@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-21ARM: mvebu: add support for Allied Telesis x530Chris Packham15-1/+987
This is a range of stackable network switches. The SoC is Armada-385 and there are a number of variants with differing network port configurations. The DP variants are intended for a harsher operating environment so they use a different i2c mux and fit industrial-temp parts. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21board: mvebu: drop unused ETH_PHY macro definitionsBaruch Siach5-20/+0
These macros are not used anywhere in the boards code. Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm64: mvebu: defconfig: enable CONFIG_CMD_NVMEHeinrich Schuchardt3-0/+6
An NVME drive may be installed on the MACCHIATObin board using the PCIe slot or on the Clearfog Pro using mini a PCI-e slot. With the configuration change it becomes usable. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm64: dts: marvell: armada-ap806: reserve PSCI areaHeinrich Schuchardt1-0/+11
The memory area [0x4000000-0x4200000[ is occupied by the PSCI firmware. Any attempt to access it from U-Boot leads to an immediate crash. So let's make the same memory reservation as the vendor device tree. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: configs: turris_mox: Add 64 MiB of boot memoryMarek Behún1-0/+2
This is needed for some scenarios, such as booting large FIT image. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: turris_mox: Support 1 GB version of Turris MoxMarek Behún2-2/+18
Use get_ram_size to determine if the RAM size on Turris Mox is 512 MiB or 1 GiB. Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: turris_mox: Read info (and ethaddrs) from OTPMarek Behún4-3/+205
Add support for reading One-Time Programmable memory via mailbox, which communicates with CZ.NIC's firmware on the Secure Processor (Cortex-M3) of Armada 3720. Display product serial number and additional info, and also set MAC addresses. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21MAINTAINERS: Add entry for CZ.NIC's Turris projectMarek Behún1-0/+8
Add myself as the maintainer of CZ.NIC's Turris Omnia and Turris Mox projects. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21watchdog: armada_37xx: Fix compliance with kernel's driverMarek Behún1-42/+67
The Armada 37xx watchdog driver was recently accepted for mainline kernel by watchdog subsystem maintainer, but the driver works a little different than the one in U-Boot. This patch fixes this. In the previous implementation there was a tiny period of time when the watchdog was disabled and the system was vulnerables - this was during pinging, which was done by disabling, setting, and enabling the counter. Now pinging is done without disabling the watchdog. We use 2 counters: Counter 1 is the watchdog counter - on expiry, the system is reset. Counter 0 is used to reset Counter 1 to start counting from the set timeout again. So Counter 1 is set to be reset on Counter 0 expiry event event and pinging is done by forcing an immediate expiry event on Counter 0. Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: turris_mox: Update defconfigMarek Behún1-0/+6
Add gpio command to defconfig - this can be used to detect whether the button is pressed or light LEDs. Add DS1307 RTC driver and the date command. Add CONFIG_WATCHDOG, so that U-Boot calls watchdog_reset. Add CONFIG_MISC_INIT_R so that ethernet addresses are read from OTP before network controller is initialized. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: dts: Fix Turris Mox device treeMarek Behún1-1/+11
DTC issues a warning because #address-cells and #size-cells properties are not set in the mdio node. Also add ethernet1 alias. Also add RTC node. Also fix USB3 regulator startup delay time. Also fix PCI Express SERDES speed to 5 GHz (this is only cosmetic, the speed value is not used byt the comphy driver for PCI Express, but should be 5 GHz nonetheless). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: turris_mox: Check and configure modulesMarek Behún2-1/+244
Check if Mox modules are connected in supported mode, then configure the MDIO addresses of switch modules. Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21arm: mvebu: turris_mox: Change SERDES map depending on module topologyMarek Behún1-0/+33
When SFP module is connected directly to CPU module we want the SGMII lane speed at 1.25 Gbps. This is a temporary solution till there is a comphy driver in the kernel capable of changing SGMII speed at runtime. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-09-16 15:56:23 +0000