diff options
Diffstat (limited to 'include')
200 files changed, 4129 insertions, 1286 deletions
diff --git a/include/backlight.h b/include/backlight.h index a304c36..ac59eb2 100644 --- a/include/backlight.h +++ b/include/backlight.h @@ -7,6 +7,13 @@ #ifndef _BACKLIGHT_H #define _BACKLIGHT_H +enum { + BACKLIGHT_MAX = 100, + BACKLIGHT_MIN = 0, + BACKLIGHT_OFF = -1, + BACKLIGHT_DEFAULT = -2, +}; + struct backlight_ops { /** * enable() - Enable a backlight @@ -15,6 +22,15 @@ struct backlight_ops { * @return 0 if OK, -ve on error */ int (*enable)(struct udevice *dev); + + /** + * set_brightness - Set brightness + * + * @dev: Backlight device to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ + int (*set_brightness)(struct udevice *dev, int percent); }; #define backlight_get_ops(dev) ((struct backlight_ops *)(dev)->driver->ops) @@ -27,4 +43,13 @@ struct backlight_ops { */ int backlight_enable(struct udevice *dev); +/** + * backlight_set_brightness - Set brightness + * + * @dev: Backlight device to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ +int backlight_set_brightness(struct udevice *dev, int percent); + #endif diff --git a/include/command.h b/include/command.h index 5b1577f..200c7a5 100644 --- a/include/command.h +++ b/include/command.h @@ -67,7 +67,7 @@ extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int * * * @cmdtp: Command which caused the error * @err: Error code (0 if none, -ve for error, like -EIO) - * @return 0 (CMD_RET_SUCCESX) if there is not error, + * @return 0 (CMD_RET_SUCCESS) if there is not error, * 1 (CMD_RET_FAILURE) if an error is found * -1 (CMD_RET_USAGE) if 'usage' error is found */ diff --git a/include/common.h b/include/common.h index 83b3bdc..8b9f859 100644 --- a/include/common.h +++ b/include/common.h @@ -385,7 +385,6 @@ uint dpram_alloc(uint size); uint dpram_alloc_align(uint size,uint align); void bootcount_store (ulong); ulong bootcount_load (void); -#define BOOTCOUNT_MAGIC 0xB001C041 /* $(CPU)/.../<eth> */ void mii_init (void); diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 86fbec5..f6ce430 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -19,11 +19,7 @@ /* * CFI Flash */ -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 512 diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index d086bd7..f758ea7 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -98,13 +98,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index fb076b1..49bb382 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -232,10 +232,7 @@ combinations. this should be removed later #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_SYS_NAND_BASE 0xff800000 @@ -505,9 +502,6 @@ combinations. this should be removed later /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment Configuration */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 8476e6b..caeb34c 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -175,10 +175,7 @@ #define CONFIG_SYS_NOR_FTIM3 0x0 /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index a548af6..0a356f4 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -128,14 +128,11 @@ #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) /* FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 1f79c15..11cb395 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -201,16 +201,12 @@ # define CONFIG_ENV_SECT_SIZE 0x8000 #endif -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } #endif diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 92d4c22..a197c3a 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -139,9 +139,7 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #ifdef NORFLASH_PS32BIT # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT @@ -150,7 +148,6 @@ #endif # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 1f81820..49ed668 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -105,15 +105,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index ce2af4e..1199fa3 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -156,14 +156,12 @@ #define FLASH_SST6401B 0x200 #define SST_ID_xF6401B 0x236D236D -#undef CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI /* * Unable to use CFI driver, due to incompatible sector erase command by SST. * Amd/Atmel use 0x30 for sector erase, SST use 0x50. * 0x30 is block erase in SST */ -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_FLASH_CFI_LEGACY diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index bd5e57c..9d3bf42 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -142,14 +142,11 @@ /* * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 57bc1cf..682e2e3 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -157,8 +157,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x200000 /*----------------------------------------------------------------------- diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 2ce9b11..a068726 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -143,15 +143,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index dee7913..39e2748 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -148,16 +148,12 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 228471c..7a96dd1 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -142,14 +142,11 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #ifdef CONFIG_NANDFLASH_SIZE diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 274f4db..f62fb5a 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -142,14 +142,11 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif #ifdef CONFIG_NANDFLASH_SIZE diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 0d829b4..f08896e 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -254,10 +254,8 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#undef CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 /* Max size that the board might have */ #define CONFIG_SYS_FLASH_SIZE 0x1000000 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT @@ -266,7 +264,6 @@ /* max number of sectors on one chip */ #define CONFIG_SYS_MAX_FLASH_SECT 270 /* "Real" (hardware) sectors protection */ -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } #else diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 5bd1d4f..16becbd 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -213,16 +213,12 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 2de51d9..99b60d5 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -281,16 +281,12 @@ # define CONFIG_ENV_SECT_SIZE 0x20000 #endif -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_CFI_DRIVER 1 -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ # define CONFIG_SYS_FLASH_CHECKSUM # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE, CONFIG_SYS_CS1_BASE } # define CONFIG_FLASH_CFI_LEGACY diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 0c42b85..7cc09ab 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -189,14 +189,10 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #ifdef CONFIG_SYS_NOR1SZ # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_FLASH_SIZE ((CONFIG_SYS_NOR1SZ + CONFIG_SYS_BOOTSZ) << 20) diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index b4069db..3f5ced2 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -177,14 +177,10 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_CFI #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) -# define CONFIG_FLASH_CFI_DRIVER 1 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #ifdef CONFIG_SYS_NOR1SZ # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ # define CONFIG_SYS_FLASH_SIZE ((CONFIG_SYS_NOR1SZ + CONFIG_SYS_BOOTSZ) << 20) diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 4429f13..3c46ae0 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -76,8 +76,6 @@ /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 35 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index e5a164d..3827ea4 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -210,13 +210,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 5b5c38f..cfa5b56 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -182,13 +182,9 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 9de3744..0ccf4ac 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -184,13 +184,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 85ea171..578202f 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -172,11 +172,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index e92a8c0..8f11d9b 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -182,11 +182,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index cf2a6bd..bda477c 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -143,12 +143,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 32 /* max flash size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 77174e3..111023b 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -186,8 +186,6 @@ *Flash on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* 127 64KB sectors + 8 8KB sectors per device */ @@ -203,7 +201,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_FLASH_BANKS_LIST \ {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x800000} #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size in MB */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Vitesse 7385 */ @@ -443,7 +440,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */ #define CONFIG_ENV_SIZE 0x2000 #else - #undef CONFIG_FLASH_CFI_DRIVER #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 #endif diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 3fdf346..50f6df5 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -216,11 +216,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 32 /* max FLASH size is 32M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index aae777d..4ddd62d 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -239,14 +239,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* max FLASH size is 32M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 943ad36..524a10f 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -185,8 +185,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index b4178b1..b8a9b5c 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -114,8 +114,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 1201f46..13ad04e 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -114,8 +114,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index d825f0f..6ad0849 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -119,8 +119,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_LBC_NONCACHE_BASE 0xf8000000 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a62d4f7..b09cbab 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -169,8 +169,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_HWCONFIG /* enable hwconfig */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f45270f..bac8456 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -112,8 +112,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 724575a..d28a35f 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -113,8 +113,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 219cda9..5da70bb 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -121,8 +121,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index d336728..0edcc2e 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -151,8 +151,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_SYS_RAMBOOT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Chip select 3 - NAND */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index dd081e8..cff3ca9 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -172,8 +172,6 @@ #undef CONFIG_SYS_RAMBOOT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 02fd864..a3f29c5 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -166,8 +166,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index bc69efb..bb6dd95 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -211,8 +211,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 1ff04c3..e4ebd33 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -77,7 +75,6 @@ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* ENV setting */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index e14e8bd..18f70f0 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -321,10 +321,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ /* CFI for NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* NAND Flash on IFC */ #define CONFIG_SYS_NAND_BASE 0xff800000 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 24bec85..c9ed70c 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -220,8 +220,6 @@ #endif #endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Nand Flash */ @@ -507,7 +505,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * Environment diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 8279452..ada00ae 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -92,8 +92,6 @@ extern unsigned long get_clock_freq(void); | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 2d4d566..bd2913e 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -48,13 +48,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index cb8246a..42bfd07 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -85,12 +85,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - /* PCIe Boot - Master */ #define CONFIG_SRIO_PCIE_BOOT_MASTER /* @@ -721,9 +715,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 9374525..e30779f 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -100,12 +100,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - /* PCIe Boot - Master */ #define CONFIG_SRIO_PCIE_BOOT_MASTER /* @@ -737,9 +731,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index c7d173f..7d90797 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -57,13 +57,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #ifdef CONFIG_MTD_NOR_FLASH #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 @@ -606,9 +599,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 8639075..7375d6f 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -163,12 +163,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ @@ -756,9 +750,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment Configuration diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e4da26b..286db02 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -124,12 +124,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -690,9 +684,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 958ac70..d076d6e 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -109,12 +109,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -640,9 +634,6 @@ unsigned long get_board_ddr_clk(void); /* * Dynamic MTD Partition support with mtdparts */ -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_MTD -#endif /* * Environment diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 71fa722..34b3b05 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -73,13 +73,6 @@ #include "t4qds.h" -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 8f0bfdd..f5eed09 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -280,13 +280,6 @@ "setenv bootargs config-addr=0x60000000; " \ "bootm 0x01000000 - 0x00f00000" -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index fc1fa0c..0942b87 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -58,13 +58,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #undef CONFIG_SYS_FLASH_CHECKSUM #define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* * FLASH bank number detection @@ -474,7 +471,6 @@ * JFFS2 partitions */ /* mtdparts command line support */ -#define CONFIG_FLASH_CFI_MTD /* default mtd partition table */ #endif /* __CONFIG_H */ diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index fca607c..423ecd7 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -217,10 +217,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index 9395e61..915f416 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -168,11 +168,8 @@ * FLASH and environment organization */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 6f9f821..6cf494e 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -280,11 +280,8 @@ * FLASH and environment organization */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f1aa653..5d5b09b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -327,11 +327,6 @@ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) */ #if defined(CONFIG_NOR) -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ea04f91..4daa0ba 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -58,9 +58,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* amcore design has flash data bytes wired swapped */ #define CONFIG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 40a843a..901ce4d 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -57,8 +57,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -98,7 +96,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* ENV setting */ diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index b9ff965..edcc0cb 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -50,8 +50,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -74,7 +72,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 3c6b2c3..771189d 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -61,7 +61,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_MAX_FLASH_SECT 512 diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index e241c98..2e7fbfb 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -265,11 +265,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 259 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x2000000 -#define CONFIG_SYS_FLASH_PROTECTION 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 #define LDS_BOARD_TEXT \ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index d9bb1fc..e2a2f3b 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -118,14 +118,11 @@ /* * NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_BASE 0x10000000 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE #define PHYS_FLASH_SIZE SZ_8M #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_PROTECTION /* * USB Config diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index f0dfc99..856e032 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -60,8 +60,6 @@ /* NOR flash, if populated */ #ifdef CONFIG_SYS_USE_NORFLASH -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 99fb80d..e3eb928 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -82,11 +82,8 @@ */ /* use CFI framework */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index fb896fe..df5d5bd 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -484,11 +484,6 @@ DEFAULT_LINUX_BOOT_ENV \ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) */ #if defined(CONFIG_NOR) -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/blanche.h b/include/configs/blanche.h index e0acde3..8774bde 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -29,9 +29,7 @@ #if !defined(CONFIG_MTD_NOR_FLASH) #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index 2a02854..83050c9 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6338_H */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index 647f630..5eb8b0f 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6348_H */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index 6cb99e8..7becf3f 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbe000000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6358_H */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 142379c..1a57476 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_FLASH_BASE 0xb8000000 #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #endif /* __CONFIG_BMIPS_BCM6368_H */ diff --git a/include/configs/boston.h b/include/configs/boston.h index e19c94b..61aaa26 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -47,10 +47,6 @@ /* * Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 1024 diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 7f2b751..e772184 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -129,10 +129,6 @@ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 7b10ac8..622b024 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -105,8 +105,6 @@ #define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) @@ -116,9 +114,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 #endif #define CONFIG_SYS_MONITOR_BASE 0x0 diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h index 565141c..da70592 100644 --- a/include/configs/comtrend_ct5361.h +++ b/include/configs/comtrend_ct5361.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h index 811672b..7070a1c 100644 --- a/include/configs/comtrend_wap5813n.h +++ b/include/configs/comtrend_wap5813n.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 664ca12..cd79150 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -59,13 +59,6 @@ #define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_MTD_NOR_FLASH -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - #if defined(CONFIG_SPIFLASH) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 319f6aa..ba878eb 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -23,8 +23,6 @@ * DM support in SPL */ #ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH #undef CONFIG_DM_I2C #undef CONFIG_DM_I2C_COMPAT #endif @@ -118,7 +116,6 @@ #if !CONFIG_IS_ENABLED(DM_SERIAL) #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #endif #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) @@ -198,9 +195,6 @@ #endif #ifdef CONFIG_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index ae2b81b..2f8c655 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -78,7 +78,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE #define CONFIG_SYS_FLASH_SIZE SZ_4M -#define CONFIG_SYS_FLASH_CFI /* * NAND controller diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index d8d6d2f..2d8758d 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -151,11 +151,6 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ /* #define CONFIG_INIT_IGNORE_ERROR */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE diff --git a/include/configs/draak.h b/include/configs/draak.h index 5d1da21..9a8d6a4 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -24,15 +24,11 @@ #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA -#define CONFIG_CMD_CACHE #endif /* __DRAAK_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index fd5c9b1..e266e1f 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -140,10 +140,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 128 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_SIZE 16*1024*1024 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 1e358ec..be03bf1 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -85,8 +85,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -109,7 +107,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index a175f9e..3d90dbc 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -169,11 +169,7 @@ * 0x600C0000 - 0x00FFFFFF unused unused * 0x61000000 - 0x01FFFFFF not present unused */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT (256+8) diff --git a/include/configs/edison.h b/include/configs/edison.h index 476f5e3..86c584d 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -48,6 +48,5 @@ /* RTC */ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -#define CONFIG_RTC_MC146818 #endif diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 644f42a..89aa11c 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -90,8 +90,6 @@ * FLASH configuration */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 diff --git a/include/configs/espt.h b/include/configs/espt.h index 6bb23c6..0339de4 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ /* Timeout for Flash erase operations (in ms) */ @@ -57,7 +55,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_SECT_SIZE (128 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 944cdbb..0d84c97 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -47,7 +47,6 @@ # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ # define CONFIG_AT91_EFLASH # define CONFIG_SYS_MAX_FLASH_SECT 32 -# define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */ # define CONFIG_EFLASH_PROTSECTORS 1 diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 6c23163..e7f8b7a 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -103,7 +103,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -128,12 +127,8 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index c292c25..52e6277 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -202,8 +202,6 @@ * FLASH on the Local Bus */ #if 1 -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_FLASH_LEGACY_512Kx16 @@ -211,7 +209,6 @@ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/huawei_hg556a.h b/include/configs/huawei_hg556a.h index 0a33220..1c9bee6 100644 --- a/include/configs/huawei_hg556a.h +++ b/include/configs/huawei_hg556a.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index afa7e10..28124dd 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -164,15 +164,11 @@ /* * NOR FLASH setup */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #define CONFIG_FLASH_SHOW_PROGRESS 50 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_SIZE 8 -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000016 @@ -456,7 +452,6 @@ #define CONFIG_JFFS2_DEV "0" /* mtdparts command line support */ -#define CONFIG_FLASH_CFI_MTD #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=" __stringify(CONFIG_NETDEV) "\0" \ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index cd89fad..730e874 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -84,12 +84,8 @@ /* * Flash & Environment */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI /* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use hardware sector protection */ -#define CONFIG_SYS_FLASH_PROTECTION 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ /* CS2 Base address */ #define PHYS_FLASH_1 0xc0000000 @@ -113,7 +109,6 @@ /* * MTD */ -#define CONFIG_FLASH_CFI_MTD /* * NAND diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 952993f..9223fc2 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -81,13 +81,10 @@ * - SIB block * - U-Boot environment */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_BASE 0x24000000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Timeout values in ticks */ #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ diff --git a/include/configs/khadas-vim2.h b/include/configs/khadas-vim2.h new file mode 100644 index 0000000..7ef8f42 --- /dev/null +++ b/include/configs/khadas-vim2.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Khadas VIM2 + * + * Copyright (C) 2017 Baylibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MISC_INIT_R + +#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxm-khadas-vim2.dtb\0" + +#include <configs/meson-gx-common.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index f72cc0a..a83782e 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400 #define CONFIG_SYS_IVM_EEPROM_PAGE_LEN 0x100 -#define CONFIG_SYS_FLASH_PROTECTION - /* * BOOTP options */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 3b45e27..16b11d8 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 337a9ce..a76f606 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -84,11 +84,7 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index e3dbbc8..e258517 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -254,7 +254,6 @@ int get_scl(void); "" #if !defined(CONFIG_MTD_NOR_FLASH) -#undef CONFIG_FLASH_CFI_MTD #undef CONFIG_JFFS2_CMDLINE #endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 08e08ab..a8f7300 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -350,7 +350,6 @@ int get_scl(void); */ /* we don't need flash support */ -#undef CONFIG_FLASH_CFI_MTD #undef CONFIG_JFFS2_CMDLINE /* diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index dd7ad3e..071d928 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -63,8 +63,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ @@ -81,7 +79,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* GPIO / PFC */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 7f7ffde..4ad98c6 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -145,9 +145,6 @@ unsigned long get_board_ddr_clk(void); FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index ddd024e..2c91ae7 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -140,9 +140,6 @@ FTIM2_NOR_TWPH(0x0e)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 656d10d..4279d53 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -132,9 +132,6 @@ #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 8edaf19..9ae0953 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -110,9 +110,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 25f680c..f4e350d 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -99,9 +99,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 363154a..421d447 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -78,9 +78,6 @@ #define CONFIG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index f44b9e4..a526658 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -25,9 +25,6 @@ #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #endif diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index c04448d..f192839 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -96,9 +96,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 05c02df..6641a1b 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -102,9 +102,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ diff --git a/include/configs/malta.h b/include/configs/malta.h index ba3639d..f536234 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -19,7 +19,6 @@ #define CONFIG_PCNET_79C973 #define PCNET_HAS_PROM -#define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 /* @@ -65,9 +64,6 @@ #endif #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* * Environment diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 0cda1f6..644f339 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -61,17 +61,11 @@ /* NOR 16-bit mode */ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ #define CONFIG_FLASH_VERIFY /* NOR Flash MTD */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_MTD #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 2562bb0..ba0952c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -59,8 +59,6 @@ #ifdef FLASH # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE -# define CONFIG_SYS_FLASH_CFI 1 -# define CONFIG_FLASH_CFI_DRIVER 1 /* ?empty sector */ # define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* max number of memory banks */ @@ -68,9 +66,7 @@ /* max number of sectors on one chip */ # define CONFIG_SYS_MAX_FLASH_SECT 512 /* hardware flash protection */ -# define CONFIG_SYS_FLASH_PROTECTION /* use buffered writes (20x faster) */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # ifdef RAMENV # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) @@ -134,7 +130,6 @@ #if defined(CONFIG_MTD_PARTITIONS) /* MTD partitions */ -#define CONFIG_FLASH_CFI_MTD /* default mtd partition table */ #endif diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 6752ef6..98f0303 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -214,13 +214,10 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0xFC000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 64 /* FLASH size is 64M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 901a302..e859496 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -34,8 +34,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) /* Flash */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE 0xA0000000 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index b159c10..f582b5a 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -41,8 +41,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 230b86b..241ba69 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -47,8 +47,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ @@ -68,8 +66,6 @@ #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ -#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */ - #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_OVERWRITE 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 3584906..949fc04c 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -48,8 +48,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_RX_ETH_BUFFER (8) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 383ba9b..e153dfb 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -117,7 +117,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -146,13 +145,9 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ #define CONFIG_FLASH_SPANSION_S29WS_N -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 143e9ed..e444930 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #endif diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 8644e16..fe557f9 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -183,9 +183,14 @@ /* **** PISMO SUPPORT *** */ #if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CONFIG_SYS_FLASH_BASE 0x10000000 #endif +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_SIZE 0x4000000 + /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 39fdf06..2002444 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -178,9 +178,6 @@ #endif #ifdef CONFIG_SYS_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index aa3f227..9465fb4 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -69,7 +69,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #if defined(CONFIG_TARGET_P1021RDB) @@ -89,7 +88,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #if defined(CONFIG_TARGET_P1024RDB) @@ -134,7 +132,6 @@ /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD #endif #ifdef CONFIG_SDCARD @@ -370,10 +367,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 5c32952..d018c22 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -156,10 +156,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 @@ -327,7 +324,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * Environment diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 9dcb3b0..e88948c 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -169,8 +169,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(16) /* NOR flash */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 803de1c..f11879b 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -172,8 +172,6 @@ #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ /* NOR flash, if populated */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index e5e192d..1937829 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -88,9 +88,6 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index b19b8a5..fe384ec 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -88,9 +88,6 @@ #define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 8847685..3e4ef76 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -48,8 +48,6 @@ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (0xA0000000) @@ -72,7 +70,6 @@ * Use hardware flash sectors protection instead * of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index b39b13b..e10de1b 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -31,8 +31,6 @@ /* * NOR Flash ( Spantion S29GL256P ) */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE (0xA0000000) #define CONFIG_SYS_MAX_FLASH_BANKS (1) #define CONFIG_SYS_MAX_FLASH_SECT 256 diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index a819e1b..6ea7f38 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -56,8 +56,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_RX_ETH_BUFFER (8) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE #undef CONFIG_SYS_FLASH_QUIET_TEST /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index ef2b79e..941dbc1 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -40,8 +40,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 54ca879..e91e4bd 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) /* Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index f8e66e6..fc45f46 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -32,8 +32,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) /* NOR Flash */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 9987484..4d3c3b8 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -30,9 +30,6 @@ /* NOR flash */ #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x10000000 #define CONFIG_SYS_MAX_FLASH_SECT 131 #define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 9c5d05d..9074be8 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -119,11 +119,8 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFF800000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit port */ \ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index dfcf849..f0b1655 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -245,8 +245,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* CS5 = Local bus peripherals controlled by the EPLD */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index d777e7a..e9e264b 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -206,11 +206,8 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_BASE_EARLY 0xfff00000 /* early monitor loc */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_CLOCKS_IN_MHZ diff --git a/include/configs/sfr_nb4_ser.h b/include/configs/sfr_nb4_ser.h index 0a33220..1c9bee6 100644 --- a/include/configs/sfr_nb4_ser.h +++ b/include/configs/sfr_nb4_ser.h @@ -10,5 +10,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 2aefc69..d857fcb 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ /* Timeout for Flash erase operations (in ms) */ @@ -57,7 +55,6 @@ /* Timeout for Flash clear lock bit operations (in ms) */ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP #define CONFIG_ENV_SECT_SIZE (128 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 6cb0ef3..f27f665 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BASE (SH7785LCR_FLASH_BASE_1) @@ -75,7 +73,6 @@ #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) -#undef CONFIG_SYS_FLASH_PROTECTION #undef CONFIG_SYS_DIRECT_FLASH_TFTP /* R8A66597 */ diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 5eabdf5..9aeca97 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -45,8 +45,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #undef CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 diff --git a/include/configs/socrates.h b/include/configs/socrates.h index dd950f3..9fa8917 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -109,9 +109,6 @@ #define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */ #define CONFIG_SYS_OR1_PRELIM 0xfe000030 /* 32MB Flash */ -#define CONFIG_SYS_FLASH_CFI /* flash is CFI compat. */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ - #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ #undef CONFIG_SYS_FLASH_CHECKSUM diff --git a/include/configs/spear3xx_evb.h b/include/configs/spear3xx_evb.h index 5c8626e..2f642b1 100644 --- a/include/configs/spear3xx_evb.h +++ b/include/configs/spear3xx_evb.h @@ -80,12 +80,7 @@ #endif #if defined(CONFIG_SPEAR_EMI) - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - #if defined(CONFIG_SPEAR310) -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x50000000 #define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 #define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 @@ -101,7 +96,6 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 6 #elif defined(CONFIG_SPEAR320) -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x44000000 #define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 #define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 diff --git a/include/configs/strider.h b/include/configs/strider.h index 9b89031..972543d 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -201,15 +201,12 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_FLASH_LEGACY_512Kx16 #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 985f306..3378b4a 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -45,100 +45,34 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttymxc1\0" \ - "splashpos=m,m\0" \ + "console=ttymxc1,115200\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=undefined\0" \ + "fdtfile=undefined\0" \ "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ + "fdt_addr_r=0x18000000\0" \ "ip_dyn=yes\0" \ "mmcdev=0\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "update_sd_firmware_filename=u-boot.imx\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "findfdt=" \ - "if test $board_rev = MX6Q ; then " \ - "setenv fdt_file imx6q-udoo.dtb; fi; " \ - "if test $board_rev = MX6DL ; then " \ - "setenv fdt_file imx6dl-udoo.dtb; fi; " \ - "if test $fdt_file = undefined; then " \ - "echo WARNING: Could not determine dtb to use; fi; \0" - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" + "mmcrootfstype=ext4\0" \ + "findfdt="\ + "if test ${board_rev} = MX6Q; then " \ + "setenv fdtfile imx6q-udoo.dtb; fi; " \ + "if test ${board_rev} = MX6DL; then " \ + "setenv fdtfile imx6dl-udoo.dtb; fi; " \ + "if test ${fdtfile} = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(SATA, sata, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index ff44749..70f8712 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -55,9 +55,6 @@ /* FLASH related */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI - #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_BASE 0 #define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */ diff --git a/include/configs/vct.h b/include/configs/vct.h index 0e347a4..5710715 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -116,8 +116,6 @@ /* * CFI driver settings */ -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 90554da..85f678e 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -113,12 +113,9 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 #define CONFIG_SYS_FLASH_SIZE 32 /* size in MB */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ | BR_PS_16 /* 16 bit */ \ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 36f535e..2354f4e 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -228,13 +228,9 @@ #define CONFIG_ENV_SECT_SIZE 0x00040000 #endif -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 2ad3338..267b230 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -211,8 +211,6 @@ /* FLASH and environment organization */ #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_SIZE 0x04000000 #define CONFIG_SYS_MAX_FLASH_BANKS 2 #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0 @@ -230,8 +228,6 @@ /* Room required on the stack for the environment data */ #define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ - /* * Amount of flash used for environment: * We don't know which end has the small erase blocks so we use the penultimate @@ -245,7 +241,6 @@ (2 * CONFIG_ENV_SECT_SIZE)) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \ CONFIG_ENV_OFFSET) -#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \ CONFIG_SYS_FLASH_BASE1 } diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 7fc89e8..805f7d3 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -94,8 +94,6 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ #ifdef VME_CADDY2 #define CONFIG_SYS_FLASH_BASE 0xffc00000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 4 /* flash size in MB */ @@ -137,7 +135,6 @@ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_128MB) #endif -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_WINDOW1_BASE 0xf0000000 #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \ diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index c0bc23d..82c57b6 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -110,7 +110,6 @@ /* * MTD Command for mtdparts */ -#define CONFIG_FLASH_CFI_MTD /* * FLASH and environment organization @@ -135,12 +134,8 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* A non-standard buffered write algorithm */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ -#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ /* * NAND FLASH driver setup diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index f453f01..67b5e9a 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -25,9 +25,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif -/* generate LPC32XX-specific SPL image */ -#define CONFIG_LPC32XX_SPL - /* * Memory configurations */ @@ -149,7 +146,6 @@ /* SPL will load U-Boot from NAND offset 0x40000 */ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 #define CONFIG_SPL_PAD_TO 0x20000 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h new file mode 100644 index 0000000..bfe4c43 --- /dev/null +++ b/include/configs/xilinx_versal.h @@ -0,0 +1,91 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx Versal + * (C) Copyright 2016 - 2018 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + * + * Based on Configuration for Xilinx ZynqMP + */ + +#ifndef __XILINX_VERSAL_H +#define __XILINX_VERSAL_H + +#define CONFIG_REMAKE_ELF + +/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0xF9000000 +#define GICR_BASE 0xF9080000 + +#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 + +#define CONFIG_SYS_MEMTEST_START 0 +#define CONFIG_SYS_MEMTEST_END 1000 + +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE + +/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ +#if CONFIG_COUNTER_FREQUENCY +# define COUNTER_FREQUENCY CONFIG_COUNTER_FREQUENCY +#endif + +/* Serial setup */ +#define CONFIG_ARM_DCC +#define CONFIG_CPU_ARMV8 + +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 4800, 9600, 19200, 38400, 57600, 115200 } + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_MAY_FAIL + +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 4096 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR 0x8000000 + +/* Monitor Command Prompt */ +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_MAXARGS 64 + +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM) +# define CONFIG_NET_MULTI +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define PHY_ANEG_TIMEOUT 20000 +#endif + +#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) + +#define CONFIG_CLOCKS + +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=10000000\0" \ + "initrd_high=10000000\0" \ + "fdt_addr_r=0x40000000\0" \ + "pxefile_addr_r=0x10000000\0" \ + "kernel_addr_r=0x18000000\0" \ + "scriptaddr=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" + +#define BOOT_TARGET_DEVICES(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +/* Initial environment variables */ +#ifndef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV +#endif + +#endif /* __XILINX_VERSAL_H */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 4816bf5..2d2a87a 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -124,9 +124,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff00000, 0xc0000}, \ {0xf7f00000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 86ed586..206f0c1 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -99,9 +99,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xfbf40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 2f7fc5a..e6eea8d 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -113,9 +113,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index d98062f..a7c8dc4 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -114,9 +114,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 90310c4..33255a3 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -194,8 +194,6 @@ /* Flash & Environment */ /*=====================*/ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER /* use generic CFI driver */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MAX_FLASH_BANKS 1 #ifdef CONFIG_XTFPGA_LX60 @@ -220,7 +218,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT \ (CONFIG_SYS_FLASH_SECT_SZ/CONFIG_SYS_FLASH_PARMSECT_SZ + \ CONFIG_SYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ - 1) -#define CONFIG_SYS_FLASH_PROTECTION /* hw flash protection */ /* * Put environment in top block (64kB) diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 17b9a59..24fea68 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -113,8 +113,6 @@ unsigned char zipitz2_spi_read(void); #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 @@ -123,13 +121,10 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 - #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 #define CONFIG_SYS_FLASH_WRITE_TOUT 240000 #define CONFIG_SYS_FLASH_LOCK_TOUT 240000 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 -#define CONFIG_SYS_FLASH_PROTECTION /* * GPIO settings diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 05b42db..c8b6161 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -92,9 +92,6 @@ /* * CFI FLASH driver setup */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index f99c2cb..98411c4 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -53,11 +53,7 @@ # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 # define CONFIG_FLASH_SHOW_PROGRESS 10 -# define CONFIG_SYS_FLASH_CFI # undef CONFIG_SYS_FLASH_EMPTY_INFO -# define CONFIG_FLASH_CFI_DRIVER -# undef CONFIG_SYS_FLASH_PROTECTION -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #endif #ifdef CONFIG_NAND_ZYNQ diff --git a/include/cros_ec.h b/include/cros_ec.h index 60ecefb..4771e6b 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -69,7 +69,7 @@ struct fdt_cros_ec { * @param maxlen Maximum length of the ID field * @return 0 if ok, -1 on error */ -int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen); +int cros_ec_read_id(struct udevice *dev, char *id, int maxlen); /** * Read a keyboard scan from the CROS-EC device @@ -89,18 +89,19 @@ int cros_ec_scan_keyboard(struct udevice *dev, struct mbkp_keyscan *scan); * @param image Destination for image identifier * @return 0 if ok, <0 on error */ -int cros_ec_read_current_image(struct cros_ec_dev *dev, - enum ec_current_image *image); +int cros_ec_read_current_image(struct udevice *dev, + enum ec_current_image *image); /** * Read the hash of the CROS-EC device firmware. * * @param dev CROS-EC device + * @param hash_offset Offset in flash to read from * @param hash Destination for hash information * @return 0 if ok, <0 on error */ -int cros_ec_read_hash(struct cros_ec_dev *dev, - struct ec_response_vboot_hash *hash); +int cros_ec_read_hash(struct udevice *dev, uint hash_offset, + struct ec_response_vboot_hash *hash); /** * Send a reboot command to the CROS-EC device. @@ -112,8 +113,7 @@ int cros_ec_read_hash(struct cros_ec_dev *dev, * @param flags Flags for reboot command (EC_REBOOT_FLAG_*) * @return 0 if ok, <0 on error */ -int cros_ec_reboot(struct cros_ec_dev *dev, enum ec_reboot_cmd cmd, - uint8_t flags); +int cros_ec_reboot(struct udevice *dev, enum ec_reboot_cmd cmd, uint8_t flags); /** * Check if the CROS-EC device has an interrupt pending. @@ -144,7 +144,7 @@ enum { * expected), -ve if we should have an cros_ec device but failed to find * one, or init failed (-CROS_EC_ERR_...). */ -int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp); +int cros_ec_init(const void *blob, struct udevice**cros_ecp); /** * Read information about the keyboard matrix @@ -152,8 +152,7 @@ int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp); * @param dev CROS-EC device * @param info Place to put the info structure */ -int cros_ec_info(struct cros_ec_dev *dev, - struct ec_response_mkbp_info *info); +int cros_ec_info(struct udevice *dev, struct ec_response_mkbp_info *info); /** * Read the host event flags @@ -162,7 +161,7 @@ int cros_ec_info(struct cros_ec_dev *dev, * @param events_ptr Destination for event flags. Not changed on error. * @return 0 if ok, <0 on error */ -int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr); +int cros_ec_get_host_events(struct udevice *dev, uint32_t *events_ptr); /** * Clear the specified host event flags @@ -171,7 +170,7 @@ int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr); * @param events Event flags to clear * @return 0 if ok, <0 on error */ -int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events); +int cros_ec_clear_host_events(struct udevice *dev, uint32_t events); /** * Get/set flash protection @@ -184,9 +183,9 @@ int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events); * @param prot Destination for updated protection state from EC. * @return 0 if ok, <0 on error */ -int cros_ec_flash_protect(struct cros_ec_dev *dev, - uint32_t set_mask, uint32_t set_flags, - struct ec_response_flash_protect *resp); +int cros_ec_flash_protect(struct udevice *dev, uint32_t set_mask, + uint32_t set_flags, + struct ec_response_flash_protect *resp); /** @@ -195,7 +194,7 @@ int cros_ec_flash_protect(struct cros_ec_dev *dev, * @param dev CROS-EC device * @return 0 if ok, <0 if the test failed */ -int cros_ec_test(struct cros_ec_dev *dev); +int cros_ec_test(struct udevice *dev); /** * Update the EC RW copy. @@ -205,17 +204,15 @@ int cros_ec_test(struct cros_ec_dev *dev); * @param imafge_size content length * @return 0 if ok, <0 if the test failed */ -int cros_ec_flash_update_rw(struct cros_ec_dev *dev, - const uint8_t *image, int image_size); +int cros_ec_flash_update_rw(struct udevice *dev, const uint8_t *image, + int image_size); /** * Return a pointer to the board's CROS-EC device * - * This should be implemented by board files. - * * @return pointer to CROS-EC device, or NULL if none is available */ -struct cros_ec_dev *board_get_cros_ec_dev(void); +struct udevice *board_get_cros_ec_dev(void); struct dm_cros_ec_ops { int (*check_version)(struct udevice *dev); @@ -249,8 +246,7 @@ void cros_ec_dump_data(const char *name, int cmd, const uint8_t *data, int len); */ int cros_ec_calc_checksum(const uint8_t *data, int size); -int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, - uint32_t size); +int cros_ec_flash_erase(struct udevice *dev, uint32_t offset, uint32_t size); /** * Read data from the flash @@ -267,8 +263,8 @@ int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, * @param size Number of bytes to read * @return 0 if ok, -1 on error */ -int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, - uint32_t size); +int cros_ec_flash_read(struct udevice *dev, uint8_t *data, uint32_t offset, + uint32_t size); /** * Read back flash parameters @@ -278,8 +274,8 @@ int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset, * @param dev Pointer to device * @param info Pointer to output flash info struct */ -int cros_ec_read_flashinfo(struct cros_ec_dev *dev, - struct ec_response_flash_info *info); +int cros_ec_read_flashinfo(struct udevice *dev, + struct ec_response_flash_info *info); /** * Write data to the flash @@ -299,8 +295,8 @@ int cros_ec_read_flashinfo(struct cros_ec_dev *dev, * @param size Number of bytes to write * @return 0 if ok, -1 on error */ -int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, - uint32_t offset, uint32_t size); +int cros_ec_flash_write(struct udevice *dev, const uint8_t *data, + uint32_t offset, uint32_t size); /** * Obtain position and size of a flash region @@ -311,18 +307,18 @@ int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data, * @param size Returns size of flash region * @return 0 if ok, -1 on error */ -int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region, - uint32_t *offset, uint32_t *size); +int cros_ec_flash_offset(struct udevice *dev, enum ec_flash_region region, + uint32_t *offset, uint32_t *size); /** - * Read/write VbNvContext from/to a CROS-EC device. + * Read/write non-volatile data from/to a CROS-EC device. * * @param dev CROS-EC device * @param block Buffer of VbNvContext to be read/write * @return 0 if ok, -1 on error */ -int cros_ec_read_vbnvcontext(struct cros_ec_dev *dev, uint8_t *block); -int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block); +int cros_ec_read_nvdata(struct udevice *dev, uint8_t *block, int size); +int cros_ec_write_nvdata(struct udevice *dev, const uint8_t *block, int size); /** * Read the version information for the EC images @@ -331,8 +327,8 @@ int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block); * @param versionp This is set to point to the version information * @return 0 if ok, -1 on error */ -int cros_ec_read_version(struct cros_ec_dev *dev, - struct ec_response_get_version **versionp); +int cros_ec_read_version(struct udevice *dev, + struct ec_response_get_version **versionp); /** * Read the build information for the EC @@ -341,7 +337,7 @@ int cros_ec_read_version(struct cros_ec_dev *dev, * @param versionp This is set to point to the build string * @return 0 if ok, -1 on error */ -int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp); +int cros_ec_read_build_info(struct udevice *dev, char **strp); /** * Switch on/off a LDO / FET. @@ -387,7 +383,7 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config); * * @param ec CROS-EC device */ -void cros_ec_check_keyboard(struct cros_ec_dev *dev); +void cros_ec_check_keyboard(struct udevice *dev); struct i2c_msg; /* diff --git a/include/dm/device.h b/include/dm/device.h index 9812d86..8479344 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -270,7 +270,7 @@ struct driver { * @dev Device to check * @return platform data, or NULL if none */ -void *dev_get_platdata(struct udevice *dev); +void *dev_get_platdata(const struct udevice *dev); /** * dev_get_parent_platdata() - Get the parent platform data for a device @@ -280,7 +280,7 @@ void *dev_get_platdata(struct udevice *dev); * @dev Device to check * @return parent's platform data, or NULL if none */ -void *dev_get_parent_platdata(struct udevice *dev); +void *dev_get_parent_platdata(const struct udevice *dev); /** * dev_get_uclass_platdata() - Get the uclass platform data for a device @@ -290,7 +290,7 @@ void *dev_get_parent_platdata(struct udevice *dev); * @dev Device to check * @return uclass's platform data, or NULL if none */ -void *dev_get_uclass_platdata(struct udevice *dev); +void *dev_get_uclass_platdata(const struct udevice *dev); /** * dev_get_priv() - Get the private data for a device @@ -300,7 +300,7 @@ void *dev_get_uclass_platdata(struct udevice *dev); * @dev Device to check * @return private data, or NULL if none */ -void *dev_get_priv(struct udevice *dev); +void *dev_get_priv(const struct udevice *dev); /** * dev_get_parent_priv() - Get the parent private data for a device @@ -314,7 +314,7 @@ void *dev_get_priv(struct udevice *dev); * @dev Device to check * @return parent data, or NULL if none */ -void *dev_get_parent_priv(struct udevice *dev); +void *dev_get_parent_priv(const struct udevice *dev); /** * dev_get_uclass_priv() - Get the private uclass data for a device @@ -324,7 +324,7 @@ void *dev_get_parent_priv(struct udevice *dev); * @dev Device to check * @return private uclass data for this device, or NULL if none */ -void *dev_get_uclass_priv(struct udevice *dev); +void *dev_get_uclass_priv(const struct udevice *dev); /** * struct dev_get_parent() - Get the parent of a device @@ -332,7 +332,7 @@ void *dev_get_uclass_priv(struct udevice *dev); * @child: Child to check * @return parent of child, or NULL if this is the root device */ -struct udevice *dev_get_parent(struct udevice *child); +struct udevice *dev_get_parent(const struct udevice *child); /** * dev_get_driver_data() - get the driver data used to bind a device @@ -359,7 +359,7 @@ struct udevice *dev_get_parent(struct udevice *child); * @dev: Device to check * @return driver data (0 if none is provided) */ -ulong dev_get_driver_data(struct udevice *dev); +ulong dev_get_driver_data(const struct udevice *dev); /** * dev_get_driver_ops() - get the device's driver's operations @@ -370,7 +370,7 @@ ulong dev_get_driver_data(struct udevice *dev); * @dev: Device to check * @return void pointer to driver's operations or NULL for NULL-dev or NULL-ops */ -const void *dev_get_driver_ops(struct udevice *dev); +const void *dev_get_driver_ops(const struct udevice *dev); /** * device_get_uclass_id() - return the uclass ID of a device @@ -378,7 +378,7 @@ const void *dev_get_driver_ops(struct udevice *dev); * @dev: Device to check * @return uclass ID for the device */ -enum uclass_id device_get_uclass_id(struct udevice *dev); +enum uclass_id device_get_uclass_id(const struct udevice *dev); /** * dev_get_uclass_name() - return the uclass name of a device @@ -388,7 +388,7 @@ enum uclass_id device_get_uclass_id(struct udevice *dev); * @dev: Device to check * @return pointer to the uclass name for the device */ -const char *dev_get_uclass_name(struct udevice *dev); +const char *dev_get_uclass_name(const struct udevice *dev); /** * device_get_child() - Get the child of a device by index @@ -520,12 +520,27 @@ int device_find_first_child(struct udevice *parent, struct udevice **devp); int device_find_next_child(struct udevice **devp); /** + * device_find_first_inactive_child() - Find the first inactive child + * + * This is used to locate an existing child of a device which is of a given + * uclass. + * + * @parent: Parent device to search + * @uclass_id: Uclass to look for + * @devp: Returns device found, if any + * @return 0 if found, else -ENODEV + */ +int device_find_first_inactive_child(struct udevice *parent, + enum uclass_id uclass_id, + struct udevice **devp); + +/** * device_has_children() - check if a device has any children * * @dev: Device to check * @return true if the device has one or more children */ -bool device_has_children(struct udevice *dev); +bool device_has_children(const struct udevice *dev); /** * device_has_active_children() - check if a device has any active children diff --git a/include/dm/of_extra.h b/include/dm/of_extra.h index 97988b6..ca15df2 100644 --- a/include/dm/of_extra.h +++ b/include/dm/of_extra.h @@ -11,7 +11,7 @@ enum fmap_compress_t { FMAP_COMPRESS_NONE, - FMAP_COMPRESS_LZO, + FMAP_COMPRESS_LZ4, }; enum fmap_hash_t { @@ -26,6 +26,7 @@ struct fmap_entry { uint32_t length; uint32_t used; /* Number of bytes used in region */ enum fmap_compress_t compress_algo; /* Compression type */ + uint32_t unc_length; /* Uncompressed length */ enum fmap_hash_t hash_algo; /* Hash algorithm */ const uint8_t *hash; /* Hash value */ int hash_size; /* Hash size */ diff --git a/include/dm/platform_data/spi_davinci.h b/include/dm/platform_data/spi_davinci.h new file mode 100644 index 0000000..fbc62c2 --- /dev/null +++ b/include/dm/platform_data/spi_davinci.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_davinci_h +#define __spi_davinci_h + +struct davinci_spi_platdata { + struct davinci_spi_regs *regs; + u8 num_cs; /* total no. of CS available */ +}; + +#endif /* __spi_davinci_h */ diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 6e7c1cd..eebf2d5 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -44,6 +44,9 @@ struct udevice; /* Members of this uclass sequence themselves with aliases */ #define DM_UC_FLAG_SEQ_ALIAS (1 << 0) +/* Same as DM_FLAG_ALLOC_PRIV_DMA */ +#define DM_UC_FLAG_ALLOC_PRIV_DMA (1 << 5) + /** * struct uclass_driver - Driver for the uclass * diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h index b8e5df6..85d08f6 100644 --- a/include/dt-bindings/net/ti-dp83867.h +++ b/include/dt-bindings/net/ti-dp83867.h @@ -31,4 +31,19 @@ #define DP83867_RGMIIDCTL_3_75_NS 0xe #define DP83867_RGMIIDCTL_4_00_NS 0xf +/* IO_MUX_CFG - Clock output selection */ +#define DP83867_CLK_O_SEL_CHN_A_RCLK 0x0 +#define DP83867_CLK_O_SEL_CHN_B_RCLK 0x1 +#define DP83867_CLK_O_SEL_CHN_C_RCLK 0x2 +#define DP83867_CLK_O_SEL_CHN_D_RCLK 0x3 +#define DP83867_CLK_O_SEL_CHN_A_RCLK_DIV5 0x4 +#define DP83867_CLK_O_SEL_CHN_B_RCLK_DIV5 0x5 +#define DP83867_CLK_O_SEL_CHN_C_RCLK_DIV5 0x6 +#define DP83867_CLK_O_SEL_CHN_D_RCLK_DIV5 0x7 +#define DP83867_CLK_O_SEL_CHN_A_TCLK 0x8 +#define DP83867_CLK_O_SEL_CHN_B_TCLK 0x9 +#define DP83867_CLK_O_SEL_CHN_C_TCLK 0xA +#define DP83867_CLK_O_SEL_CHN_D_TCLK 0xB +#define DP83867_CLK_O_SEL_REF_CLK 0xC + #endif diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h new file mode 100644 index 0000000..1409c73 --- /dev/null +++ b/include/dt-bindings/power/r8a77990-sysc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_SCU 21 + +/* Always-on power area */ +#define R8A77990_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */ diff --git a/include/ec_commands.h b/include/ec_commands.h index 7605066..392c1f1 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2018 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,7 +27,13 @@ * On I2C, all bytes are sent serially in the same message. */ -/* Current version of this protocol */ +/* + * Current version of this protocol + * + * TODO(crosbug.com/p/11223): This is effectively useless; protocol is + * determined in other ways. Remove this once the kernel code no longer + * depends on it. + */ #define EC_PROTO_VERSION 0x00000002 /* Command version mask */ @@ -70,18 +76,22 @@ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ /* The offset address of each type of data in mapped memory. */ -#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */ -#define EC_MEMMAP_FAN 0x10 /* Fan speeds */ -#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */ -#define EC_MEMMAP_ID 0x20 /* 'E' 'C' */ +#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ +#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ +#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ +#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ -#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */ -#define EC_MEMMAP_SWITCHES 0x30 -#define EC_MEMMAP_HOST_EVENTS 0x34 +#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ +/* Unused 0x28 - 0x2f */ +#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ +/* Unused 0x31 - 0x33 */ +#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ +/* Reserve 0x38 - 0x3f for additional host event-related stuff */ +/* Battery values are all 32 bits */ #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ @@ -90,10 +100,33 @@ #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ +/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ +#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ +/* Unused 0x84 - 0x8f */ +#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ +/* Unused 0x91 */ +#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ +/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ +/* 0x94 - 0x99: 1st Accelerometer */ +/* 0x9a - 0x9f: 2nd Accelerometer */ +#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ +/* Unused 0xa6 - 0xdf */ + +/* + * ACPI is unable to access memory mapped data at or above this offset due to + * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe + * which might be needed by ACPI. + */ +#define EC_MEMMAP_NO_ACPI 0xe0 + +/* Define the format of the accelerometer mapped memory status byte. */ +#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f +#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) +#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ #define EC_TEMP_SENSOR_ENTRIES 16 @@ -103,6 +136,8 @@ * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. */ #define EC_TEMP_SENSOR_B_ENTRIES 8 + +/* Special values for mapped temperature sensors */ #define EC_TEMP_SENSOR_NOT_PRESENT 0xff #define EC_TEMP_SENSOR_ERROR 0xfe #define EC_TEMP_SENSOR_NOT_POWERED 0xfd @@ -113,6 +148,18 @@ */ #define EC_TEMP_SENSOR_OFFSET 200 +/* + * Number of ALS readings at EC_MEMMAP_ALS + */ +#define EC_ALS_ENTRIES 2 + +/* + * The default value a temperature sensor will return when it is present but + * has not been read this boot. This is a reasonable number to avoid + * triggering alarms on the host. + */ +#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) + #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ @@ -142,9 +189,158 @@ #define EC_HOST_CMD_FLAG_VERSION_3 0x02 /* Wireless switch flags */ -#define EC_WIRELESS_SWITCH_WLAN 0x01 -#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 -#define EC_WIRELESS_SWITCH_WWAN 0x04 +#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ +#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ +#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ +#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ +#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ + +/*****************************************************************************/ +/* + * ACPI commands + * + * These are valid ONLY on the ACPI command/data port. + */ + +/* + * ACPI Read Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_DATA bit to set + * - Read value from EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_READ 0x0080 + +/* + * ACPI Write Embedded Controller + * + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * + * Use the following sequence: + * + * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write address to EC_LPC_ADDR_ACPI_DATA + * - Wait for EC_LPC_CMDR_PENDING bit to clear + * - Write value to EC_LPC_ADDR_ACPI_DATA + */ +#define EC_CMD_ACPI_WRITE 0x0081 + +/* + * ACPI Burst Enable Embedded Controller + * + * This enables burst mode on the EC to allow the host to issue several + * commands back-to-back. While in this mode, writes to mapped multi-byte + * data are locked out to ensure data consistency. + */ +#define EC_CMD_ACPI_BURST_ENABLE 0x0082 + +/* + * ACPI Burst Disable Embedded Controller + * + * This disables burst mode on the EC and stops preventing EC writes to mapped + * multi-byte data. + */ +#define EC_CMD_ACPI_BURST_DISABLE 0x0083 + +/* + * ACPI Query Embedded Controller + * + * This clears the lowest-order bit in the currently pending host events, and + * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, + * event 0x80000000 = 32), or 0 if no event was pending. + */ +#define EC_CMD_ACPI_QUERY_EVENT 0x0084 + +/* Valid addresses in ACPI memory space, for read/write commands */ + +/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ +#define EC_ACPI_MEM_VERSION 0x00 +/* + * Test location; writing value here updates test compliment byte to (0xff - + * value). + */ +#define EC_ACPI_MEM_TEST 0x01 +/* Test compliment; writes here are ignored. */ +#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 + +/* Keyboard backlight brightness percent (0 - 100) */ +#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 +/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ +#define EC_ACPI_MEM_FAN_DUTY 0x04 + +/* + * DPTF temp thresholds. Any of the EC's temp sensors can have up to two + * independent thresholds attached to them. The current value of the ID + * register determines which sensor is affected by the THRESHOLD and COMMIT + * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme + * as the memory-mapped sensors. The COMMIT register applies those settings. + * + * The spec does not mandate any way to read back the threshold settings + * themselves, but when a threshold is crossed the AP needs a way to determine + * which sensor(s) are responsible. Each reading of the ID register clears and + * returns one sensor ID that has crossed one of its threshold (in either + * direction) since the last read. A value of 0xFF means "no new thresholds + * have tripped". Setting or enabling the thresholds for a sensor will clear + * the unread event count for that sensor. + */ +#define EC_ACPI_MEM_TEMP_ID 0x05 +#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 +#define EC_ACPI_MEM_TEMP_COMMIT 0x07 +/* + * Here are the bits for the COMMIT register: + * bit 0 selects the threshold index for the chosen sensor (0/1) + * bit 1 enables/disables the selected threshold (0 = off, 1 = on) + * Each write to the commit register affects one threshold. + */ +#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) +#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) +/* + * Example: + * + * Set the thresholds for sensor 2 to 50 C and 60 C: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET + * write 0x2 to [0x07] -- enable threshold 0 with this value + * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET + * write 0x3 to [0x07] -- enable threshold 1 with this value + * + * Disable the 60 C threshold, leaving the 50 C threshold unchanged: + * write 2 to [0x05] -- select temp sensor 2 + * write 0x1 to [0x07] -- disable threshold 1 + */ + +/* DPTF battery charging current limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 + +/* Charging limit is specified in 64 mA steps */ +#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 +/* Value to disable DPTF battery charging limit */ +#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff + +/* + * Report device orientation + * bit 0 device is tablet mode + */ +#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 +#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01 + +/* + * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data + * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. + */ +#define EC_ACPI_MEM_MAPPED_BEGIN 0x20 +#define EC_ACPI_MEM_MAPPED_SIZE 0xe0 + +/* Current version of ACPI memory address space */ +#define EC_ACPI_MEM_VERSION_CURRENT 2 + /* * This header file is used in coreboot both in C and ACPI code. The ACPI code @@ -161,6 +357,92 @@ #define __packed __attribute__((packed)) #endif +#ifndef __aligned +#define __aligned(x) __attribute__((aligned(x))) +#endif + +/* + * Attributes for EC request and response packets. Just defining __packed + * results in inefficient assembly code on ARM, if the structure is actually + * 32-bit aligned, as it should be for all buffers. + * + * Be very careful when adding these to existing structures. They will round + * up the structure size to the specified boundary. + * + * Also be very careful to make that if a structure is included in some other + * parent structure that the alignment will still be true given the packing of + * the parent structure. This is particularly important if the sub-structure + * will be passed as a pointer to another function, since that function will + * not know about the misaligment caused by the parent structure's packing. + * + * Also be very careful using __packed - particularly when nesting non-packed + * structures inside packed ones. In fact, DO NOT use __packed directly; + * always use one of these attributes. + * + * Once everything is annotated properly, the following search strings should + * not return ANY matches in this file other than right here: + * + * "__packed" - generates inefficient code; all sub-structs must also be packed + * + * "struct [^_]" - all structs should be annotated, except for structs that are + * members of other structs/unions (and their original declarations should be + * annotated). + */ +#ifdef CONFIG_HOSTCMD_ALIGNED + +/* + * Packed structures where offset and size are always aligned to 1, 2, or 4 + * byte boundary. + */ +#define __ec_align1 __packed +#define __ec_align2 __packed __aligned(2) +#define __ec_align4 __packed __aligned(4) + +/* + * Packed structure which must be under-aligned, because its size is not a + * 4-byte multiple. This is sub-optimal because it forces byte-wise access + * of all multi-byte fields in it, even though they are themselves aligned. + * + * In theory, we could duplicate the structure with __aligned(4) for accessing + * its members, but use the __packed version for sizeof(). + */ +#define __ec_align_size1 __packed + +/* + * Packed structure which must be under-aligned, because its offset inside a + * parent structure is not a 4-byte multiple. + */ +#define __ec_align_offset1 __packed +#define __ec_align_offset2 __packed __aligned(2) + +/* + * Structures which are complicated enough that I'm skipping them on the first + * pass. They are effectively unchanged from their previous definitions. + * + * TODO(rspangler): Figure out what to do with these. It's likely necessary + * to work out the size and offset of each member and add explicit padding to + * maintain those. + */ +#define __ec_todo_packed __packed +#define __ec_todo_unpacked + +#else /* !CONFIG_HOSTCMD_ALIGNED */ + +/* + * Packed structures make no assumption about alignment, so they do inefficient + * byte-wise reads. + */ +#define __ec_align1 __packed +#define __ec_align2 __packed +#define __ec_align4 __packed +#define __ec_align_size1 __packed +#define __ec_align_offset1 __packed +#define __ec_align_offset2 __packed +#define __ec_todo_packed __packed +#define __ec_todo_unpacked + +#endif /* !CONFIG_HOSTCMD_ALIGNED */ + /* LPC command status byte masks */ /* EC has written a byte in the data register and host hasn't read it yet */ #define EC_LPC_STATUS_TO_HOST 0x01 @@ -170,7 +452,7 @@ #define EC_LPC_STATUS_PROCESSING 0x04 /* Last write to EC was a command, not data */ #define EC_LPC_STATUS_LAST_CMD 0x08 -/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ +/* EC is in burst mode */ #define EC_LPC_STATUS_BURST_MODE 0x10 /* SCI event is pending (requesting SCI query) */ #define EC_LPC_STATUS_SCI_PENDING 0x20 @@ -186,7 +468,9 @@ #define EC_LPC_STATUS_BUSY_MASK \ (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) -/* Host command response codes */ +/* Host command response codes (16-bit). Note that response codes should be + * stored in a uint16_t rather than directly in a value of this type. + */ enum ec_status { EC_RES_SUCCESS = 0, EC_RES_INVALID_COMMAND = 1, @@ -202,7 +486,9 @@ enum ec_status { EC_RES_OVERFLOW = 11, /* Table / data overflow */ EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ - EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */ + EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ + EC_RES_BUS_ERROR = 15, /* Communications bus error */ + EC_RES_BUSY = 16 /* Up but too busy. Should retry */ }; /* @@ -222,7 +508,8 @@ enum host_event_code { EC_HOST_EVENT_BATTERY_CRITICAL = 7, EC_HOST_EVENT_BATTERY = 8, EC_HOST_EVENT_THERMAL_THRESHOLD = 9, - EC_HOST_EVENT_THERMAL_OVERLOAD = 10, + /* Event generated by a device attached to the EC */ + EC_HOST_EVENT_DEVICE = 10, EC_HOST_EVENT_THERMAL = 11, EC_HOST_EVENT_USB_CHARGER = 12, EC_HOST_EVENT_KEY_PRESSED = 13, @@ -240,6 +527,49 @@ enum host_event_code { /* Shutdown due to battery level too low */ EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, + /* Suggest that the AP throttle itself */ + EC_HOST_EVENT_THROTTLE_START = 18, + /* Suggest that the AP resume normal speed */ + EC_HOST_EVENT_THROTTLE_STOP = 19, + + /* Hang detect logic detected a hang and host event timeout expired */ + EC_HOST_EVENT_HANG_DETECT = 20, + /* Hang detect logic detected a hang and warm rebooted the AP */ + EC_HOST_EVENT_HANG_REBOOT = 21, + + /* PD MCU triggering host event */ + EC_HOST_EVENT_PD_MCU = 22, + + /* Battery Status flags have changed */ + EC_HOST_EVENT_BATTERY_STATUS = 23, + + /* EC encountered a panic, triggering a reset */ + EC_HOST_EVENT_PANIC = 24, + + /* Keyboard fastboot combo has been pressed */ + EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, + + /* EC RTC event occurred */ + EC_HOST_EVENT_RTC = 26, + + /* Emulate MKBP event */ + EC_HOST_EVENT_MKBP = 27, + + /* EC desires to change state of host-controlled USB mux */ + EC_HOST_EVENT_USB_MUX = 28, + + /* TABLET/LAPTOP mode event*/ + EC_HOST_EVENT_MODE_CHANGE = 29, + + /* Keyboard recovery combo with hardware reinitialization */ + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, + + /* + * Reserve this last bit to indicate that at least one bit in a + * secondary host event word is set. See crbug.com/633646. + */ + EC_HOST_EVENT_EXTENDED = 31, + /* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be @@ -250,10 +580,10 @@ enum host_event_code { EC_HOST_EVENT_INVALID = 32 }; /* Host event mask */ -#define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) +#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1)) /* Arguments at EC_LPC_ADDR_HOST_ARGS */ -struct ec_lpc_host_args { +struct __ec_align4 ec_lpc_host_args { uint8_t flags; uint8_t command_version; uint8_t data_size; @@ -262,7 +592,7 @@ struct ec_lpc_host_args { * all params/response data bytes. */ uint8_t checksum; -} __packed; +}; /* Flags for ec_lpc_host_args.flags */ /* @@ -272,7 +602,7 @@ struct ec_lpc_host_args { * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, - * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). + * without setting EC_HOST_ARGS_FLAG_TO_HOST). */ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* @@ -285,6 +615,89 @@ struct ec_lpc_host_args { #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 /*****************************************************************************/ +/* + * Byte codes returned by EC over SPI interface. + * + * These can be used by the AP to debug the EC interface, and to determine + * when the EC is not in a state where it will ever get around to responding + * to the AP. + * + * Example of sequence of bytes read from EC for a current good transfer: + * 1. - - AP asserts chip select (CS#) + * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request + * 3. - - EC starts handling CS# interrupt + * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request + * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in + * bytes looking for EC_SPI_FRAME_START + * 6. - - EC finishes processing and sets up response + * 7. EC_SPI_FRAME_START - AP reads frame byte + * 8. (response packet) - AP reads response packet + * 9. EC_SPI_PAST_END - Any additional bytes read by AP + * 10 - - AP deasserts chip select + * 11 - - EC processes CS# interrupt and sets up DMA for + * next request + * + * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than + * the following byte values: + * EC_SPI_OLD_READY + * EC_SPI_RX_READY + * EC_SPI_RECEIVING + * EC_SPI_PROCESSING + * + * Then the EC found an error in the request, or was not ready for the request + * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, + * because the EC is unable to tell when the AP is done sending its request. + */ + +/* + * Framing byte which precedes a response packet from the EC. After sending a + * request, the AP will clock in bytes until it sees the framing byte, then + * clock in the response packet. + */ +#define EC_SPI_FRAME_START 0xec + +/* + * Padding bytes which are clocked out after the end of a response packet. + */ +#define EC_SPI_PAST_END 0xed + +/* + * EC is ready to receive, and has ignored the byte sent by the AP. EC expects + * that the AP will send a valid packet header (starting with + * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. + */ +#define EC_SPI_RX_READY 0xf8 + +/* + * EC has started receiving the request from the AP, but hasn't started + * processing it yet. + */ +#define EC_SPI_RECEIVING 0xf9 + +/* EC has received the entire request from the AP and is processing it. */ +#define EC_SPI_PROCESSING 0xfa + +/* + * EC received bad data from the AP, such as a packet header with an invalid + * length. EC will ignore all data until chip select deasserts. + */ +#define EC_SPI_RX_BAD_DATA 0xfb + +/* + * EC received data from the AP before it was ready. That is, the AP asserted + * chip select and started clocking data before the EC was ready to receive it. + * EC will ignore all data until chip select deasserts. + */ +#define EC_SPI_NOT_READY 0xfc + +/* + * EC was ready to receive a request from the AP. EC has treated the byte sent + * by the AP as part of a request packet, or (for old-style ECs) is processing + * a fully received packet but is not ready to respond yet. + */ +#define EC_SPI_OLD_READY 0xfd + +/*****************************************************************************/ /* * Protocol version 2 for I2C and SPI send a request this way: @@ -332,8 +745,8 @@ struct ec_lpc_host_args { #define EC_HOST_REQUEST_VERSION 3 /* Version 3 request from host */ -struct ec_host_request { - /* Struct version (=3) +struct __ec_align4 ec_host_request { + /* Structure version (=3) * * EC will return EC_RES_INVALID_HEADER if it receives a header with a * version it doesn't know how to parse. @@ -357,13 +770,13 @@ struct ec_host_request { /* Length of data which follows this header */ uint16_t data_len; -} __packed; +}; #define EC_HOST_RESPONSE_VERSION 3 /* Version 3 response from EC */ -struct ec_host_response { - /* Struct version (=3) */ +struct __ec_align4 ec_host_response { + /* Structure version (=3) */ uint8_t struct_version; /* @@ -380,18 +793,21 @@ struct ec_host_response { /* Unused bytes in current protocol version; set to 0 */ uint16_t reserved; -} __packed; +}; /*****************************************************************************/ /* * Notes on commands: * - * Each command is an 8-byte command value. Commands which take params or - * return response data specify structs for that data. If no struct is + * Each command is an 16-bit command value. Commands which take params or + * return response data specify structures for that data. If no structure is * specified, the command does not input or output data, respectively. * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but * those are implementation-dependent and not defined here. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. */ /*****************************************************************************/ @@ -401,28 +817,28 @@ struct ec_host_response { * Get protocol version, used to deal with non-backward compatible protocol * changes. */ -#define EC_CMD_PROTO_VERSION 0x00 +#define EC_CMD_PROTO_VERSION 0x0000 -struct ec_response_proto_version { +struct __ec_align4 ec_response_proto_version { uint32_t version; -} __packed; +}; /* * Hello. This is a simple command to test the EC is responsive to * commands. */ -#define EC_CMD_HELLO 0x01 +#define EC_CMD_HELLO 0x0001 -struct ec_params_hello { +struct __ec_align4 ec_params_hello { uint32_t in_data; /* Pass anything here */ -} __packed; +}; -struct ec_response_hello { +struct __ec_align4 ec_response_hello { uint32_t out_data; /* Output will be in_data + 0x01020304 */ -} __packed; +}; /* Get version number */ -#define EC_CMD_GET_VERSION 0x02 +#define EC_CMD_GET_VERSION 0x0002 enum ec_current_image { EC_IMAGE_UNKNOWN = 0, @@ -430,49 +846,49 @@ enum ec_current_image { EC_IMAGE_RW }; -struct ec_response_get_version { +struct __ec_align4 ec_response_get_version { /* Null-terminated version strings for RO, RW */ char version_string_ro[32]; char version_string_rw[32]; char reserved[32]; /* Was previously RW-B string */ uint32_t current_image; /* One of ec_current_image */ -} __packed; +}; /* Read test */ -#define EC_CMD_READ_TEST 0x03 +#define EC_CMD_READ_TEST 0x0003 -struct ec_params_read_test { +struct __ec_align4 ec_params_read_test { uint32_t offset; /* Starting value for read buffer */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; -struct ec_response_read_test { +struct __ec_align4 ec_response_read_test { uint32_t data[32]; -} __packed; +}; /* * Get build information * * Response is null-terminated string. */ -#define EC_CMD_GET_BUILD_INFO 0x04 +#define EC_CMD_GET_BUILD_INFO 0x0004 /* Get chip info */ -#define EC_CMD_GET_CHIP_INFO 0x05 +#define EC_CMD_GET_CHIP_INFO 0x0005 -struct ec_response_get_chip_info { +struct __ec_align4 ec_response_get_chip_info { /* Null-terminated strings */ char vendor[32]; char name[32]; char revision[32]; /* Mask version */ -} __packed; +}; /* Get board HW version */ -#define EC_CMD_GET_BOARD_VERSION 0x06 +#define EC_CMD_GET_BOARD_VERSION 0x0006 -struct ec_response_board_version { +struct __ec_align2 ec_response_board_version { uint16_t board_version; /* A monotonously incrementing number. */ -} __packed; +}; /* * Read memory-mapped data. @@ -482,72 +898,73 @@ struct ec_response_board_version { * * Response is params.size bytes of data. */ -#define EC_CMD_READ_MEMMAP 0x07 +#define EC_CMD_READ_MEMMAP 0x0007 -struct ec_params_read_memmap { +struct __ec_align1 ec_params_read_memmap { uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ uint8_t size; /* Size to read in bytes */ -} __packed; +}; /* Read versions supported for a command */ -#define EC_CMD_GET_CMD_VERSIONS 0x08 +#define EC_CMD_GET_CMD_VERSIONS 0x0008 -struct ec_params_get_cmd_versions { +struct __ec_align1 ec_params_get_cmd_versions { uint8_t cmd; /* Command to check */ -} __packed; +}; + +struct __ec_align2 ec_params_get_cmd_versions_v1 { + uint16_t cmd; /* Command to check */ +}; -struct ec_response_get_cmd_versions { +struct __ec_align4 ec_response_get_cmd_versions { /* * Mask of supported versions; use EC_VER_MASK() to compare with a * desired version. */ uint32_t version_mask; -} __packed; +}; /* - * Check EC communcations status (busy). This is needed on i2c/spi but not + * Check EC communications status (busy). This is needed on i2c/spi but not * on lpc since it has its own out-of-band busy indicator. * * lpc must read the status from the command register. Attempting this on * lpc will overwrite the args/parameter space and corrupt its data. */ -#define EC_CMD_GET_COMMS_STATUS 0x09 +#define EC_CMD_GET_COMMS_STATUS 0x0009 /* Avoid using ec_status which is for return values */ enum ec_comms_status { EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ }; -struct ec_response_get_comms_status { +struct __ec_align4 ec_response_get_comms_status { uint32_t flags; /* Mask of enum ec_comms_status */ -} __packed; +}; -/* - * Fake a variety of responses, purely for testing purposes. - * FIXME: Would be nice to force checksum errors. - */ -#define EC_CMD_TEST_PROTOCOL 0x0a +/* Fake a variety of responses, purely for testing purposes. */ +#define EC_CMD_TEST_PROTOCOL 0x000A /* Tell the EC what to send back to us. */ -struct ec_params_test_protocol { +struct __ec_align4 ec_params_test_protocol { uint32_t ec_result; uint32_t ret_len; uint8_t buf[32]; -} __packed; +}; /* Here it comes... */ -struct ec_response_test_protocol { +struct __ec_align4 ec_response_test_protocol { uint8_t buf[32]; -} __packed; +}; -/* Get prococol information */ -#define EC_CMD_GET_PROTOCOL_INFO 0x0b +/* Get protocol information */ +#define EC_CMD_GET_PROTOCOL_INFO 0x000B /* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) -struct ec_response_get_protocol_info { +struct __ec_align4 ec_response_get_protocol_info { /* Fields which exist if at least protocol version 3 supported */ /* Bitmask of protocol versions supported (1 << n means version n)*/ @@ -561,15 +978,153 @@ struct ec_response_get_protocol_info { /* Flags; see EC_PROTOCOL_INFO_* */ uint32_t flags; -} __packed; +}; + + +/*****************************************************************************/ +/* Get/Set miscellaneous values */ + +/* The upper byte of .flags tells what to do (nothing means "get") */ +#define EC_GSV_SET 0x80000000 + +/* The lower three bytes of .flags identifies the parameter, if that has + meaning for an individual command. */ +#define EC_GSV_PARAM_MASK 0x00ffffff + +struct __ec_align4 ec_params_get_set_value { + uint32_t flags; + uint32_t value; +}; + +struct __ec_align4 ec_response_get_set_value { + uint32_t flags; + uint32_t value; +}; + +/* More than one command can use these structs to get/set parameters. */ +#define EC_CMD_GSV_PAUSE_IN_S5 0x000C + +/*****************************************************************************/ +/* List the features supported by the firmware */ +#define EC_CMD_GET_FEATURES 0x000D + +/* Supported features */ +enum ec_feature_code { + /* + * This image contains a limited set of features. Another image + * in RW partition may support more features. + */ + EC_FEATURE_LIMITED = 0, + /* + * Commands for probing/reading/writing/erasing the flash in the + * EC are present. + */ + EC_FEATURE_FLASH = 1, + /* + * Can control the fan speed directly. + */ + EC_FEATURE_PWM_FAN = 2, + /* + * Can control the intensity of the keyboard backlight. + */ + EC_FEATURE_PWM_KEYB = 3, + /* + * Support Google lightbar, introduced on Pixel. + */ + EC_FEATURE_LIGHTBAR = 4, + /* Control of LEDs */ + EC_FEATURE_LED = 5, + /* Exposes an interface to control gyro and sensors. + * The host goes through the EC to access these sensors. + * In addition, the EC may provide composite sensors, like lid angle. + */ + EC_FEATURE_MOTION_SENSE = 6, + /* The keyboard is controlled by the EC */ + EC_FEATURE_KEYB = 7, + /* The AP can use part of the EC flash as persistent storage. */ + EC_FEATURE_PSTORE = 8, + /* The EC monitors BIOS port 80h, and can return POST codes. */ + EC_FEATURE_PORT80 = 9, + /* + * Thermal management: include TMP specific commands. + * Higher level than direct fan control. + */ + EC_FEATURE_THERMAL = 10, + /* Can switch the screen backlight on/off */ + EC_FEATURE_BKLIGHT_SWITCH = 11, + /* Can switch the wifi module on/off */ + EC_FEATURE_WIFI_SWITCH = 12, + /* Monitor host events, through for example SMI or SCI */ + EC_FEATURE_HOST_EVENTS = 13, + /* The EC exposes GPIO commands to control/monitor connected devices. */ + EC_FEATURE_GPIO = 14, + /* The EC can send i2c messages to downstream devices. */ + EC_FEATURE_I2C = 15, + /* Command to control charger are included */ + EC_FEATURE_CHARGER = 16, + /* Simple battery support. */ + EC_FEATURE_BATTERY = 17, + /* + * Support Smart battery protocol + * (Common Smart Battery System Interface Specification) + */ + EC_FEATURE_SMART_BATTERY = 18, + /* EC can detect when the host hangs. */ + EC_FEATURE_HANG_DETECT = 19, + /* Report power information, for pit only */ + EC_FEATURE_PMU = 20, + /* Another Cros EC device is present downstream of this one */ + EC_FEATURE_SUB_MCU = 21, + /* Support USB Power delivery (PD) commands */ + EC_FEATURE_USB_PD = 22, + /* Control USB multiplexer, for audio through USB port for instance. */ + EC_FEATURE_USB_MUX = 23, + /* Motion Sensor code has an internal software FIFO */ + EC_FEATURE_MOTION_SENSE_FIFO = 24, + /* Support temporary secure vstore */ + EC_FEATURE_VSTORE = 25, + /* EC decides on USB-C SS mux state, muxes configured by host */ + EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, + /* EC has RTC feature that can be controlled by host commands */ + EC_FEATURE_RTC = 27, + /* The MCU exposes a Fingerprint sensor */ + EC_FEATURE_FINGERPRINT = 28, + /* The MCU exposes a Touchpad */ + EC_FEATURE_TOUCHPAD = 29, + /* The MCU has RWSIG task enabled */ + EC_FEATURE_RWSIG = 30, + /* EC has device events support */ + EC_FEATURE_DEVICE_EVENT = 31, + /* EC supports the unified wake masks for LPC/eSPI systems */ + EC_FEATURE_UNIFIED_WAKE_MASKS = 32, +}; + +#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) +#define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32)) +struct __ec_align4 ec_response_get_features { + uint32_t flags[2]; +}; + +/*****************************************************************************/ +/* Get the board's SKU ID from EC */ +#define EC_CMD_GET_SKU_ID 0x000E + +/* Set SKU ID from AP */ +#define EC_CMD_SET_SKU_ID 0x000F + +struct __ec_align4 ec_sku_id_info { + uint32_t sku_id; +}; /*****************************************************************************/ /* Flash commands */ /* Get flash info */ -#define EC_CMD_FLASH_INFO 0x10 +#define EC_CMD_FLASH_INFO 0x0010 +#define EC_VER_FLASH_INFO 2 -struct ec_response_flash_info { +/* Version 0 returns these fields */ +struct __ec_align4 ec_response_flash_info { /* Usable flash size, in bytes */ uint32_t flash_size; /* @@ -587,40 +1142,157 @@ struct ec_response_flash_info { * multiple of this. */ uint32_t protect_block_size; -} __packed; +}; + +/* Flags for version 1+ flash info command */ +/* EC flash erases bits to 0 instead of 1 */ +#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) + +/* Flash must be selected for read/write/erase operations to succeed. This may + * be necessary on a chip where write/erase can be corrupted by other board + * activity, or where the chip needs to enable some sort of programming voltage, + * or where the read/write/erase operations require cleanly suspending other + * chip functionality. */ +#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1) + +/* + * Version 1 returns the same initial fields as version 0, with additional + * fields following. + * + * gcc anonymous structs don't seem to get along with the __packed directive; + * if they did we'd define the version 0 structure as a sub-structure of this + * one. + * + * Version 2 supports flash banks of different sizes: + * The caller specified the number of banks it has preallocated + * (num_banks_desc) + * The EC returns the number of banks describing the flash memory. + * It adds banks descriptions up to num_banks_desc. + */ +struct __ec_align4 ec_response_flash_info_1 { + /* Version 0 fields; see above for description */ + uint32_t flash_size; + uint32_t write_block_size; + uint32_t erase_block_size; + uint32_t protect_block_size; + + /* Version 1 adds these fields: */ + /* + * Ideal write size in bytes. Writes will be fastest if size is + * exactly this and offset is a multiple of this. For example, an EC + * may have a write buffer which can do half-page operations if data is + * aligned, and a slower word-at-a-time write mode. + */ + uint32_t write_ideal_size; + + /* Flags; see EC_FLASH_INFO_* */ + uint32_t flags; +}; + +struct __ec_align4 ec_params_flash_info_2 { + /* Number of banks to describe */ + uint16_t num_banks_desc; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +}; + +struct ec_flash_bank { + /* Number of sector is in this bank. */ + uint16_t count; + /* Size in power of 2 of each sector (8 --> 256 bytes) */ + uint8_t size_exp; + /* Minimal write size for the sectors in this bank */ + uint8_t write_size_exp; + /* Erase size for the sectors in this bank */ + uint8_t erase_size_exp; + /* Size for write protection, usually identical to erase size. */ + uint8_t protect_size_exp; + /* Reserved; set 0; ignore on read */ + uint8_t reserved[2]; +}; + +struct __ec_align4 ec_response_flash_info_2 { + /* Total flash in the EC. */ + uint32_t flash_size; + /* Flags; see EC_FLASH_INFO_* */ + uint32_t flags; + /* Maximum size to use to send data to write to the EC. */ + uint32_t write_ideal_size; + /* Number of banks present in the EC. */ + uint16_t num_banks_total; + /* Number of banks described in banks array. */ + uint16_t num_banks_desc; + struct ec_flash_bank banks[0]; +}; /* * Read flash * * Response is params.size bytes of data. */ -#define EC_CMD_FLASH_READ 0x11 +#define EC_CMD_FLASH_READ 0x0011 -struct ec_params_flash_read { +struct __ec_align4 ec_params_flash_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; /* Write flash */ -#define EC_CMD_FLASH_WRITE 0x12 +#define EC_CMD_FLASH_WRITE 0x0012 #define EC_VER_FLASH_WRITE 1 /* Version 0 of the flash command supported only 64 bytes of data */ #define EC_FLASH_WRITE_VER0_SIZE 64 -struct ec_params_flash_write { +struct __ec_align4 ec_params_flash_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ /* Followed by data to write */ -} __packed; +}; /* Erase flash */ -#define EC_CMD_FLASH_ERASE 0x13 +#define EC_CMD_FLASH_ERASE 0x0013 -struct ec_params_flash_erase { +/* v0 */ +struct __ec_align4 ec_params_flash_erase { uint32_t offset; /* Byte offset to erase */ uint32_t size; /* Size to erase in bytes */ -} __packed; +}; + + +#define EC_VER_FLASH_WRITE 1 +/* v1 add async erase: + * subcommands can returns: + * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). + * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. + * EC_RES_ERROR : other errors. + * EC_RES_BUSY : an existing erase operation is in progress. + * EC_RES_ACCESS_DENIED: Trying to erase running image. + * + * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just + * properly queued. The user must call ERASE_GET_RESULT subcommand to get + * the proper result. + * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send + * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. + * ERASE_GET_RESULT command may timeout on EC where flash access is not + * permitted while erasing. (For instance, STM32F4). + */ +enum ec_flash_erase_cmd { + FLASH_ERASE_SECTOR, /* Erase and wait for result */ + FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ + FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ +}; + +struct __ec_align4 ec_params_flash_erase_v1 { + /* One of ec_flash_erase_cmd. */ + uint8_t cmd; + /* Pad byte; currently always contains 0 */ + uint8_t reserved; + /* No flags defined yet; set to 0 */ + uint16_t flag; + /* Same as v0 parameters. */ + struct ec_params_flash_erase params; +}; /* * Get/set flash protection. @@ -632,7 +1304,7 @@ struct ec_params_flash_erase { * * If mask=0, simply returns the current flags state. */ -#define EC_CMD_FLASH_PROTECT 0x15 +#define EC_CMD_FLASH_PROTECT 0x0015 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ /* Flags for flash protection */ @@ -655,15 +1327,23 @@ struct ec_params_flash_erase { * re-requesting the desired flags, or by a hard reset if that fails. */ #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) -/* Entile flash code protected when the EC boots */ +/* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) - -struct ec_params_flash_protect { +/* RW flash code protected when the EC boots */ +#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7) +/* RW flash code protected now. */ +#define EC_FLASH_PROTECT_RW_NOW (1 << 8) +/* Rollback information flash region protected when the EC boots */ +#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9) +/* Rollback information flash region protected now */ +#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10) + +struct __ec_align4 ec_params_flash_protect { uint32_t mask; /* Bits in flags to apply */ uint32_t flags; /* New flags to apply */ -} __packed; +}; -struct ec_response_flash_protect { +struct __ec_align4 ec_response_flash_protect { /* Current value of flash protect flags */ uint32_t flags; /* @@ -674,7 +1354,7 @@ struct ec_response_flash_protect { uint32_t valid_flags; /* Flags which can be changed given the current protection state */ uint32_t writable_flags; -} __packed; +}; /* * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash @@ -682,89 +1362,166 @@ struct ec_response_flash_protect { */ /* Get the region offset/size */ -#define EC_CMD_FLASH_REGION_INFO 0x16 +#define EC_CMD_FLASH_REGION_INFO 0x0016 #define EC_VER_FLASH_REGION_INFO 1 enum ec_flash_region { /* Region which holds read-only EC image */ EC_FLASH_REGION_RO = 0, - /* Region which holds rewritable EC image */ - EC_FLASH_REGION_RW, + /* Region which holds active rewritable EC image */ + EC_FLASH_REGION_ACTIVE, /* * Region which should be write-protected in the factory (a superset of * EC_FLASH_REGION_RO) */ EC_FLASH_REGION_WP_RO, + /* Region which holds updatable image */ + EC_FLASH_REGION_UPDATE, /* Number of regions */ EC_FLASH_REGION_COUNT, }; -struct ec_params_flash_region_info { +struct __ec_align4 ec_params_flash_region_info { uint32_t region; /* enum ec_flash_region */ -} __packed; +}; -struct ec_response_flash_region_info { +struct __ec_align4 ec_response_flash_region_info { uint32_t offset; uint32_t size; -} __packed; +}; /* Read/write VbNvContext */ -#define EC_CMD_VBNV_CONTEXT 0x17 +#define EC_CMD_VBNV_CONTEXT 0x0017 #define EC_VER_VBNV_CONTEXT 1 #define EC_VBNV_BLOCK_SIZE 16 +#define EC_VBNV_BLOCK_SIZE_V2 64 enum ec_vbnvcontext_op { EC_VBNV_CONTEXT_OP_READ, EC_VBNV_CONTEXT_OP_WRITE, }; -struct ec_params_vbnvcontext { +struct __ec_align4 ec_params_vbnvcontext { uint32_t op; - uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; + uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; +}; + +struct __ec_align4 ec_response_vbnvcontext { + uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; +}; + -struct ec_response_vbnvcontext { - uint8_t block[EC_VBNV_BLOCK_SIZE]; -} __packed; +/* Get SPI flash information */ +#define EC_CMD_FLASH_SPI_INFO 0x0018 + +struct __ec_align1 ec_response_flash_spi_info { + /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ + uint8_t jedec[3]; + + /* Pad byte; currently always contains 0 */ + uint8_t reserved0; + + /* Manufacturer / device ID from command 0x90 */ + uint8_t mfr_dev_id[2]; + + /* Status registers from command 0x05 and 0x35 */ + uint8_t sr1, sr2; +}; + + +/* Select flash during flash operations */ +#define EC_CMD_FLASH_SELECT 0x0019 + +struct __ec_align4 ec_params_flash_select { + /* 1 to select flash, 0 to deselect flash */ + uint8_t select; +}; /*****************************************************************************/ /* PWM commands */ /* Get fan target RPM */ -#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 +#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 -struct ec_response_pwm_get_fan_rpm { +struct __ec_align4 ec_response_pwm_get_fan_rpm { uint32_t rpm; -} __packed; +}; /* Set target fan RPM */ -#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 +#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 -struct ec_params_pwm_set_fan_target_rpm { +/* Version 0 of input params */ +struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 { uint32_t rpm; -} __packed; +}; + +/* Version 1 of input params */ +struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 { + uint32_t rpm; + uint8_t fan_idx; +}; /* Get keyboard backlight */ -#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ +#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 -struct ec_response_pwm_get_keyboard_backlight { +struct __ec_align1 ec_response_pwm_get_keyboard_backlight { uint8_t percent; uint8_t enabled; -} __packed; +}; /* Set keyboard backlight */ -#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 +/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ +#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 -struct ec_params_pwm_set_keyboard_backlight { +struct __ec_align1 ec_params_pwm_set_keyboard_backlight { uint8_t percent; -} __packed; +}; /* Set target fan PWM duty cycle */ -#define EC_CMD_PWM_SET_FAN_DUTY 0x24 +#define EC_CMD_PWM_SET_FAN_DUTY 0x0024 + +/* Version 0 of input params */ +struct __ec_align4 ec_params_pwm_set_fan_duty_v0 { + uint32_t percent; +}; -struct ec_params_pwm_set_fan_duty { +/* Version 1 of input params */ +struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 { uint32_t percent; -} __packed; + uint8_t fan_idx; +}; + +#define EC_CMD_PWM_SET_DUTY 0x0025 +/* 16 bit duty cycle, 0xffff = 100% */ +#define EC_PWM_MAX_DUTY 0xffff + +enum ec_pwm_type { + /* All types, indexed by board-specific enum pwm_channel */ + EC_PWM_TYPE_GENERIC = 0, + /* Keyboard backlight */ + EC_PWM_TYPE_KB_LIGHT, + /* Display backlight */ + EC_PWM_TYPE_DISPLAY_LIGHT, + EC_PWM_TYPE_COUNT, +}; + +struct __ec_align4 ec_params_pwm_set_duty { + uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ + uint8_t pwm_type; /* ec_pwm_type */ + uint8_t index; /* Type-specific index, or 0 if unique */ +}; + +#define EC_CMD_PWM_GET_DUTY 0x0026 + +struct __ec_align1 ec_params_pwm_get_duty { + uint8_t pwm_type; /* ec_pwm_type */ + uint8_t index; /* Type-specific index, or 0 if unique */ +}; + +struct __ec_align2 ec_response_pwm_get_duty { + uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ +}; /*****************************************************************************/ /* @@ -773,9 +1530,9 @@ struct ec_params_pwm_set_fan_duty { * into a subcommand. We'll make separate structs for subcommands with * different input args, so that we know how much to expect. */ -#define EC_CMD_LIGHTBAR_CMD 0x28 +#define EC_CMD_LIGHTBAR_CMD 0x0028 -struct rgb_s { +struct __ec_todo_unpacked rgb_s { uint8_t r, g, b; }; @@ -783,17 +1540,17 @@ struct rgb_s { /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a * host command, but the alignment is the same regardless. Keep it that way. */ -struct lightbar_params { +struct __ec_todo_packed lightbar_params_v0 { /* Timing */ - int google_ramp_up; - int google_ramp_down; - int s3s0_ramp_up; - int s0_tick_delay[2]; /* AC=0/1 */ - int s0a_tick_delay[2]; /* AC=0/1 */ - int s0s3_ramp_down; - int s3_sleep_for; - int s3_ramp_up; - int s3_ramp_down; + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; /* Oscillation */ uint8_t new_s0; @@ -815,52 +1572,221 @@ struct lightbar_params { /* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */ -} __packed; +}; + +struct __ec_todo_packed lightbar_params_v1 { + /* Timing */ + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; + int32_t tap_tick_delay; + int32_t tap_gate_delay; + int32_t tap_display_time; + + /* Tap-for-battery params */ + uint8_t tap_pct_red; + uint8_t tap_pct_green; + uint8_t tap_seg_min_on; + uint8_t tap_seg_max_on; + uint8_t tap_seg_osc; + uint8_t tap_idx[3]; + + /* Oscillation */ + uint8_t osc_min[2]; /* AC=0/1 */ + uint8_t osc_max[2]; /* AC=0/1 */ + uint8_t w_ofs[2]; /* AC=0/1 */ + + /* Brightness limits based on the backlight and AC. */ + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ + + /* Battery level thresholds */ + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; + + /* Map [AC][battery_level] to color index */ + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + + /* Color palette */ + struct rgb_s color[8]; /* 0-3 are Google colors */ +}; + +/* Lightbar command params v2 + * crbug.com/467716 + * + * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by + * logical groups to make it more manageable ( < 120 bytes). + * + * NOTE: Each of these groups must be less than 120 bytes. + */ + +struct __ec_todo_packed lightbar_params_v2_timing { + /* Timing */ + int32_t google_ramp_up; + int32_t google_ramp_down; + int32_t s3s0_ramp_up; + int32_t s0_tick_delay[2]; /* AC=0/1 */ + int32_t s0a_tick_delay[2]; /* AC=0/1 */ + int32_t s0s3_ramp_down; + int32_t s3_sleep_for; + int32_t s3_ramp_up; + int32_t s3_ramp_down; + int32_t s5_ramp_up; + int32_t s5_ramp_down; + int32_t tap_tick_delay; + int32_t tap_gate_delay; + int32_t tap_display_time; +}; + +struct __ec_todo_packed lightbar_params_v2_tap { + /* Tap-for-battery params */ + uint8_t tap_pct_red; + uint8_t tap_pct_green; + uint8_t tap_seg_min_on; + uint8_t tap_seg_max_on; + uint8_t tap_seg_osc; + uint8_t tap_idx[3]; +}; + +struct __ec_todo_packed lightbar_params_v2_oscillation { + /* Oscillation */ + uint8_t osc_min[2]; /* AC=0/1 */ + uint8_t osc_max[2]; /* AC=0/1 */ + uint8_t w_ofs[2]; /* AC=0/1 */ +}; + +struct __ec_todo_packed lightbar_params_v2_brightness { + /* Brightness limits based on the backlight and AC. */ + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ +}; + +struct __ec_todo_packed lightbar_params_v2_thresholds { + /* Battery level thresholds */ + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; +}; + +struct __ec_todo_packed lightbar_params_v2_colors { + /* Map [AC][battery_level] to color index */ + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ + + /* s5: single color pulse on inhibited power-up */ + uint8_t s5_idx; + + /* Color palette */ + struct rgb_s color[8]; /* 0-3 are Google colors */ +}; + +/* Lightbyte program. */ +#define EC_LB_PROG_LEN 192 +struct __ec_todo_unpacked lightbar_program { + uint8_t size; + uint8_t data[EC_LB_PROG_LEN]; +}; -struct ec_params_lightbar { +struct __ec_todo_packed ec_params_lightbar { uint8_t cmd; /* Command (see enum lightbar_command) */ union { - struct { + struct __ec_todo_unpacked { /* no args */ - } dump, off, on, init, get_seq, get_params; + } dump, off, on, init, get_seq, get_params_v0, get_params_v1, + version, get_brightness, get_demo, suspend, resume, + get_params_v2_timing, get_params_v2_tap, + get_params_v2_osc, get_params_v2_bright, + get_params_v2_thlds, get_params_v2_colors; - struct num { + struct __ec_todo_unpacked { uint8_t num; - } brightness, seq, demo; + } set_brightness, seq, demo; - struct reg { + struct __ec_todo_unpacked { uint8_t ctrl, reg, value; } reg; - struct rgb { + struct __ec_todo_unpacked { uint8_t led, red, green, blue; - } rgb; + } set_rgb; + + struct __ec_todo_unpacked { + uint8_t led; + } get_rgb; + + struct __ec_todo_unpacked { + uint8_t enable; + } manual_suspend_ctrl; + + struct lightbar_params_v0 set_params_v0; + struct lightbar_params_v1 set_params_v1; + + struct lightbar_params_v2_timing set_v2par_timing; + struct lightbar_params_v2_tap set_v2par_tap; + struct lightbar_params_v2_oscillation set_v2par_osc; + struct lightbar_params_v2_brightness set_v2par_bright; + struct lightbar_params_v2_thresholds set_v2par_thlds; + struct lightbar_params_v2_colors set_v2par_colors; - struct lightbar_params set_params; + struct lightbar_program set_program; }; -} __packed; +}; -struct ec_response_lightbar { +struct __ec_todo_packed ec_response_lightbar { union { - struct dump { - struct { + struct __ec_todo_unpacked { + struct __ec_todo_unpacked { uint8_t reg; uint8_t ic0; uint8_t ic1; } vals[23]; } dump; - struct get_seq { + struct __ec_todo_unpacked { uint8_t num; - } get_seq; + } get_seq, get_brightness, get_demo; + + struct lightbar_params_v0 get_params_v0; + struct lightbar_params_v1 get_params_v1; + + + struct lightbar_params_v2_timing get_params_v2_timing; + struct lightbar_params_v2_tap get_params_v2_tap; + struct lightbar_params_v2_oscillation get_params_v2_osc; + struct lightbar_params_v2_brightness get_params_v2_bright; + struct lightbar_params_v2_thresholds get_params_v2_thlds; + struct lightbar_params_v2_colors get_params_v2_colors; + + struct __ec_todo_unpacked { + uint32_t num; + uint32_t flags; + } version; - struct lightbar_params get_params; + struct __ec_todo_unpacked { + uint8_t red, green, blue; + } get_rgb; - struct { + struct __ec_todo_unpacked { /* no return params */ - } off, on, init, brightness, seq, reg, rgb, demo, set_params; + } off, on, init, set_brightness, seq, reg, set_rgb, + demo, set_params_v0, set_params_v1, + set_program, manual_suspend_ctrl, suspend, resume, + set_v2par_timing, set_v2par_tap, + set_v2par_osc, set_v2par_bright, set_v2par_thlds, + set_v2par_colors; }; -} __packed; +}; /* Lightbar commands */ enum lightbar_command { @@ -868,26 +1794,64 @@ enum lightbar_command { LIGHTBAR_CMD_OFF = 1, LIGHTBAR_CMD_ON = 2, LIGHTBAR_CMD_INIT = 3, - LIGHTBAR_CMD_BRIGHTNESS = 4, + LIGHTBAR_CMD_SET_BRIGHTNESS = 4, LIGHTBAR_CMD_SEQ = 5, LIGHTBAR_CMD_REG = 6, - LIGHTBAR_CMD_RGB = 7, + LIGHTBAR_CMD_SET_RGB = 7, LIGHTBAR_CMD_GET_SEQ = 8, LIGHTBAR_CMD_DEMO = 9, - LIGHTBAR_CMD_GET_PARAMS = 10, - LIGHTBAR_CMD_SET_PARAMS = 11, + LIGHTBAR_CMD_GET_PARAMS_V0 = 10, + LIGHTBAR_CMD_SET_PARAMS_V0 = 11, + LIGHTBAR_CMD_VERSION = 12, + LIGHTBAR_CMD_GET_BRIGHTNESS = 13, + LIGHTBAR_CMD_GET_RGB = 14, + LIGHTBAR_CMD_GET_DEMO = 15, + LIGHTBAR_CMD_GET_PARAMS_V1 = 16, + LIGHTBAR_CMD_SET_PARAMS_V1 = 17, + LIGHTBAR_CMD_SET_PROGRAM = 18, + LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, + LIGHTBAR_CMD_SUSPEND = 20, + LIGHTBAR_CMD_RESUME = 21, + LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, + LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, + LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, + LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, + LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, + LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, + LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, + LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, + LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, + LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, + LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, + LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, LIGHTBAR_NUM_CMDS }; /*****************************************************************************/ /* LED control commands */ -#define EC_CMD_LED_CONTROL 0x29 +#define EC_CMD_LED_CONTROL 0x0029 enum ec_led_id { + /* LED to indicate battery state of charge */ EC_LED_ID_BATTERY_LED = 0, - EC_LED_ID_POWER_BUTTON_LED, + /* + * LED to indicate system power state (on or in suspend). + * May be on power button or on C-panel. + */ + EC_LED_ID_POWER_LED, + /* LED on power adapter or its plug */ EC_LED_ID_ADAPTER_LED, + /* LED to indicate left side */ + EC_LED_ID_LEFT_LED, + /* LED to indicate right side */ + EC_LED_ID_RIGHT_LED, + /* LED to indicate recovery mode with HW_REINIT */ + EC_LED_ID_RECOVERY_HW_REINIT_LED, + /* LED to indicate sysrq debug mode. */ + EC_LED_ID_SYSRQ_DEBUG_LED, + + EC_LED_ID_COUNT }; /* LED control flags */ @@ -900,18 +1864,19 @@ enum ec_led_colors { EC_LED_COLOR_BLUE, EC_LED_COLOR_YELLOW, EC_LED_COLOR_WHITE, + EC_LED_COLOR_AMBER, EC_LED_COLOR_COUNT }; -struct ec_params_led_control { +struct __ec_align1 ec_params_led_control { uint8_t led_id; /* Which LED to control */ uint8_t flags; /* Control flags */ uint8_t brightness[EC_LED_COLOR_COUNT]; -} __packed; +}; -struct ec_response_led_control { +struct __ec_align1 ec_response_led_control { /* * Available brightness value range. * @@ -920,7 +1885,7 @@ struct ec_response_led_control { * Other values means the LED is control by PWM. */ uint8_t brightness_range[EC_LED_COLOR_COUNT]; -} __packed; +}; /*****************************************************************************/ /* Verified boot commands */ @@ -931,9 +1896,9 @@ struct ec_response_led_control { */ /* Verified boot hash command */ -#define EC_CMD_VBOOT_HASH 0x2A +#define EC_CMD_VBOOT_HASH 0x002A -struct ec_params_vboot_hash { +struct __ec_align4 ec_params_vboot_hash { uint8_t cmd; /* enum ec_vboot_hash_cmd */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t nonce_size; /* Nonce size; may be 0 */ @@ -941,9 +1906,9 @@ struct ec_params_vboot_hash { uint32_t offset; /* Offset in flash to hash */ uint32_t size; /* Number of bytes to hash */ uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ -} __packed; +}; -struct ec_response_vboot_hash { +struct __ec_align4 ec_response_vboot_hash { uint8_t status; /* enum ec_vboot_hash_status */ uint8_t hash_type; /* enum ec_vboot_hash_type */ uint8_t digest_size; /* Size of hash digest in bytes */ @@ -951,7 +1916,7 @@ struct ec_response_vboot_hash { uint32_t offset; /* Offset in flash which was hashed */ uint32_t size; /* Number of bytes hashed */ uint8_t hash_digest[64]; /* Hash digest data */ -} __packed; +}; enum ec_vboot_hash_cmd { EC_VBOOT_HASH_GET = 0, /* Get current hash status */ @@ -975,19 +1940,515 @@ enum ec_vboot_hash_status { * If one of these is specified, the EC will automatically update offset and * size to the correct values for the specified image (RO or RW). */ -#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe -#define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe +#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd +#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc + +/*****************************************************************************/ +/* + * Motion sense commands. We'll make separate structs for sub-commands with + * different input args, so that we know how much to expect. + */ +#define EC_CMD_MOTION_SENSE_CMD 0x002B + +/* Motion sense commands */ +enum motionsense_command { + /* + * Dump command returns all motion sensor data including motion sense + * module flags and individual sensor flags. + */ + MOTIONSENSE_CMD_DUMP = 0, + + /* + * Info command returns data describing the details of a given sensor, + * including enum motionsensor_type, enum motionsensor_location, and + * enum motionsensor_chip. + */ + MOTIONSENSE_CMD_INFO = 1, + + /* + * EC Rate command is a setter/getter command for the EC sampling rate + * in milliseconds. + * It is per sensor, the EC run sample task at the minimum of all + * sensors EC_RATE. + * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR + * to collect all the sensor samples. + * For sensor with hardware FIFO, EC_RATE is used as the maximal delay + * to process of all motion sensors in milliseconds. + */ + MOTIONSENSE_CMD_EC_RATE = 2, + + /* + * Sensor ODR command is a setter/getter command for the output data + * rate of a specific motion sensor in millihertz. + */ + MOTIONSENSE_CMD_SENSOR_ODR = 3, + + /* + * Sensor range command is a setter/getter command for the range of + * a specified motion sensor in +/-G's or +/- deg/s. + */ + MOTIONSENSE_CMD_SENSOR_RANGE = 4, + + /* + * Setter/getter command for the keyboard wake angle. When the lid + * angle is greater than this value, keyboard wake is disabled in S3, + * and when the lid angle goes less than this value, keyboard wake is + * enabled. Note, the lid angle measurement is an approximate, + * un-calibrated value, hence the wake angle isn't exact. + */ + MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, + + /* + * Returns a single sensor data. + */ + MOTIONSENSE_CMD_DATA = 6, + + /* + * Return sensor fifo info. + */ + MOTIONSENSE_CMD_FIFO_INFO = 7, + + /* + * Insert a flush element in the fifo and return sensor fifo info. + * The host can use that element to synchronize its operation. + */ + MOTIONSENSE_CMD_FIFO_FLUSH = 8, + + /* + * Return a portion of the fifo. + */ + MOTIONSENSE_CMD_FIFO_READ = 9, + + /* + * Perform low level calibration. + * On sensors that support it, ask to do offset calibration. + */ + MOTIONSENSE_CMD_PERFORM_CALIB = 10, + + /* + * Sensor Offset command is a setter/getter command for the offset + * used for calibration. + * The offsets can be calculated by the host, or via + * PERFORM_CALIB command. + */ + MOTIONSENSE_CMD_SENSOR_OFFSET = 11, + + /* + * List available activities for a MOTION sensor. + * Indicates if they are enabled or disabled. + */ + MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, + + /* + * Activity management + * Enable/Disable activity recognition. + */ + MOTIONSENSE_CMD_SET_ACTIVITY = 13, + + /* + * Lid Angle + */ + MOTIONSENSE_CMD_LID_ANGLE = 14, + + /* + * Allow the FIFO to trigger interrupt via MKBP events. + * By default the FIFO does not send interrupt to process the FIFO + * until the AP is ready or it is coming from a wakeup sensor. + */ + MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, + + /* + * Spoof the readings of the sensors. The spoofed readings can be set + * to arbitrary values, or will lock to the last read actual values. + */ + MOTIONSENSE_CMD_SPOOF = 16, + + /* Number of motionsense sub-commands. */ + MOTIONSENSE_NUM_CMDS +}; + +/* List of motion sensor types. */ +enum motionsensor_type { + MOTIONSENSE_TYPE_ACCEL = 0, + MOTIONSENSE_TYPE_GYRO = 1, + MOTIONSENSE_TYPE_MAG = 2, + MOTIONSENSE_TYPE_PROX = 3, + MOTIONSENSE_TYPE_LIGHT = 4, + MOTIONSENSE_TYPE_ACTIVITY = 5, + MOTIONSENSE_TYPE_BARO = 6, + MOTIONSENSE_TYPE_MAX, +}; + +/* List of motion sensor locations. */ +enum motionsensor_location { + MOTIONSENSE_LOC_BASE = 0, + MOTIONSENSE_LOC_LID = 1, + MOTIONSENSE_LOC_MAX, +}; + +/* List of motion sensor chips. */ +enum motionsensor_chip { + MOTIONSENSE_CHIP_KXCJ9 = 0, + MOTIONSENSE_CHIP_LSM6DS0 = 1, + MOTIONSENSE_CHIP_BMI160 = 2, + MOTIONSENSE_CHIP_SI1141 = 3, + MOTIONSENSE_CHIP_SI1142 = 4, + MOTIONSENSE_CHIP_SI1143 = 5, + MOTIONSENSE_CHIP_KX022 = 6, + MOTIONSENSE_CHIP_L3GD20H = 7, + MOTIONSENSE_CHIP_BMA255 = 8, + MOTIONSENSE_CHIP_BMP280 = 9, + MOTIONSENSE_CHIP_OPT3001 = 10, +}; + +struct __ec_todo_packed ec_response_motion_sensor_data { + /* Flags for each sensor. */ + uint8_t flags; + /* sensor number the data comes from */ + uint8_t sensor_num; + /* Each sensor is up to 3-axis. */ + union { + int16_t data[3]; + struct __ec_todo_packed { + uint16_t reserved; + uint32_t timestamp; + }; + struct __ec_todo_unpacked { + uint8_t activity; /* motionsensor_activity */ + uint8_t state; + int16_t add_info[2]; + }; + }; +}; + +/* Note: used in ec_response_get_next_data */ +struct __ec_todo_packed ec_response_motion_sense_fifo_info { + /* Size of the fifo */ + uint16_t size; + /* Amount of space used in the fifo */ + uint16_t count; + /* Timestamp recorded in us */ + uint32_t timestamp; + /* Total amount of vector lost */ + uint16_t total_lost; + /* Lost events since the last fifo_info, per sensors */ + uint16_t lost[0]; +}; + +struct __ec_todo_packed ec_response_motion_sense_fifo_data { + uint32_t number_data; + struct ec_response_motion_sensor_data data[0]; +}; + +/* List supported activity recognition */ +enum motionsensor_activity { + MOTIONSENSE_ACTIVITY_RESERVED = 0, + MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, + MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, +}; + +struct __ec_todo_unpacked ec_motion_sense_activity { + uint8_t sensor_num; + uint8_t activity; /* one of enum motionsensor_activity */ + uint8_t enable; /* 1: enable, 0: disable */ + uint8_t reserved; + uint16_t parameters[3]; /* activity dependent parameters */ +}; + +/* Module flag masks used for the dump sub-command. */ +#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) + +/* Sensor flag masks used for the dump sub-command. */ +#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) + +/* + * Flush entry for synchronization. + * data contains time stamp + */ +#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0) +#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1) +#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2) +#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3) + +/* + * Send this value for the data element to only perform a read. If you + * send any other value, the EC will interpret it as data to set and will + * return the actual value set. + */ +#define EC_MOTION_SENSE_NO_VALUE -1 + +#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 + +/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ +/* Set Calibration information */ +#define MOTION_SENSE_SET_OFFSET 1 + +#define LID_ANGLE_UNRELIABLE 500 + +enum motionsense_spoof_mode { + /* Disable spoof mode. */ + MOTIONSENSE_SPOOF_MODE_DISABLE = 0, + + /* Enable spoof mode, but use provided component values. */ + MOTIONSENSE_SPOOF_MODE_CUSTOM, + + /* Enable spoof mode, but use the current sensor values. */ + MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, + + /* Query the current spoof mode status for the sensor. */ + MOTIONSENSE_SPOOF_MODE_QUERY, +}; + +struct __ec_todo_packed ec_params_motion_sense { + uint8_t cmd; + union { + /* Used for MOTIONSENSE_CMD_DUMP */ + struct __ec_todo_unpacked { + /* + * Maximal number of sensor the host is expecting. + * 0 means the host is only interested in the number + * of sensors controlled by the EC. + */ + uint8_t max_sensor_count; + } dump; + + /* + * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. + */ + struct __ec_todo_unpacked { + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. + * kb_wake_angle: angle to wakup AP. + */ + int16_t data; + } kb_wake_angle; + + /* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA + * and MOTIONSENSE_CMD_PERFORM_CALIB. */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + } info, info_3, data, fifo_flush, perform_calib, + list_activities; + + /* + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR + * and MOTIONSENSE_CMD_SENSOR_RANGE. + */ + struct __ec_todo_unpacked { + uint8_t sensor_num; + + /* Rounding flag, true for round-up, false for down. */ + uint8_t roundup; + + uint16_t reserved; + + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ + int32_t data; + } ec_rate, sensor_odr, sensor_range; + + /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ + struct __ec_todo_packed { + uint8_t sensor_num; + + /* + * bit 0: If set (MOTION_SENSE_SET_OFFSET), set + * the calibration information in the EC. + * If unset, just retrieve calibration information. + */ + uint16_t flags; + + /* + * Temperature at calibration, in units of 0.01 C + * 0x8000: invalid / unknown. + * 0x0: 0C + * 0x7fff: +327.67C + */ + int16_t temp; + + /* + * Offset for calibration. + * Unit: + * Accelerometer: 1/1024 g + * Gyro: 1/1024 deg/s + * Compass: 1/16 uT + */ + int16_t offset[3]; + } sensor_offset; + + /* Used for MOTIONSENSE_CMD_FIFO_INFO */ + struct __ec_todo_unpacked { + } fifo_info; + + /* Used for MOTIONSENSE_CMD_FIFO_READ */ + struct __ec_todo_unpacked { + /* + * Number of expected vector to return. + * EC may return less or 0 if none available. + */ + uint32_t max_data_vector; + } fifo_read; + + struct ec_motion_sense_activity set_activity; + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + struct __ec_todo_unpacked { + } lid_angle; + + /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ + struct __ec_todo_unpacked { + /* + * 1: enable, 0 disable fifo, + * EC_MOTION_SENSE_NO_VALUE return value. + */ + int8_t enable; + } fifo_int_enable; + + /* Used for MOTIONSENSE_CMD_SPOOF */ + struct __ec_todo_packed { + uint8_t sensor_id; + + /* See enum motionsense_spoof_mode. */ + uint8_t spoof_enable; + + /* Ignored, used for alignment. */ + uint8_t reserved; + + /* Individual component values to spoof. */ + int16_t components[3]; + } spoof; + }; +}; + +struct __ec_todo_packed ec_response_motion_sense { + union { + /* Used for MOTIONSENSE_CMD_DUMP */ + struct __ec_todo_unpacked { + /* Flags representing the motion sensor module. */ + uint8_t module_flags; + + /* Number of sensors managed directly by the EC */ + uint8_t sensor_count; + + /* + * sensor data is truncated if response_max is too small + * for holding all the data. + */ + struct ec_response_motion_sensor_data sensor[0]; + } dump; + + /* Used for MOTIONSENSE_CMD_INFO. */ + struct __ec_todo_unpacked { + /* Should be element of enum motionsensor_type. */ + uint8_t type; + + /* Should be element of enum motionsensor_location. */ + uint8_t location; + + /* Should be element of enum motionsensor_chip. */ + uint8_t chip; + } info; + + /* Used for MOTIONSENSE_CMD_INFO version 3 */ + struct __ec_todo_unpacked { + /* Should be element of enum motionsensor_type. */ + uint8_t type; + + /* Should be element of enum motionsensor_location. */ + uint8_t location; + + /* Should be element of enum motionsensor_chip. */ + uint8_t chip; + + /* Minimum sensor sampling frequency */ + uint32_t min_frequency; + + /* Maximum sensor sampling frequency */ + uint32_t max_frequency; + + /* Max number of sensor events that could be in fifo */ + uint32_t fifo_max_event_count; + } info_3; + + /* Used for MOTIONSENSE_CMD_DATA */ + struct ec_response_motion_sensor_data data; + + /* + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, + * MOTIONSENSE_CMD_SENSOR_RANGE, + * MOTIONSENSE_CMD_KB_WAKE_ANGLE, + * MOTIONSENSE_CMD_FIFO_INT_ENABLE and + * MOTIONSENSE_CMD_SPOOF. + */ + struct __ec_todo_unpacked { + /* Current value of the parameter queried. */ + int32_t ret; + } ec_rate, sensor_odr, sensor_range, kb_wake_angle, + fifo_int_enable, spoof; + + /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ + struct __ec_todo_unpacked { + int16_t temp; + int16_t offset[3]; + } sensor_offset, perform_calib; + + struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; + + struct ec_response_motion_sense_fifo_data fifo_read; + + struct __ec_todo_packed { + uint16_t reserved; + uint32_t enabled; + uint32_t disabled; + } list_activities; + + struct __ec_todo_unpacked { + } set_activity; + + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ + struct __ec_todo_unpacked { + /* + * Angle between 0 and 360 degree if available, + * LID_ANGLE_UNRELIABLE otherwise. + */ + uint16_t value; + } lid_angle; + }; +}; + +/*****************************************************************************/ +/* Force lid open command */ + +/* Make lid event always open */ +#define EC_CMD_FORCE_LID_OPEN 0x002C + +struct __ec_align1 ec_params_force_lid_open { + uint8_t enabled; +}; + +/*****************************************************************************/ +/* Configure the behavior of the power button */ +#define EC_CMD_CONFIG_POWER_BUTTON 0x002D + +enum ec_config_power_button_flags { + /* Enable/Disable power button pulses for x86 devices */ + EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0), +}; + +struct __ec_align1 ec_params_config_power_button { + /* See enum ec_config_power_button_flags */ + uint8_t flags; +}; /*****************************************************************************/ /* USB charging control commands */ /* Set USB port charging mode */ -#define EC_CMD_USB_CHARGE_SET_MODE 0x30 +#define EC_CMD_USB_CHARGE_SET_MODE 0x0030 -struct ec_params_usb_charge_set_mode { +struct __ec_align1 ec_params_usb_charge_set_mode { uint8_t usb_port_id; uint8_t mode; -} __packed; +}; /*****************************************************************************/ /* Persistent storage for host */ @@ -996,118 +2457,285 @@ struct ec_params_usb_charge_set_mode { #define EC_PSTORE_SIZE_MAX 64 /* Get persistent storage info */ -#define EC_CMD_PSTORE_INFO 0x40 +#define EC_CMD_PSTORE_INFO 0x0040 -struct ec_response_pstore_info { +struct __ec_align4 ec_response_pstore_info { /* Persistent storage size, in bytes */ uint32_t pstore_size; /* Access size; read/write offset and size must be a multiple of this */ uint32_t access_size; -} __packed; +}; /* * Read persistent storage * * Response is params.size bytes of data. */ -#define EC_CMD_PSTORE_READ 0x41 +#define EC_CMD_PSTORE_READ 0x0041 -struct ec_params_pstore_read { +struct __ec_align4 ec_params_pstore_read { uint32_t offset; /* Byte offset to read */ uint32_t size; /* Size to read in bytes */ -} __packed; +}; /* Write persistent storage */ -#define EC_CMD_PSTORE_WRITE 0x42 +#define EC_CMD_PSTORE_WRITE 0x0042 -struct ec_params_pstore_write { +struct __ec_align4 ec_params_pstore_write { uint32_t offset; /* Byte offset to write */ uint32_t size; /* Size to write in bytes */ uint8_t data[EC_PSTORE_SIZE_MAX]; -} __packed; +}; /*****************************************************************************/ /* Real-time clock */ /* RTC params and response structures */ -struct ec_params_rtc { +struct __ec_align4 ec_params_rtc { uint32_t time; -} __packed; +}; -struct ec_response_rtc { +struct __ec_align4 ec_response_rtc { uint32_t time; -} __packed; +}; /* These use ec_response_rtc */ -#define EC_CMD_RTC_GET_VALUE 0x44 -#define EC_CMD_RTC_GET_ALARM 0x45 +#define EC_CMD_RTC_GET_VALUE 0x0044 +#define EC_CMD_RTC_GET_ALARM 0x0045 /* These all use ec_params_rtc */ -#define EC_CMD_RTC_SET_VALUE 0x46 -#define EC_CMD_RTC_SET_ALARM 0x47 +#define EC_CMD_RTC_SET_VALUE 0x0046 +#define EC_CMD_RTC_SET_ALARM 0x0047 + +/* Pass as time param to SET_ALARM to clear the current alarm */ +#define EC_RTC_ALARM_CLEAR 0 /*****************************************************************************/ /* Port80 log access */ +/* Maximum entries that can be read/written in a single command */ +#define EC_PORT80_SIZE_MAX 32 + /* Get last port80 code from previous boot */ -#define EC_CMD_PORT80_LAST_BOOT 0x48 +#define EC_CMD_PORT80_LAST_BOOT 0x0048 +#define EC_CMD_PORT80_READ 0x0048 + +enum ec_port80_subcmd { + EC_PORT80_GET_INFO = 0, + EC_PORT80_READ_BUFFER, +}; + +struct __ec_todo_packed ec_params_port80_read { + uint16_t subcmd; + union { + struct __ec_todo_unpacked { + uint32_t offset; + uint32_t num_entries; + } read_buffer; + }; +}; -struct ec_response_port80_last_boot { +struct __ec_todo_packed ec_response_port80_read { + union { + struct __ec_todo_unpacked { + uint32_t writes; + uint32_t history_size; + uint32_t last_boot; + } get_info; + struct __ec_todo_unpacked { + uint16_t codes[EC_PORT80_SIZE_MAX]; + } data; + }; +}; + +struct __ec_align2 ec_response_port80_last_boot { uint16_t code; -} __packed; +}; /*****************************************************************************/ -/* Thermal engine commands */ +/* Temporary secure storage for host verified boot use */ + +/* Number of bytes in a vstore slot */ +#define EC_VSTORE_SLOT_SIZE 64 + +/* Maximum number of vstore slots */ +#define EC_VSTORE_SLOT_MAX 32 + +/* Get persistent storage info */ +#define EC_CMD_VSTORE_INFO 0x0049 +struct __ec_align_size1 ec_response_vstore_info { + /* Indicates which slots are locked */ + uint32_t slot_locked; + /* Total number of slots available */ + uint8_t slot_count; +}; + +/* + * Read temporary secure storage + * + * Response is EC_VSTORE_SLOT_SIZE bytes of data. + */ +#define EC_CMD_VSTORE_READ 0x004A + +struct __ec_align1 ec_params_vstore_read { + uint8_t slot; /* Slot to read from */ +}; + +struct __ec_align1 ec_response_vstore_read { + uint8_t data[EC_VSTORE_SLOT_SIZE]; +}; + +/* + * Write temporary secure storage and lock it. + */ +#define EC_CMD_VSTORE_WRITE 0x004B + +struct __ec_align1 ec_params_vstore_write { + uint8_t slot; /* Slot to write to */ + uint8_t data[EC_VSTORE_SLOT_SIZE]; +}; + +/*****************************************************************************/ +/* Thermal engine commands. Note that there are two implementations. We'll + * reuse the command number, but the data and behavior is incompatible. + * Version 0 is what originally shipped on Link. + * Version 1 separates the CPU thermal limits from the fan control. + */ + +#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 +#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 -/* Set thershold value */ -#define EC_CMD_THERMAL_SET_THRESHOLD 0x50 +/* The version 0 structs are opaque. You have to know what they are for + * the get/set commands to make any sense. + */ -struct ec_params_thermal_set_threshold { +/* Version 0 - set */ +struct __ec_align2 ec_params_thermal_set_threshold { uint8_t sensor_type; uint8_t threshold_id; uint16_t value; -} __packed; - -/* Get threshold value */ -#define EC_CMD_THERMAL_GET_THRESHOLD 0x51 +}; -struct ec_params_thermal_get_threshold { +/* Version 0 - get */ +struct __ec_align1 ec_params_thermal_get_threshold { uint8_t sensor_type; uint8_t threshold_id; -} __packed; +}; -struct ec_response_thermal_get_threshold { +struct __ec_align2 ec_response_thermal_get_threshold { uint16_t value; -} __packed; +}; + + +/* The version 1 structs are visible. */ +enum ec_temp_thresholds { + EC_TEMP_THRESH_WARN = 0, + EC_TEMP_THRESH_HIGH, + EC_TEMP_THRESH_HALT, + + EC_TEMP_THRESH_COUNT +}; + +/* + * Thermal configuration for one temperature sensor. Temps are in degrees K. + * Zero values will be silently ignored by the thermal task. + * + * Note that this structure is a sub-structure of + * ec_params_thermal_set_threshold_v1, but maintains its alignment there. + */ +struct __ec_align4 ec_thermal_config { + uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ + uint32_t temp_fan_off; /* no active cooling needed */ + uint32_t temp_fan_max; /* max active cooling needed */ +}; + +/* Version 1 - get config for one sensor. */ +struct __ec_align4 ec_params_thermal_get_threshold_v1 { + uint32_t sensor_num; +}; +/* This returns a struct ec_thermal_config */ + +/* Version 1 - set config for one sensor. + * Use read-modify-write for best results! */ +struct __ec_align4 ec_params_thermal_set_threshold_v1 { + uint32_t sensor_num; + struct ec_thermal_config cfg; +}; +/* This returns no data */ + +/****************************************************************************/ /* Toggle automatic fan control */ -#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 +#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 -/* Get TMP006 calibration data */ -#define EC_CMD_TMP006_GET_CALIBRATION 0x53 +/* Version 1 of input params */ +struct __ec_align1 ec_params_auto_fan_ctrl_v1 { + uint8_t fan_idx; +}; + +/* Get/Set TMP006 calibration data */ +#define EC_CMD_TMP006_GET_CALIBRATION 0x0053 +#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 + +/* + * The original TMP006 calibration only needed four params, but now we need + * more. Since the algorithm is nothing but magic numbers anyway, we'll leave + * the params opaque. The v1 "get" response will include the algorithm number + * and how many params it requires. That way we can change the EC code without + * needing to update this file. We can also use a different algorithm on each + * sensor. + */ -struct ec_params_tmp006_get_calibration { +/* This is the same struct for both v0 and v1. */ +struct __ec_align1 ec_params_tmp006_get_calibration { uint8_t index; -} __packed; +}; -struct ec_response_tmp006_get_calibration { +/* Version 0 */ +struct __ec_align4 ec_response_tmp006_get_calibration_v0 { float s0; float b0; float b1; float b2; -} __packed; - -/* Set TMP006 calibration data */ -#define EC_CMD_TMP006_SET_CALIBRATION 0x54 +}; -struct ec_params_tmp006_set_calibration { +struct __ec_align4 ec_params_tmp006_set_calibration_v0 { uint8_t index; - uint8_t reserved[3]; /* Reserved; set 0 */ + uint8_t reserved[3]; float s0; float b0; float b1; float b2; -} __packed; +}; + +/* Version 1 */ +struct __ec_align4 ec_response_tmp006_get_calibration_v1 { + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved[2]; + float val[0]; +}; + +struct __ec_align4 ec_params_tmp006_set_calibration_v1 { + uint8_t index; + uint8_t algorithm; + uint8_t num_params; + uint8_t reserved; + float val[0]; +}; + + +/* Read raw TMP006 data */ +#define EC_CMD_TMP006_GET_RAW 0x0055 + +struct __ec_align1 ec_params_tmp006_get_raw { + uint8_t index; +}; + +struct __ec_align4 ec_response_tmp006_get_raw { + int32_t t; /* In 1/100 K */ + int32_t v; /* In nV */ +}; /*****************************************************************************/ /* MKBP - Matrix KeyBoard Protocol */ @@ -1117,30 +2745,81 @@ struct ec_params_tmp006_set_calibration { * * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for * expected response size. + * + * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish + * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type + * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. */ -#define EC_CMD_MKBP_STATE 0x60 +#define EC_CMD_MKBP_STATE 0x0060 -/* Provide information about the matrix : number of rows and columns */ -#define EC_CMD_MKBP_INFO 0x61 +/* + * Provide information about various MKBP things. See enum ec_mkbp_info_type. + */ +#define EC_CMD_MKBP_INFO 0x0061 -struct ec_response_mkbp_info { +struct __ec_align_size1 ec_response_mkbp_info { uint32_t rows; uint32_t cols; - uint8_t switches; -} __packed; + /* Formerly "switches", which was 0. */ + uint8_t reserved; +}; + +struct __ec_align1 ec_params_mkbp_info { + uint8_t info_type; + uint8_t event_type; +}; + +enum ec_mkbp_info_type { + /* + * Info about the keyboard matrix: number of rows and columns. + * + * Returns struct ec_response_mkbp_info. + */ + EC_MKBP_INFO_KBD = 0, + + /* + * For buttons and switches, info about which specifically are + * supported. event_type must be set to one of the values in enum + * ec_mkbp_event. + * + * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte + * bitmask indicating which buttons or switches are present. See the + * bit inidices below. + */ + EC_MKBP_INFO_SUPPORTED = 1, + + /* + * Instantaneous state of buttons and switches. + * + * event_type must be set to one of the values in enum ec_mkbp_event. + * + * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] + * indicating the current state of the keyboard matrix. + * + * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw + * event state. + * + * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the + * state of supported buttons. + * + * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the + * state of supported switches. + */ + EC_MKBP_INFO_CURRENT = 2, +}; /* Simulate key press */ -#define EC_CMD_MKBP_SIMULATE_KEY 0x62 +#define EC_CMD_MKBP_SIMULATE_KEY 0x0062 -struct ec_params_mkbp_simulate_key { +struct __ec_align1 ec_params_mkbp_simulate_key { uint8_t col; uint8_t row; uint8_t pressed; -} __packed; +}; /* Configure keyboard scanning */ -#define EC_CMD_MKBP_SET_CONFIG 0x64 -#define EC_CMD_MKBP_GET_CONFIG 0x65 +#define EC_CMD_MKBP_SET_CONFIG 0x0064 +#define EC_CMD_MKBP_GET_CONFIG 0x0065 /* flags */ enum mkbp_config_flags { @@ -1157,8 +2836,13 @@ enum mkbp_config_valid { EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, }; -/* Configuration for our key scanning algorithm */ -struct ec_mkbp_config { +/* + * Configuration for our key scanning algorithm. + * + * Note that this is used as a sub-structure of + * ec_{params/response}_mkbp_get_config. + */ +struct __ec_align_size1 ec_mkbp_config { uint32_t valid_mask; /* valid fields */ uint8_t flags; /* some flags (enum mkbp_config_flags) */ uint8_t valid_flags; /* which flags are valid */ @@ -1177,18 +2861,18 @@ struct ec_mkbp_config { uint16_t debounce_up_us; /* time for debounce on key up */ /* maximum depth to allow for fifo (0 = no keyscan output) */ uint8_t fifo_max_depth; -} __packed; +}; -struct ec_params_mkbp_set_config { +struct __ec_align_size1 ec_params_mkbp_set_config { struct ec_mkbp_config config; -} __packed; +}; -struct ec_response_mkbp_get_config { +struct __ec_align_size1 ec_response_mkbp_get_config { struct ec_mkbp_config config; -} __packed; +}; /* Run the key scan emulation */ -#define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 +#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 enum ec_keyscan_seq_cmd { EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ @@ -1206,20 +2890,20 @@ enum ec_collect_flags { EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, }; -struct ec_collect_item { +struct __ec_align1 ec_collect_item { uint8_t flags; /* some flags (enum ec_collect_flags) */ }; -struct ec_params_keyscan_seq_ctrl { +struct __ec_todo_packed ec_params_keyscan_seq_ctrl { uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ union { - struct { + struct __ec_align1 { uint8_t active; /* still active */ uint8_t num_items; /* number of items */ /* Current item being presented */ uint8_t cur_item; } status; - struct { + struct __ec_todo_unpacked { /* * Absolute time for this scan, measured from the * start of the sequence. @@ -1227,37 +2911,124 @@ struct ec_params_keyscan_seq_ctrl { uint32_t time_us; uint8_t scan[0]; /* keyscan data */ } add; - struct { + struct __ec_align1 { uint8_t start_item; /* First item to return */ uint8_t num_items; /* Number of items to return */ } collect; }; -} __packed; +}; -struct ec_result_keyscan_seq_ctrl { +struct __ec_todo_packed ec_result_keyscan_seq_ctrl { union { - struct { + struct __ec_todo_unpacked { uint8_t num_items; /* Number of items */ /* Data for each item */ struct ec_collect_item item[0]; } collect; }; -} __packed; +}; + +/* + * Get the next pending MKBP event. + * + * Returns EC_RES_UNAVAILABLE if there is no event pending. + */ +#define EC_CMD_GET_NEXT_EVENT 0x0067 + +enum ec_mkbp_event { + /* Keyboard matrix changed. The event data is the new matrix state. */ + EC_MKBP_EVENT_KEY_MATRIX = 0, + + /* New host event. The event data is 4 bytes of host event flags. */ + EC_MKBP_EVENT_HOST_EVENT = 1, + + /* New Sensor FIFO data. The event data is fifo_info structure. */ + EC_MKBP_EVENT_SENSOR_FIFO = 2, + + /* The state of the non-matrixed buttons have changed. */ + EC_MKBP_EVENT_BUTTON = 3, + + /* The state of the switches have changed. */ + EC_MKBP_EVENT_SWITCH = 4, + + /* New Fingerprint sensor event, the event data is fp_events bitmap. */ + EC_MKBP_EVENT_FINGERPRINT = 5, + + /* + * Sysrq event: send emulated sysrq. The event data is sysrq, + * corresponding to the key to be pressed. + */ + EC_MKBP_EVENT_SYSRQ = 6, + + /* Number of MKBP events */ + EC_MKBP_EVENT_COUNT, +}; + +union __ec_align_offset1 ec_response_get_next_data { + uint8_t key_matrix[13]; + + /* Unaligned */ + uint32_t host_event; + + struct __ec_todo_unpacked { + /* For aligning the fifo_info */ + uint8_t reserved[3]; + struct ec_response_motion_sense_fifo_info info; + } sensor_fifo; + + uint32_t buttons; + + uint32_t switches; + + uint32_t fp_events; + + uint32_t sysrq; +}; + +struct __ec_align1 ec_response_get_next_event { + uint8_t event_type; + /* Followed by event data if any */ + union ec_response_get_next_data data; +}; + +/* Bit indices for buttons and switches.*/ +/* Buttons */ +#define EC_MKBP_POWER_BUTTON 0 +#define EC_MKBP_VOL_UP 1 +#define EC_MKBP_VOL_DOWN 2 +#define EC_MKBP_RECOVERY 3 + +/* Switches */ +#define EC_MKBP_LID_OPEN 0 +#define EC_MKBP_TABLET_MODE 1 + +/* Run keyboard factory test scanning */ +#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 + +struct __ec_align2 ec_response_keyboard_factory_test { + uint16_t shorted; /* Keyboard pins are shorted */ +}; + +/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ +#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) +#define EC_MKBP_FP_FINGER_DOWN (1 << 29) +#define EC_MKBP_FP_FINGER_UP (1 << 30) +#define EC_MKBP_FP_IMAGE_READY (1 << 31) /*****************************************************************************/ /* Temperature sensor commands */ /* Read temperature sensor info */ -#define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 +#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 -struct ec_params_temp_sensor_get_info { +struct __ec_align1 ec_params_temp_sensor_get_info { uint8_t id; -} __packed; +}; -struct ec_response_temp_sensor_get_info { +struct __ec_align1 ec_response_temp_sensor_get_info { char sensor_name[32]; uint8_t sensor_type; -} __packed; +}; /*****************************************************************************/ @@ -1270,129 +3041,314 @@ struct ec_response_temp_sensor_get_info { /*****************************************************************************/ /* Host event commands */ + +/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */ /* * Host event mask params and response structures, shared by all of the host * event commands below. */ -struct ec_params_host_event_mask { +struct __ec_align4 ec_params_host_event_mask { uint32_t mask; -} __packed; +}; -struct ec_response_host_event_mask { +struct __ec_align4 ec_response_host_event_mask { uint32_t mask; -} __packed; +}; /* These all use ec_response_host_event_mask */ -#define EC_CMD_HOST_EVENT_GET_B 0x87 -#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 -#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 -#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d +#define EC_CMD_HOST_EVENT_GET_B 0x0087 +#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 +#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 +#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D /* These all use ec_params_host_event_mask */ -#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a -#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b -#define EC_CMD_HOST_EVENT_CLEAR 0x8c -#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e -#define EC_CMD_HOST_EVENT_CLEAR_B 0x8f +#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A +#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B +#define EC_CMD_HOST_EVENT_CLEAR 0x008C +#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E +#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F + +/* + * Unified host event programming interface - Should be used by newer versions + * of BIOS/OS to program host events and masks + */ + +struct __ec_align4 ec_params_host_event { + + /* Action requested by host - one of enum ec_host_event_action. */ + uint8_t action; + + /* + * Mask type that the host requested the action on - one of + * enum ec_host_event_mask_type. + */ + uint8_t mask_type; + + /* Set to 0, ignore on read */ + uint16_t reserved; + + /* Value to be used in case of set operations. */ + uint64_t value; +}; + +/* + * Response structure returned by EC_CMD_HOST_EVENT. + * Update the value on a GET request. Set to 0 on GET/CLEAR + */ + +struct __ec_align4 ec_response_host_event { + + /* Mask value in case of get operation */ + uint64_t value; +}; + +enum ec_host_event_action { + /* + * params.value is ignored. Value of mask_type populated + * in response.value + */ + EC_HOST_EVENT_GET, + + /* Bits in params.value are set */ + EC_HOST_EVENT_SET, + + /* Bits in params.value are cleared */ + EC_HOST_EVENT_CLEAR, +}; + +enum ec_host_event_mask_type { + + /* Main host event copy */ + EC_HOST_EVENT_MAIN, + + /* Copy B of host events */ + EC_HOST_EVENT_B, + + /* SCI Mask */ + EC_HOST_EVENT_SCI_MASK, + + /* SMI Mask */ + EC_HOST_EVENT_SMI_MASK, + + /* Mask of events that should be always reported in hostevents */ + EC_HOST_EVENT_ALWAYS_REPORT_MASK, + + /* Active wake mask */ + EC_HOST_EVENT_ACTIVE_WAKE_MASK, + + /* Lazy wake mask for S0ix */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, + + /* Lazy wake mask for S3 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S3, + + /* Lazy wake mask for S5 */ + EC_HOST_EVENT_LAZY_WAKE_MASK_S5, +}; + +#define EC_CMD_HOST_EVENT 0x00A4 /*****************************************************************************/ /* Switch commands */ /* Enable/disable LCD backlight */ -#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 +#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 -struct ec_params_switch_enable_backlight { +struct __ec_align1 ec_params_switch_enable_backlight { uint8_t enabled; -} __packed; +}; /* Enable/disable WLAN/Bluetooth */ -#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 +#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 +#define EC_VER_SWITCH_ENABLE_WIRELESS 1 -struct ec_params_switch_enable_wireless { +/* Version 0 params; no response */ +struct __ec_align1 ec_params_switch_enable_wireless_v0 { uint8_t enabled; -} __packed; +}; + +/* Version 1 params */ +struct __ec_align1 ec_params_switch_enable_wireless_v1 { + /* Flags to enable now */ + uint8_t now_flags; + + /* Which flags to copy from now_flags */ + uint8_t now_mask; + + /* + * Flags to leave enabled in S3, if they're on at the S0->S3 + * transition. (Other flags will be disabled by the S0->S3 + * transition.) + */ + uint8_t suspend_flags; + + /* Which flags to copy from suspend_flags */ + uint8_t suspend_mask; +}; + +/* Version 1 response */ +struct __ec_align1 ec_response_switch_enable_wireless_v1 { + /* Flags to enable now */ + uint8_t now_flags; + + /* Flags to leave enabled in S3 */ + uint8_t suspend_flags; +}; /*****************************************************************************/ /* GPIO commands. Only available on EC if write protect has been disabled. */ /* Set GPIO output value */ -#define EC_CMD_GPIO_SET 0x92 +#define EC_CMD_GPIO_SET 0x0092 -struct ec_params_gpio_set { +struct __ec_align1 ec_params_gpio_set { char name[32]; uint8_t val; -} __packed; +}; /* Get GPIO value */ -#define EC_CMD_GPIO_GET 0x93 +#define EC_CMD_GPIO_GET 0x0093 -struct ec_params_gpio_get { +/* Version 0 of input params and response */ +struct __ec_align1 ec_params_gpio_get { char name[32]; -} __packed; -struct ec_response_gpio_get { +}; + +struct __ec_align1 ec_response_gpio_get { uint8_t val; -} __packed; +}; + +/* Version 1 of input params and response */ +struct __ec_align1 ec_params_gpio_get_v1 { + uint8_t subcmd; + union { + struct __ec_align1 { + char name[32]; + } get_value_by_name; + struct __ec_align1 { + uint8_t index; + } get_info; + }; +}; + +struct __ec_todo_packed ec_response_gpio_get_v1 { + union { + struct __ec_align1 { + uint8_t val; + } get_value_by_name, get_count; + struct __ec_todo_unpacked { + uint8_t val; + char name[32]; + uint32_t flags; + } get_info; + }; +}; + +enum gpio_get_subcmd { + EC_GPIO_GET_BY_NAME = 0, + EC_GPIO_GET_COUNT = 1, + EC_GPIO_GET_INFO = 2, +}; /*****************************************************************************/ /* I2C commands. Only available when flash write protect is unlocked. */ +/* + * CAUTION: These commands are deprecated, and are not supported anymore in EC + * builds >= 8398.0.0 (see crosbug.com/p/23570). + * + * Use EC_CMD_I2C_PASSTHRU instead. + */ + /* Read I2C bus */ -#define EC_CMD_I2C_READ 0x94 +#define EC_CMD_I2C_READ 0x0094 -struct ec_params_i2c_read { +struct __ec_align_size1 ec_params_i2c_read { uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t read_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; -struct ec_response_i2c_read { +}; + +struct __ec_align2 ec_response_i2c_read { uint16_t data; -} __packed; +}; /* Write I2C bus */ -#define EC_CMD_I2C_WRITE 0x95 +#define EC_CMD_I2C_WRITE 0x0095 -struct ec_params_i2c_write { +struct __ec_align_size1 ec_params_i2c_write { uint16_t data; uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ uint8_t write_size; /* Either 8 or 16. */ uint8_t port; uint8_t offset; -} __packed; +}; /*****************************************************************************/ /* Charge state commands. Only available when flash write protect unlocked. */ -/* Force charge state machine to stop in idle mode */ -#define EC_CMD_CHARGE_FORCE_IDLE 0x96 +/* Force charge state machine to stop charging the battery or force it to + * discharge the battery. + */ +#define EC_CMD_CHARGE_CONTROL 0x0096 +#define EC_VER_CHARGE_CONTROL 1 -struct ec_params_force_idle { - uint8_t enabled; -} __packed; +enum ec_charge_control_mode { + CHARGE_CONTROL_NORMAL = 0, + CHARGE_CONTROL_IDLE, + CHARGE_CONTROL_DISCHARGE, +}; + +struct __ec_align4 ec_params_charge_control { + uint32_t mode; /* enum charge_control_mode */ +}; /*****************************************************************************/ /* Console commands. Only available when flash write protect is unlocked. */ /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ -#define EC_CMD_CONSOLE_SNAPSHOT 0x97 +#define EC_CMD_CONSOLE_SNAPSHOT 0x0097 /* - * Read next chunk of data from saved snapshot. + * Read data from the saved snapshot. If the subcmd parameter is + * CONSOLE_READ_NEXT, this will return data starting from the beginning of + * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the + * end of the previous snapshot. + * + * The params are only looked at in version >= 1 of this command. Prior + * versions will just default to CONSOLE_READ_NEXT behavior. * * Response is null-terminated string. Empty string, if there is no more * remaining output. */ -#define EC_CMD_CONSOLE_READ 0x98 +#define EC_CMD_CONSOLE_READ 0x0098 + +enum ec_console_read_subcmd { + CONSOLE_READ_NEXT = 0, + CONSOLE_READ_RECENT +}; + +struct __ec_align1 ec_params_console_read_v1 { + uint8_t subcmd; /* enum ec_console_read_subcmd */ +}; /*****************************************************************************/ /* - * Cut off battery power output if the battery supports. + * Cut off battery power immediately or after the host has shut down. * - * For unsupported battery, just don't implement this command and lets EC - * return EC_RES_INVALID_COMMAND. + * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. + * EC_RES_SUCCESS if the command was successful. + * EC_RES_ERROR if the cut off command failed. */ -#define EC_CMD_BATTERY_CUT_OFF 0x99 +#define EC_CMD_BATTERY_CUT_OFF 0x0099 + +#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) + +struct __ec_align1 ec_params_battery_cutoff { + uint8_t flags; +}; /*****************************************************************************/ /* USB port mux control. */ @@ -1400,11 +3356,11 @@ struct ec_params_force_idle { /* * Switch USB mux or return to automatic switching. */ -#define EC_CMD_USB_MUX 0x9a +#define EC_CMD_USB_MUX 0x009A -struct ec_params_usb_mux { +struct __ec_align1 ec_params_usb_mux { uint8_t mux; -} __packed; +}; /*****************************************************************************/ /* LDOs / FETs control. */ @@ -1417,25 +3373,25 @@ enum ec_ldo_state { /* * Switch on/off a LDO. */ -#define EC_CMD_LDO_SET 0x9b +#define EC_CMD_LDO_SET 0x009B -struct ec_params_ldo_set { +struct __ec_align1 ec_params_ldo_set { uint8_t index; uint8_t state; -} __packed; +}; /* * Get LDO state. */ -#define EC_CMD_LDO_GET 0x9c +#define EC_CMD_LDO_GET 0x009C -struct ec_params_ldo_get { +struct __ec_align1 ec_params_ldo_get { uint8_t index; -} __packed; +}; -struct ec_response_ldo_get { +struct __ec_align1 ec_response_ldo_get { uint8_t state; -} __packed; +}; /*****************************************************************************/ /* Power info. */ @@ -1443,23 +3399,20 @@ struct ec_response_ldo_get { /* * Get power info. */ -#define EC_CMD_POWER_INFO 0x9d +#define EC_CMD_POWER_INFO 0x009D -struct ec_response_power_info { +struct __ec_align4 ec_response_power_info { uint32_t usb_dev_type; uint16_t voltage_ac; uint16_t voltage_system; uint16_t current_system; uint16_t usb_current_limit; -} __packed; +}; /*****************************************************************************/ /* I2C passthru command */ -#define EC_CMD_I2C_PASSTHRU 0x9e - -/* Slave address is 10 (not 7) bit */ -#define EC_I2C_FLAG_10BIT (1 << 16) +#define EC_CMD_I2C_PASSTHRU 0x009E /* Read data; if not present, message is a write */ #define EC_I2C_FLAG_READ (1 << 15) @@ -1473,111 +3426,434 @@ struct ec_response_power_info { /* Any error */ #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) -struct ec_params_i2c_passthru_msg { +struct __ec_align2 ec_params_i2c_passthru_msg { uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ uint16_t len; /* Number of bytes to read or write */ -} __packed; +}; -struct ec_params_i2c_passthru { +struct __ec_align2 ec_params_i2c_passthru { uint8_t port; /* I2C port number */ uint8_t num_msgs; /* Number of messages */ struct ec_params_i2c_passthru_msg msg[]; /* Data to write for all messages is concatenated here */ -} __packed; +}; -struct ec_response_i2c_passthru { +struct __ec_align1 ec_response_i2c_passthru { uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ uint8_t num_msgs; /* Number of messages processed */ uint8_t data[]; /* Data read by messages concatenated here */ -} __packed; +}; + +/*****************************************************************************/ +/* Power button hang detect */ + +#define EC_CMD_HANG_DETECT 0x009F + +/* Reasons to start hang detection timer */ +/* Power button pressed */ +#define EC_HANG_START_ON_POWER_PRESS (1 << 0) + +/* Lid closed */ +#define EC_HANG_START_ON_LID_CLOSE (1 << 1) + /* Lid opened */ +#define EC_HANG_START_ON_LID_OPEN (1 << 2) + +/* Start of AP S3->S0 transition (booting or resuming from suspend) */ +#define EC_HANG_START_ON_RESUME (1 << 3) + +/* Reasons to cancel hang detection */ + +/* Power button released */ +#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) + +/* Any host command from AP received */ +#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) + +/* Stop on end of AP S0->S3 transition (suspending or shutting down) */ +#define EC_HANG_STOP_ON_SUSPEND (1 << 10) + +/* + * If this flag is set, all the other fields are ignored, and the hang detect + * timer is started. This provides the AP a way to start the hang timer + * without reconfiguring any of the other hang detect settings. Note that + * you must previously have configured the timeouts. + */ +#define EC_HANG_START_NOW (1 << 30) + +/* + * If this flag is set, all the other fields are ignored (including + * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer + * without reconfiguring any of the other hang detect settings. + */ +#define EC_HANG_STOP_NOW (1 << 31) + +struct __ec_align4 ec_params_hang_detect { + /* Flags; see EC_HANG_* */ + uint32_t flags; + + /* Timeout in msec before generating host event, if enabled */ + uint16_t host_event_timeout_msec; + + /* Timeout in msec before generating warm reboot, if enabled */ + uint16_t warm_reboot_timeout_msec; +}; /*****************************************************************************/ -/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ +/* Commands for battery charging */ /* - * Dump charge state machine context. - * - * Response is a binary dump of charge state machine context. + * This is the single catch-all host command to exchange data regarding the + * charge state machine (v2 and up). + */ +#define EC_CMD_CHARGE_STATE 0x00A0 + +/* Subcommands for this host command */ +enum charge_state_command { + CHARGE_STATE_CMD_GET_STATE, + CHARGE_STATE_CMD_GET_PARAM, + CHARGE_STATE_CMD_SET_PARAM, + CHARGE_STATE_NUM_CMDS +}; + +/* + * Known param numbers are defined here. Ranges are reserved for board-specific + * params, which are handled by the particular implementations. */ -#define EC_CMD_CHARGE_DUMP 0xa0 +enum charge_state_params { + CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ + CS_PARAM_CHG_CURRENT, /* charger current limit */ + CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ + CS_PARAM_CHG_STATUS, /* charger-specific status */ + CS_PARAM_CHG_OPTION, /* charger-specific options */ + CS_PARAM_LIMIT_POWER, /* + * Check if power is limited due to + * low battery and / or a weak external + * charger. READ ONLY. + */ + /* How many so far? */ + CS_NUM_BASE_PARAMS, + + /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ + CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, + CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, + + /* Other custom param ranges go here... */ +}; + +struct __ec_todo_packed ec_params_charge_state { + uint8_t cmd; /* enum charge_state_command */ + union { + struct __ec_align1 { + /* no args */ + } get_state; + + struct __ec_todo_unpacked { + uint32_t param; /* enum charge_state_param */ + } get_param; + + struct __ec_todo_unpacked { + uint32_t param; /* param to set */ + uint32_t value; /* value to set */ + } set_param; + }; +}; + +struct __ec_align4 ec_response_charge_state { + union { + struct __ec_align4 { + int ac; + int chg_voltage; + int chg_current; + int chg_input_current; + int batt_state_of_charge; + } get_state; + + struct __ec_align4 { + uint32_t value; + } get_param; + struct __ec_align4 { + /* no return values */ + } set_param; + }; +}; + /* * Set maximum battery charging current. */ -#define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 +#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 -struct ec_params_current_limit { +struct __ec_align4 ec_params_current_limit { uint32_t limit; /* in mA */ -} __packed; +}; /* - * Set maximum external power current. + * Set maximum external voltage / current. */ -#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2 +#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 -struct ec_params_ext_power_current_limit { - uint32_t limit; /* in mA */ -} __packed; +/* Command v0 is used only on Spring and is obsolete + unsupported */ +struct __ec_align2 ec_params_external_power_limit_v1 { + uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ + uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ +}; + +#define EC_POWER_LIMIT_NONE 0xffff + +/* + * Set maximum voltage & current of a dedicated charge port + */ +#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 + +struct __ec_align2 ec_params_dedicated_charger_limit { + uint16_t current_lim; /* in mA */ + uint16_t voltage_lim; /* in mV */ +}; + +/*****************************************************************************/ +/* Hibernate/Deep Sleep Commands */ + +/* Set the delay before going into hibernation. */ +#define EC_CMD_HIBERNATION_DELAY 0x00A8 + +struct __ec_align4 ec_params_hibernation_delay { + /* + * Seconds to wait in G3 before hibernate. Pass in 0 to read the + * current settings without changing them. + */ + uint32_t seconds; +}; + +struct __ec_align4 ec_response_hibernation_delay { + /* + * The current time in seconds in which the system has been in the G3 + * state. This value is reset if the EC transitions out of G3. + */ + uint32_t time_g3; + + /* + * The current time remaining in seconds until the EC should hibernate. + * This value is also reset if the EC transitions out of G3. + */ + uint32_t time_remaining; + + /* + * The current time in seconds that the EC should wait in G3 before + * hibernating. + */ + uint32_t hibernate_delay; +}; + +/* Inform the EC when entering a sleep state */ +#define EC_CMD_HOST_SLEEP_EVENT 0x00A9 + +enum host_sleep_event { + HOST_SLEEP_EVENT_S3_SUSPEND = 1, + HOST_SLEEP_EVENT_S3_RESUME = 2, + HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, + HOST_SLEEP_EVENT_S0IX_RESUME = 4 +}; + +struct __ec_align1 ec_params_host_sleep_event { + uint8_t sleep_event; +}; + +/*****************************************************************************/ +/* Device events */ +#define EC_CMD_DEVICE_EVENT 0x00AA + +enum ec_device_event { + EC_DEVICE_EVENT_TRACKPAD, + EC_DEVICE_EVENT_DSP, + EC_DEVICE_EVENT_WIFI, +}; + +enum ec_device_event_param { + /* Get and clear pending device events */ + EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, + /* Get device event mask */ + EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, + /* Set device event mask */ + EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, +}; + +#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32)) + +struct __ec_align_size1 ec_params_device_event { + uint32_t event_mask; + uint8_t param; +}; + +struct __ec_align4 ec_response_device_event { + uint32_t event_mask; +}; /*****************************************************************************/ /* Smart battery pass-through */ /* Get / Set 16-bit smart battery registers */ -#define EC_CMD_SB_READ_WORD 0xb0 -#define EC_CMD_SB_WRITE_WORD 0xb1 +#define EC_CMD_SB_READ_WORD 0x00B0 +#define EC_CMD_SB_WRITE_WORD 0x00B1 /* Get / Set string smart battery parameters * formatted as SMBUS "block". */ -#define EC_CMD_SB_READ_BLOCK 0xb2 -#define EC_CMD_SB_WRITE_BLOCK 0xb3 +#define EC_CMD_SB_READ_BLOCK 0x00B2 +#define EC_CMD_SB_WRITE_BLOCK 0x00B3 -struct ec_params_sb_rd { +struct __ec_align1 ec_params_sb_rd { uint8_t reg; -} __packed; +}; -struct ec_response_sb_rd_word { +struct __ec_align2 ec_response_sb_rd_word { uint16_t value; -} __packed; +}; -struct ec_params_sb_wr_word { +struct __ec_align1 ec_params_sb_wr_word { uint8_t reg; uint16_t value; -} __packed; +}; -struct ec_response_sb_rd_block { +struct __ec_align1 ec_response_sb_rd_block { uint8_t data[32]; -} __packed; +}; -struct ec_params_sb_wr_block { +struct __ec_align1 ec_params_sb_wr_block { uint8_t reg; uint16_t data[32]; -} __packed; +}; + +/*****************************************************************************/ +/* Battery vendor parameters + * + * Get or set vendor-specific parameters in the battery. Implementations may + * differ between boards or batteries. On a set operation, the response + * contains the actual value set, which may be rounded or clipped from the + * requested value. + */ + +#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 + +enum ec_battery_vendor_param_mode { + BATTERY_VENDOR_PARAM_MODE_GET = 0, + BATTERY_VENDOR_PARAM_MODE_SET, +}; + +struct __ec_align_size1 ec_params_battery_vendor_param { + uint32_t param; + uint32_t value; + uint8_t mode; +}; + +struct __ec_align4 ec_response_battery_vendor_param { + uint32_t value; +}; + +/*****************************************************************************/ +/* + * Smart Battery Firmware Update Commands + */ +#define EC_CMD_SB_FW_UPDATE 0x00B5 + +enum ec_sb_fw_update_subcmd { + EC_SB_FW_UPDATE_PREPARE = 0x0, + EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ + EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ + EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ + EC_SB_FW_UPDATE_END = 0x4, + EC_SB_FW_UPDATE_STATUS = 0x5, + EC_SB_FW_UPDATE_PROTECT = 0x6, + EC_SB_FW_UPDATE_MAX = 0x7, +}; + +#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 +#define SB_FW_UPDATE_CMD_STATUS_SIZE 2 +#define SB_FW_UPDATE_CMD_INFO_SIZE 8 + +struct __ec_align4 ec_sb_fw_update_header { + uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ + uint16_t fw_id; /* firmware id */ +}; + +struct __ec_align4 ec_params_sb_fw_update { + struct ec_sb_fw_update_header hdr; + union { + /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ + /* EC_SB_FW_UPDATE_END = 0x4 */ + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ + struct __ec_align4 { + /* no args */ + } dummy; + + /* EC_SB_FW_UPDATE_WRITE = 0x3 */ + struct __ec_align4 { + uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; + } write; + }; +}; + +struct __ec_align1 ec_response_sb_fw_update { + union { + /* EC_SB_FW_UPDATE_INFO = 0x1 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; + } info; + + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ + struct __ec_align1 { + uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; + } status; + }; +}; /* * Entering Verified Boot Mode Command * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. * Valid Modes are: normal, developer, and recovery. */ -#define EC_CMD_ENTERING_MODE 0xb6 +#define EC_CMD_ENTERING_MODE 0x00B6 -struct ec_params_entering_mode { +struct __ec_align4 ec_params_entering_mode { int vboot_mode; -} __packed; +}; #define VBOOT_MODE_NORMAL 0 #define VBOOT_MODE_DEVELOPER 1 #define VBOOT_MODE_RECOVERY 2 /*****************************************************************************/ +/* + * I2C passthru protection command: Protects I2C tunnels against access on + * certain addresses (board-specific). + */ +#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 + +enum ec_i2c_passthru_protect_subcmd { + EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, + EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, +}; + +struct __ec_align1 ec_params_i2c_passthru_protect { + uint8_t subcmd; + uint8_t port; /* I2C port number */ +}; + +struct __ec_align1 ec_response_i2c_passthru_protect { + uint8_t status; /* Status flags (0: unlocked, 1: locked) */ +}; + +/*****************************************************************************/ /* System commands */ /* - * TODO: this is a confusing name, since it doesn't necessarily reboot the EC. - * Rename to "set image" or something similar. + * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't + * necessarily reboot the EC. Rename to "image" or something similar? */ -#define EC_CMD_REBOOT_EC 0xd2 +#define EC_CMD_REBOOT_EC 0x00D2 /* Command */ enum ec_reboot_cmd { @@ -1587,17 +3863,19 @@ enum ec_reboot_cmd { /* (command 3 was jump to RW-B) */ EC_REBOOT_COLD = 4, /* Cold-reboot */ EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ - EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ + EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ + EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ }; /* Flags for ec_params_reboot_ec.reboot_flags */ #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ +#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */ -struct ec_params_reboot_ec { +struct __ec_align1 ec_params_reboot_ec { uint8_t cmd; /* enum ec_reboot_cmd */ uint8_t flags; /* See EC_REBOOT_FLAG_* */ -} __packed; +}; /* * Get information on last EC panic. @@ -1605,111 +3883,719 @@ struct ec_params_reboot_ec { * Returns variable-length platform-dependent panic information. See panic.h * for details. */ -#define EC_CMD_GET_PANIC_INFO 0xd3 +#define EC_CMD_GET_PANIC_INFO 0x00D3 /*****************************************************************************/ /* - * ACPI commands + * Special commands * - * These are valid ONLY on the ACPI command/data port. + * These do not follow the normal rules for commands. See each command for + * details. */ /* - * ACPI Read Embedded Controller - * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * Reboot NOW * - * Use the following sequence: + * This command will work even when the EC LPC interface is busy, because the + * reboot command is processed at interrupt level. Note that when the EC + * reboots, the host will reboot too, so there is no response to this command. * - * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_DATA bit to set - * - Read value from EC_LPC_ADDR_ACPI_DATA + * Use EC_CMD_REBOOT_EC to reboot the EC more politely. */ -#define EC_CMD_ACPI_READ 0x80 +#define EC_CMD_REBOOT 0x00D1 /* Think "die" */ /* - * ACPI Write Embedded Controller + * Resend last response (not supported on LPC). * - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). + * Returns EC_RES_UNAVAILABLE if there is no response available - for example, + * there was no previous command, or the previous command's response was too + * big to save. + */ +#define EC_CMD_RESEND_RESPONSE 0x00DB + +/* + * This header byte on a command indicate version 0. Any header byte less + * than this means that we are talking to an old EC which doesn't support + * versioning. In that case, we assume version 0. * - * Use the following sequence: + * Header bytes greater than this indicate a later version. For example, + * EC_CMD_VERSION0 + 1 means we are using version 1. * - * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write address to EC_LPC_ADDR_ACPI_DATA - * - Wait for EC_LPC_CMDR_PENDING bit to clear - * - Write value to EC_LPC_ADDR_ACPI_DATA + * The old EC interface must not use commands 0xdc or higher. */ -#define EC_CMD_ACPI_WRITE 0x81 +#define EC_CMD_VERSION0 0x00DC +/*****************************************************************************/ /* - * ACPI Query Embedded Controller + * PD commands * - * This clears the lowest-order bit in the currently pending host events, and - * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, - * event 0x80000000 = 32), or 0 if no event was pending. + * These commands are for PD MCU communication. */ -#define EC_CMD_ACPI_QUERY_EVENT 0x84 -/* Valid addresses in ACPI memory space, for read/write commands */ -/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ -#define EC_ACPI_MEM_VERSION 0x00 +/* EC to PD MCU exchange status command */ +#define EC_CMD_PD_EXCHANGE_STATUS 0x0100 +#define EC_VER_PD_EXCHANGE_STATUS 2 + +enum pd_charge_state { + PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ + PD_CHARGE_NONE, /* No charging allowed */ + PD_CHARGE_5V, /* 5V charging only */ + PD_CHARGE_MAX /* Charge at max voltage */ +}; + +/* Status of EC being sent to PD */ +#define EC_STATUS_HIBERNATING (1 << 0) + +struct __ec_align1 ec_params_pd_status { + uint8_t status; /* EC status */ + int8_t batt_soc; /* battery state of charge */ + uint8_t charge_state; /* charging state (from enum pd_charge_state) */ +}; + +/* Status of PD being sent back to EC */ +#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */ +#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */ +#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */ +#define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */ +#define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */ +#define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */ +#define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */ +#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ + PD_STATUS_TCPC_ALERT_1 | \ + PD_STATUS_HOST_EVENT) +struct __ec_align_size1 ec_response_pd_status { + uint32_t curr_lim_ma; /* input current limit */ + uint16_t status; /* PD MCU status */ + int8_t active_charge_port; /* active charging port */ +}; + +/* AP to PD MCU host event status command, cleared on read */ +#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 + +/* PD MCU host event status bits */ +#define PD_EVENT_UPDATE_DEVICE (1 << 0) +#define PD_EVENT_POWER_CHANGE (1 << 1) +#define PD_EVENT_IDENTITY_RECEIVED (1 << 2) +#define PD_EVENT_DATA_SWAP (1 << 3) +struct __ec_align4 ec_response_host_event_status { + uint32_t status; /* PD MCU host event status */ +}; + +/* Set USB type-C port role and muxes */ +#define EC_CMD_USB_PD_CONTROL 0x0101 + +enum usb_pd_control_role { + USB_PD_CTRL_ROLE_NO_CHANGE = 0, + USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ + USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, + USB_PD_CTRL_ROLE_FORCE_SINK = 3, + USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, + USB_PD_CTRL_ROLE_COUNT +}; + +enum usb_pd_control_mux { + USB_PD_CTRL_MUX_NO_CHANGE = 0, + USB_PD_CTRL_MUX_NONE = 1, + USB_PD_CTRL_MUX_USB = 2, + USB_PD_CTRL_MUX_DP = 3, + USB_PD_CTRL_MUX_DOCK = 4, + USB_PD_CTRL_MUX_AUTO = 5, + USB_PD_CTRL_MUX_COUNT +}; + +enum usb_pd_control_swap { + USB_PD_CTRL_SWAP_NONE = 0, + USB_PD_CTRL_SWAP_DATA = 1, + USB_PD_CTRL_SWAP_POWER = 2, + USB_PD_CTRL_SWAP_VCONN = 3, + USB_PD_CTRL_SWAP_COUNT +}; + +struct __ec_align1 ec_params_usb_pd_control { + uint8_t port; + uint8_t role; + uint8_t mux; + uint8_t swap; +}; + +#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ +#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ +#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ + +#define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */ +#define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */ +#define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */ +#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */ +#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */ +#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */ +#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */ + +struct __ec_align1 ec_response_usb_pd_control { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + uint8_t state; +}; + +struct __ec_align1 ec_response_usb_pd_control_v1 { + uint8_t enabled; + uint8_t role; + uint8_t polarity; + char state[32]; +}; + +#define EC_CMD_USB_PD_PORTS 0x0102 + +/* Maximum number of PD ports on a device, num_ports will be <= this */ +#define EC_USB_PD_MAX_PORTS 8 + +struct __ec_align1 ec_response_usb_pd_ports { + uint8_t num_ports; +}; + +#define EC_CMD_USB_PD_POWER_INFO 0x0103 + +#define PD_POWER_CHARGING_PORT 0xff +struct __ec_align1 ec_params_usb_pd_power_info { + uint8_t port; +}; + +enum usb_chg_type { + USB_CHG_TYPE_NONE, + USB_CHG_TYPE_PD, + USB_CHG_TYPE_C, + USB_CHG_TYPE_PROPRIETARY, + USB_CHG_TYPE_BC12_DCP, + USB_CHG_TYPE_BC12_CDP, + USB_CHG_TYPE_BC12_SDP, + USB_CHG_TYPE_OTHER, + USB_CHG_TYPE_VBUS, + USB_CHG_TYPE_UNKNOWN, +}; +enum usb_power_roles { + USB_PD_PORT_POWER_DISCONNECTED, + USB_PD_PORT_POWER_SOURCE, + USB_PD_PORT_POWER_SINK, + USB_PD_PORT_POWER_SINK_NOT_CHARGING, +}; + +struct __ec_align2 usb_chg_measures { + uint16_t voltage_max; + uint16_t voltage_now; + uint16_t current_max; + uint16_t current_lim; +}; + +struct __ec_align4 ec_response_usb_pd_power_info { + uint8_t role; + uint8_t type; + uint8_t dualrole; + uint8_t reserved1; + struct usb_chg_measures meas; + uint32_t max_power; +}; + +/* Write USB-PD device FW */ +#define EC_CMD_USB_PD_FW_UPDATE 0x0110 + +enum usb_pd_fw_update_cmds { + USB_PD_FW_REBOOT, + USB_PD_FW_FLASH_ERASE, + USB_PD_FW_FLASH_WRITE, + USB_PD_FW_ERASE_SIG, +}; + +struct __ec_align4 ec_params_usb_pd_fw_update { + uint16_t dev_id; + uint8_t cmd; + uint8_t port; + uint32_t size; /* Size to write in bytes */ + /* Followed by data to write */ +}; + +/* Write USB-PD Accessory RW_HASH table entry */ +#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 +/* RW hash is first 20 bytes of SHA-256 of RW section */ +#define PD_RW_HASH_SIZE 20 +struct __ec_align1 ec_params_usb_pd_rw_hash_entry { + uint16_t dev_id; + uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; + uint8_t reserved; /* For alignment of current_image + * TODO(rspangler) but it's not aligned! + * Should have been reserved[2]. */ + uint32_t current_image; /* One of ec_current_image */ +}; + +/* Read USB-PD Accessory info */ +#define EC_CMD_USB_PD_DEV_INFO 0x0112 + +struct __ec_align1 ec_params_usb_pd_info_request { + uint8_t port; +}; + +/* Read USB-PD Device discovery info */ +#define EC_CMD_USB_PD_DISCOVERY 0x0113 +struct __ec_align_size1 ec_params_usb_pd_discovery_entry { + uint16_t vid; /* USB-IF VID */ + uint16_t pid; /* USB-IF PID */ + uint8_t ptype; /* product type (hub,periph,cable,ama) */ +}; + +/* Override default charge behavior */ +#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 + +/* Negative port parameters have special meaning */ +enum usb_pd_override_ports { + OVERRIDE_DONT_CHARGE = -2, + OVERRIDE_OFF = -1, + /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ +}; + +struct __ec_align2 ec_params_charge_port_override { + int16_t override_port; /* Override port# */ +}; + +/* Read (and delete) one entry of PD event log */ +#define EC_CMD_PD_GET_LOG_ENTRY 0x0115 + +struct __ec_align4 ec_response_pd_log { + uint32_t timestamp; /* relative timestamp in milliseconds */ + uint8_t type; /* event type : see PD_EVENT_xx below */ + uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ + uint16_t data; /* type-defined data payload */ + uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ +}; + + +/* The timestamp is the microsecond counter shifted to get about a ms. */ +#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ + +#define PD_LOG_SIZE_MASK 0x1f +#define PD_LOG_PORT_MASK 0xe0 +#define PD_LOG_PORT_SHIFT 5 +#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ + ((size) & PD_LOG_SIZE_MASK)) +#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) +#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) + +/* PD event log : entry types */ +/* PD MCU events */ +#define PD_EVENT_MCU_BASE 0x00 +#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) +#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) +/* Reserved for custom board event */ +#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) +/* PD generic accessory events */ +#define PD_EVENT_ACC_BASE 0x20 +#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) +#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) +/* PD power supply events */ +#define PD_EVENT_PS_BASE 0x40 +#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) +/* PD video dongles events */ +#define PD_EVENT_VIDEO_BASE 0x60 +#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) +#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) +/* Returned in the "type" field, when there is no entry available */ +#define PD_EVENT_NO_ENTRY 0xff + /* - * Test location; writing value here updates test compliment byte to (0xff - - * value). + * PD_EVENT_MCU_CHARGE event definition : + * the payload is "struct usb_chg_measures" + * the data field contains the port state flags as defined below : */ -#define EC_ACPI_MEM_TEST 0x01 -/* Test compliment; writes here are ignored. */ -#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 -/* Keyboard backlight brightness percent (0 - 100) */ -#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 +/* Port partner is a dual role device */ +#define CHARGE_FLAGS_DUAL_ROLE (1 << 15) +/* Port is the pending override port */ +#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14) +/* Port is the override port */ +#define CHARGE_FLAGS_OVERRIDE (1 << 13) +/* Charger type */ +#define CHARGE_FLAGS_TYPE_SHIFT 3 +#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) +/* Power delivery role */ +#define CHARGE_FLAGS_ROLE_MASK (7 << 0) -/* Current version of ACPI memory address space */ -#define EC_ACPI_MEM_VERSION_CURRENT 1 +/* + * PD_EVENT_PS_FAULT data field flags definition : + */ +#define PS_FAULT_OCP 1 +#define PS_FAULT_FAST_OCP 2 +#define PS_FAULT_OVP 3 +#define PS_FAULT_DISCH 4 +/* + * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". + */ +struct __ec_align4 mcdp_version { + uint8_t major; + uint8_t minor; + uint16_t build; +}; + +struct __ec_align4 mcdp_info { + uint8_t family[2]; + uint8_t chipid[2]; + struct mcdp_version irom; + struct mcdp_version fw; +}; + +/* struct mcdp_info field decoding */ +#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) +#define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) + +/* Get/Set USB-PD Alternate mode info */ +#define EC_CMD_USB_PD_GET_AMODE 0x0116 +struct __ec_align_size1 ec_params_usb_pd_get_mode_request { + uint16_t svid_idx; /* SVID index to get */ + uint8_t port; /* port */ +}; + +struct __ec_align4 ec_params_usb_pd_get_mode_response { + uint16_t svid; /* SVID */ + uint16_t opos; /* Object Position */ + uint32_t vdo[6]; /* Mode VDOs */ +}; + +#define EC_CMD_USB_PD_SET_AMODE 0x0117 + +enum pd_mode_cmd { + PD_EXIT_MODE = 0, + PD_ENTER_MODE = 1, + /* Not a command. Do NOT remove. */ + PD_MODE_CMD_COUNT, +}; + +struct __ec_align4 ec_params_usb_pd_set_mode_request { + uint32_t cmd; /* enum pd_mode_cmd */ + uint16_t svid; /* SVID to set */ + uint8_t opos; /* Object Position */ + uint8_t port; /* port */ +}; + +/* Ask the PD MCU to record a log of a requested type */ +#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 + +struct __ec_align1 ec_params_pd_write_log_entry { + uint8_t type; /* event type : see PD_EVENT_xx above */ + uint8_t port; /* port#, or 0 for events unrelated to a given port */ +}; + + +/* Control USB-PD chip */ +#define EC_CMD_PD_CONTROL 0x0119 + +enum ec_pd_control_cmd { + PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ + PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ + PD_RESET, /* Force reset the PD chip */ + PD_CONTROL_DISABLE /* Disable further calls to this command */ +}; + +struct __ec_align1 ec_params_pd_control { + uint8_t chip; /* chip id (should be 0) */ + uint8_t subcmd; +}; + +/* Get info about USB-C SS muxes */ +#define EC_CMD_USB_PD_MUX_INFO 0x011A + +struct __ec_align1 ec_params_usb_pd_mux_info { + uint8_t port; /* USB-C port number */ +}; + +/* Flags representing mux state */ +#define USB_PD_MUX_USB_ENABLED (1 << 0) +#define USB_PD_MUX_DP_ENABLED (1 << 1) +#define USB_PD_MUX_POLARITY_INVERTED (1 << 2) +#define USB_PD_MUX_HPD_IRQ (1 << 3) + +struct __ec_align1 ec_response_usb_pd_mux_info { + uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ +}; + +#define EC_CMD_PD_CHIP_INFO 0x011B + +struct __ec_align1 ec_params_pd_chip_info { + uint8_t port; /* USB-C port number */ + uint8_t renew; /* Force renewal */ +}; + +struct __ec_align2 ec_response_pd_chip_info { + uint16_t vendor_id; + uint16_t product_id; + uint16_t device_id; + union { + uint8_t fw_version_string[8]; + uint64_t fw_version_number; + }; +}; + +/* Run RW signature verification and get status */ +#define EC_CMD_RWSIG_CHECK_STATUS 0x011C + +struct __ec_align4 ec_response_rwsig_check_status { + uint32_t status; +}; + +/* For controlling RWSIG task */ +#define EC_CMD_RWSIG_ACTION 0x011D + +enum rwsig_action { + RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ + RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ +}; + +struct __ec_align4 ec_params_rwsig_action { + uint32_t action; +}; + +/* Run verification on a slot */ +#define EC_CMD_EFS_VERIFY 0x011E + +struct __ec_align1 ec_params_efs_verify { + uint8_t region; /* enum ec_flash_region */ +}; -/*****************************************************************************/ /* - * Special commands - * - * These do not follow the normal rules for commands. See each command for - * details. + * Retrieve info from Cros Board Info store. Response is based on the data + * type. Integers return a uint32. Strings return a string, using the response + * size to determine how big it is. + */ +#define EC_CMD_GET_CROS_BOARD_INFO 0x011F +/* + * Write info into Cros Board Info on EEPROM. Write fails if the board has + * hardware write-protect enabled. */ +#define EC_CMD_SET_CROS_BOARD_INFO 0x0120 + +enum cbi_data_tag { + CBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */ + CBI_TAG_OEM_ID = 1, /* uint8_t */ + CBI_TAG_SKU_ID = 2, /* uint8_t */ + CBI_TAG_COUNT, +}; /* - * Reboot NOW + * Flags to control read operation * - * This command will work even when the EC LPC interface is busy, because the - * reboot command is processed at interrupt level. Note that when the EC - * reboots, the host will reboot too, so there is no response to this command. + * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify + * write was successful without reboot. + */ +#define CBI_GET_RELOAD (1 << 0) + +struct __ec_align4 ec_params_get_cbi { + uint32_t type; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_GET_* */ +}; + +/* + * Flags to control write behavior. * - * Use EC_CMD_REBOOT_EC to reboot the EC more politely. + * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's + * useful when writing multiple fields in a row. + * INIT: Needs to be set when creating a new CBI from scratch. All fields + * will be initialized to zero first. */ -#define EC_CMD_REBOOT 0xd1 /* Think "die" */ +#define CBI_SET_NO_SYNC (1 << 0) +#define CBI_SET_INIT (1 << 1) + +struct __ec_align1 ec_params_set_cbi { + uint32_t tag; /* enum cbi_data_tag */ + uint32_t flag; /* CBI_SET_* */ + uint32_t size; /* Data size */ + uint8_t data[]; /* For string and raw data */ +}; + +/*****************************************************************************/ +/* The command range 0x200-0x2FF is reserved for Rotor. */ +/*****************************************************************************/ /* - * Resend last response (not supported on LPC). + * Reserve a range of host commands for the CR51 firmware. + */ +#define EC_CMD_CR51_BASE 0x0300 +#define EC_CMD_CR51_LAST 0x03FF + +/*****************************************************************************/ +/* Fingerprint MCU commands: range 0x0400-0x040x */ + +/* Fingerprint SPI sensor passthru command: prototyping ONLY */ +#define EC_CMD_FP_PASSTHRU 0x0400 + +#define EC_FP_FLAG_NOT_COMPLETE 0x1 + +struct __ec_align2 ec_params_fp_passthru { + uint16_t len; /* Number of bytes to write then read */ + uint16_t flags; /* EC_FP_FLAG_xxx */ + uint8_t data[]; /* Data to send */ +}; + +/* Fingerprint sensor configuration command: prototyping ONLY */ +#define EC_CMD_FP_SENSOR_CONFIG 0x0401 + +#define EC_FP_SENSOR_CONFIG_MAX_REGS 16 + +struct __ec_align2 ec_params_fp_sensor_config { + uint8_t count; /* Number of setup registers */ + /* + * the value to send to each of the 'count' setup registers + * is stored in the 'data' array for 'len' bytes just after + * the previous one. + */ + uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS]; + uint8_t data[]; +}; + +/* Configure the Fingerprint MCU behavior */ +#define EC_CMD_FP_MODE 0x0402 + +/* Put the sensor in its lowest power mode */ +#define FP_MODE_DEEPSLEEP (1<<0) +/* Wait to see a finger on the sensor */ +#define FP_MODE_FINGER_DOWN (1<<1) +/* Poll until the finger has left the sensor */ +#define FP_MODE_FINGER_UP (1<<2) +/* Capture the current finger image */ +#define FP_MODE_CAPTURE (1<<3) +/* special value: don't change anything just read back current mode */ +#define FP_MODE_DONT_CHANGE (1<<31) + +struct __ec_align4 ec_params_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ + /* TBD */ +}; + +struct __ec_align4 ec_response_fp_mode { + uint32_t mode; /* as defined by FP_MODE_ constants */ + /* TBD */ +}; + +/* Retrieve Fingerprint sensor information */ +#define EC_CMD_FP_INFO 0x0403 + +struct __ec_align2 ec_response_fp_info { + /* Sensor identification */ + uint32_t vendor_id; + uint32_t product_id; + uint32_t model_id; + uint32_t version; + /* Image frame characteristics */ + uint32_t frame_size; + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ + uint16_t width; + uint16_t height; + uint16_t bpp; +}; + +/* Get the last captured finger frame: TODO: will be AES-encrypted */ +#define EC_CMD_FP_FRAME 0x0404 + +struct __ec_align4 ec_params_fp_frame { + uint32_t offset; + uint32_t size; +}; + +/*****************************************************************************/ +/* Touchpad MCU commands: range 0x0500-0x05FF */ + +/* Perform touchpad self test */ +#define EC_CMD_TP_SELF_TEST 0x0500 + +/* Get number of frame types, and the size of each type */ +#define EC_CMD_TP_FRAME_INFO 0x0501 + +struct __ec_align4 ec_response_tp_frame_info { + uint32_t n_frames; + uint32_t frame_sizes[0]; +}; + +/* Create a snapshot of current frame readings */ +#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 + +/* Read the frame */ +#define EC_CMD_TP_FRAME_GET 0x0503 + +struct __ec_align4 ec_params_tp_frame_get { + uint32_t frame_index; + uint32_t offset; + uint32_t size; +}; + +/*****************************************************************************/ +/* + * Reserve a range of host commands for board-specific, experimental, or + * special purpose features. These can be (re)used without updating this file. * - * Returns EC_RES_UNAVAILABLE if there is no response available - for example, - * there was no previous command, or the previous command's response was too - * big to save. + * CAUTION: Don't go nuts with this. Shipping products should document ALL + * their EC commands for easier development, testing, debugging, and support. + * + * All commands MUST be #defined to be 4-digit UPPER CASE hex values + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. + * + * In your experimental code, you may want to do something like this: + * + * #define EC_CMD_MAGIC_FOO 0x0000 + * #define EC_CMD_MAGIC_BAR 0x0001 + * #define EC_CMD_MAGIC_HEY 0x0002 + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, + * EC_VER_MASK(0); + * + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, + * EC_VER_MASK(0); */ -#define EC_CMD_RESEND_RESPONSE 0xdb +#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 +#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF /* - * This header byte on a command indicate version 0. Any header byte less - * than this means that we are talking to an old EC which doesn't support - * versioning. In that case, we assume version 0. + * Given the private host command offset, calculate the true private host + * command value. + */ +#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ + (EC_CMD_BOARD_SPECIFIC_BASE + (command)) + +/*****************************************************************************/ +/* + * Passthru commands * - * Header bytes greater than this indicate a later version. For example, - * EC_CMD_VERSION0 + 1 means we are using version 1. + * Some platforms have sub-processors chained to each other. For example. + * + * AP <--> EC <--> PD MCU + * + * The top 2 bits of the command number are used to indicate which device the + * command is intended for. Device 0 is always the device receiving the + * command; other device mapping is board-specific. * - * The old EC interface must not use commands 0dc or higher. + * When a device receives a command to be passed to a sub-processor, it passes + * it on with the device number set back to 0. This allows the sub-processor + * to remain blissfully unaware of whether the command originated on the next + * device up the chain, or was passed through from the AP. + * + * In the above example, if the AP wants to send command 0x0002 to the PD MCU, + * AP sends command 0x4002 to the EC + * EC sends command 0x0002 to the PD MCU + * EC forwards PD MCU response back to the AP + */ + +/* Offset and max command number for sub-device n */ +#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) +#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) + +/*****************************************************************************/ +/* + * Deprecated constants. These constants have been renamed for clarity. The + * meaning and size has not changed. Programs that use the old names should + * switch to the new names soon, as the old names may not be carried forward + * forever. */ -#define EC_CMD_VERSION0 0xdc +#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE +#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 +#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE -#endif /* !__ACPI__ */ +#endif /* !__ACPI__ && !__KERNEL__ */ #endif /* __CROS_EC_COMMANDS_H */ diff --git a/include/efi_api.h b/include/efi_api.h index bea19a5..e850b95 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -914,9 +914,9 @@ struct efi_file_handle { efi_status_t (EFIAPI *write)(struct efi_file_handle *file, efi_uintn_t *buffer_size, void *buffer); efi_status_t (EFIAPI *getpos)(struct efi_file_handle *file, - efi_uintn_t *pos); + u64 *pos); efi_status_t (EFIAPI *setpos)(struct efi_file_handle *file, - efi_uintn_t pos); + u64 pos); efi_status_t (EFIAPI *getinfo)(struct efi_file_handle *file, const efi_guid_t *info_type, efi_uintn_t *buffer_size, void *buffer); diff --git a/include/efi_loader.h b/include/efi_loader.h index 34e44c6..1417c35 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -236,7 +236,7 @@ efi_status_t efi_root_node_register(void); /* Called by bootefi to initialize runtime */ efi_status_t efi_initialize_system_table(void); /* Called by bootefi to make console interface available */ -int efi_console_register(void); +efi_status_t efi_console_register(void); /* Called by bootefi to make all disk storage accessible as EFI objects */ efi_status_t efi_disk_register(void); /* Create handles and protocols for the partitions of a block device */ diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 2893cd4..560753a 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -35,7 +35,6 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ - "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ @@ -92,8 +91,6 @@ "mmc dev $mmcdev; " \ "mmc rescan; " \ AVB_VERIFY_CHECK \ - "part start mmc ${mmcdev} environment fdt_start; " \ - "part size mmc ${mmcdev} environment fdt_size; " \ "part start mmc ${mmcdev} boot boot_start; " \ "part size mmc ${mmcdev} boot boot_size; " \ "mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; " \ diff --git a/include/fdtdec.h b/include/fdtdec.h index 83be064..c26df50 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -803,23 +803,6 @@ const u8 *fdtdec_locate_byte_array(const void *blob, int node, const char *prop_name, int count); /** - * Look up a property in a node which contains a memory region address and - * size. Then return a pointer to this address. - * - * The property must hold one address with a length. This is only tested on - * 32-bit machines. - * - * @param blob FDT blob - * @param node node to examine - * @param prop_name name of property to find - * @param basep Returns base address of region - * @param size Returns size of region - * @return 0 if ok, -1 on error (property not found) - */ -int fdtdec_decode_region(const void *blob, int node, const char *prop_name, - fdt_addr_t *basep, fdt_size_t *sizep); - -/** * Obtain an indexed resource from a device property. * * @param fdt FDT blob @@ -849,34 +832,6 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, const char *prop_names, const char *name, struct fdt_resource *res); -/** - * Decode a named region within a memory bank of a given type. - * - * This function handles selection of a memory region. The region is - * specified as an offset/size within a particular type of memory. - * - * The properties used are: - * - * <mem_type>-memory<suffix> for the name of the memory bank - * <mem_type>-offset<suffix> for the offset in that bank - * - * The property value must have an offset and a size. The function checks - * that the region is entirely within the memory bank.5 - * - * @param blob FDT blob - * @param node Node containing the properties (-1 for /config) - * @param mem_type Type of memory to use, which is a name, such as - * "u-boot" or "kernel". - * @param suffix String to append to the memory/offset - * property names - * @param basep Returns base of region - * @param sizep Returns size of region - * @return 0 if OK, -ive on error - */ -int fdtdec_decode_memory_region(const void *blob, int node, - const char *mem_type, const char *suffix, - fdt_addr_t *basep, fdt_size_t *sizep); - /* Display timings from linux include/video/display_timing.h */ enum display_flags { DISPLAY_FLAGS_HSYNC_LOW = 1 << 0, diff --git a/include/fsl-mc/ldpaa_wriop.h b/include/fsl-mc/ldpaa_wriop.h index 07e5130..b55c39c 100644 --- a/include/fsl-mc/ldpaa_wriop.h +++ b/include/fsl-mc/ldpaa_wriop.h @@ -6,7 +6,11 @@ #ifndef __LDPAA_WRIOP_H #define __LDPAA_WRIOP_H - #include <phy.h> +#include <phy.h> + +#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0" +#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1" +#define WRIOP_MAX_PHY_NUM 2 enum wriop_port { WRIOP1_DPMAC1 = 1, @@ -40,34 +44,30 @@ struct wriop_dpmac_info { u8 enabled; u8 id; u8 board_mux; - int phy_addr; - void *phy_regs; + int phy_addr[WRIOP_MAX_PHY_NUM]; phy_interface_t enet_if; - struct phy_device *phydev; + struct phy_device *phydev[WRIOP_MAX_PHY_NUM]; struct mii_dev *bus; }; extern struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS]; -#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0" -#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1" - -void wriop_init_dpmac(int, int, int); -void wriop_disable_dpmac(int); -void wriop_enable_dpmac(int); -u8 wriop_is_enabled_dpmac(int dpmac_id); -void wriop_set_mdio(int, struct mii_dev *); -struct mii_dev *wriop_get_mdio(int); -void wriop_set_phy_address(int, int); -int wriop_get_phy_address(int); -void wriop_set_phy_dev(int, struct phy_device *); -struct phy_device *wriop_get_phy_dev(int); -phy_interface_t wriop_get_enet_if(int); +void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl); +void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if); +int wriop_disable_dpmac(int dpmac_id); +int wriop_enable_dpmac(int dpmac_id); +int wriop_is_enabled_dpmac(int dpmac_id); +int wriop_set_mdio(int dpmac_id, struct mii_dev *bus); +struct mii_dev *wriop_get_mdio(int dpmac_id); +int wriop_set_phy_address(int dpmac_id, int phy_num, int address); +int wriop_get_phy_address(int dpmac_id, int phy_num); +int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev); +struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num); +phy_interface_t wriop_get_enet_if(int dpmac_id); -void wriop_dpmac_disable(int); -void wriop_dpmac_enable(int); -phy_interface_t wriop_dpmac_enet_if(int, int); -void wriop_init_dpmac_qsgmii(int, int); +void wriop_dpmac_disable(int dpmac_id); +void wriop_dpmac_enable(int dpmac_id); +phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl); +void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl); void wriop_init_rgmii(void); -void wriop_init_dpmac_enet_if(int , phy_interface_t); #endif /* __LDPAA_WRIOP_H */ diff --git a/include/linux/compat.h b/include/linux/compat.h index 6e3feb6..d0f51ba 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -43,6 +43,25 @@ extern struct p_current *current; #define dev_warn(dev, fmt, args...) \ printf(fmt, ##args) +#define netdev_emerg(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_alert(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_crit(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_err(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_warn(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_notice(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_info(dev, fmt, args...) \ + printf(fmt, ##args) +#define netdev_dbg(dev, fmt, args...) \ + debug(fmt, ##args) +#define netdev_vdbg(dev, fmt, args...) \ + debug(fmt, ##args) + #define GFP_ATOMIC ((gfp_t) 0) #define GFP_KERNEL ((gfp_t) 0) #define GFP_NOFS ((gfp_t) 0) diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h index 22ab246..8d9e079 100644 --- a/include/linux/compiler-gcc.h +++ b/include/linux/compiler-gcc.h @@ -12,7 +12,8 @@ /* Optimization barrier */ /* The "volatile" is due to gcc bugs */ -#define barrier() __asm__ __volatile__("": : :"memory") +#define barrier() \ + __asm__ __volatile__("": : :"memory") /* * This version is i.e. to prevent dead stores elimination on @ptr * where gcc and llvm may behave differently when otherwise using @@ -26,7 +27,8 @@ * the compiler that the inline asm absolutely may see the contents * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 */ -#define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") +#define barrier_data(ptr) \ + __asm__ __volatile__("": :"r"(ptr) :"memory") /* * This macro obfuscates arithmetic on a variable address so that gcc diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h new file mode 100644 index 0000000..0d62aef --- /dev/null +++ b/include/linux/if_ether.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * INET An implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * Global definitions for the Ethernet IEEE 802.3 interface. + * + * Version: @(#)if_ether.h 1.0.1a 02/08/94 + * + * Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> + * Donald Becker, <becker@super.org> + * Alan Cox, <alan@lxorguk.ukuu.org.uk> + * Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _UAPI_LINUX_IF_ETHER_H +#define _UAPI_LINUX_IF_ETHER_H + +#include <linux/types.h> + +/* + * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble + * and FCS/CRC (frame check sequence). + */ + +#define ETH_ALEN 6 /* Octets in one ethernet addr */ +#define ETH_TLEN 2 /* Octets in ethernet type field */ +#define ETH_HLEN 14 /* Total octets in header. */ +#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ +#define ETH_DATA_LEN 1500 /* Max. octets in payload */ +#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ +#define ETH_FCS_LEN 4 /* Octets in the FCS */ + +#define ETH_MIN_MTU 68 /* Min IPv4 MTU per RFC791 */ +#define ETH_MAX_MTU 0xFFFFU /* 65535, same as IP_MAX_MTU */ + +/* + * These are the defined Ethernet Protocol ID's. + */ + +#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ +#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ +#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ +#define ETH_P_TSN 0x22F0 /* TSN (IEEE 1722) packet */ +#define ETH_P_ERSPAN2 0x22EB /* ERSPAN version 2 (type III) */ +#define ETH_P_IP 0x0800 /* Internet Protocol packet */ +#define ETH_P_X25 0x0805 /* CCITT X.25 */ +#define ETH_P_ARP 0x0806 /* Address Resolution packet */ +#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ +#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ +#define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ +#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ +#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ +#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ +#define ETH_P_LAT 0x6004 /* DEC LAT */ +#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ +#define ETH_P_CUST 0x6006 /* DEC Customer use */ +#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ +#define ETH_P_TEB 0x6558 /* Trans Ether Bridging */ +#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ +#define ETH_P_ATALK 0x809B /* Appletalk DDP */ +#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ +#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ +#define ETH_P_ERSPAN 0x88BE /* ERSPAN type II */ +#define ETH_P_IPX 0x8137 /* IPX over DIX */ +#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ +#define ETH_P_PAUSE 0x8808 /* IEEE Pause frames. See 802.3 31B */ +#define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */ +#define ETH_P_WCCP 0x883E /* Web-cache coordination */ + /* protocol defined in */ + /* draft-wilson-wrec-wccp-v2-00.txt */ +#define ETH_P_MPLS_UC 0x8847 /* MPLS Unicast traffic */ +#define ETH_P_MPLS_MC 0x8848 /* MPLS Multicast traffic */ +#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ +#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ +#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ +#define ETH_P_LINK_CTL 0x886c /* HPNA, wlan link local tunnel */ +#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport over Ethernet */ +#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ +#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ +#define ETH_P_8021AD 0x88A8 /* 802.1ad Service VLAN */ +#define ETH_P_802_EX1 0x88B5 /* 802.1 Local Experimental 1. */ +#define ETH_P_PREAUTH 0x88C7 /* 802.11 Preauthentication */ +#define ETH_P_TIPC 0x88CA /* TIPC */ +#define ETH_P_MACSEC 0x88E5 /* 802.1ae MACsec */ +#define ETH_P_8021AH 0x88E7 /* 802.1ah Backbone Service Tag */ +#define ETH_P_MVRP 0x88F5 /* 802.1Q MVRP */ +#define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */ +#define ETH_P_NCSI 0x88F8 /* NCSI protocol */ +#define ETH_P_PRP 0x88FB /* IEC 62439-3 PRP/HSRv0 */ +#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */ +#define ETH_P_IBOE 0x8915 /* Infiniband over Ethernet */ +#define ETH_P_TDLS 0x890D /* TDLS */ +#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */ +#define ETH_P_80221 0x8917 /* IEEE 802.21 Media Independent */ + /* Handover Protocol */ +#define ETH_P_HSR 0x892F /* IEC 62439-3 HSRv1 */ +#define ETH_P_NSH 0x894F /* Network Service Header */ +#define ETH_P_LOOPBACK 0x9000 /* Ethernet loopback packet, per IEEE 802.3 */ +#define ETH_P_QINQ1 0x9100 /* deprecated QinQ VLAN */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_QINQ2 0x9200 /* deprecated QinQ VLAN */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_QINQ3 0x9300 /* deprecated QinQ VLAN] */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_EDSA 0xDADA /* Ethertype DSA */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IFE 0xED3E /* ForCES inter-FE LFB type */ +#define ETH_P_AF_IUCV 0xFBFB /* IBM af_iucv */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ + +#define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is less */ + /* than this value then the frame is Ethernet */ + /* II. Else it is 802.3 */ + +/* + * Non DIX types. Won't clash for 1500 types. + */ + +#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ +#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ +#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ +#define ETH_P_802_2 0x0004 /* 802.2 frames */ +#define ETH_P_SNAP 0x0005 /* Internal only */ +#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ +#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ +#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ +#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ +#define ETH_P_CAN 0x000C /* CAN: Controller Area Network */ +#define ETH_P_CANFD 0x000D /* CANFD: CAN flexible data rate*/ +#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ +#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ +#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ +#define ETH_P_CONTROL 0x0016 /* Card specific control frames */ +#define ETH_P_IRDA 0x0017 /* Linux-IrDA */ +#define ETH_P_ECONET 0x0018 /* Acorn Econet */ +#define ETH_P_HDLC 0x0019 /* HDLC frames */ +#define ETH_P_ARCNET 0x001A /* 1A for ArcNet :-) */ +#define ETH_P_DSA 0x001B /* Distributed Switch Arch */ +#define ETH_P_TRAILER 0x001C /* Trailer switch tagging */ +#define ETH_P_PHONET 0x00F5 /* Nokia Phonet frames */ +#define ETH_P_IEEE802154 0x00F6 /* IEEE802.15.4 frame */ +#define ETH_P_CAIF 0x00F7 /* ST-Ericsson CAIF protocol */ +#define ETH_P_XDSA 0x00F8 /* Multiplexed DSA protocol */ +#define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and */ + /* aggregation protocol */ + +/* The following macros come from Linux kernel include/linux/if_vlan.h */ + +#define VLAN_HLEN 4 /* The additional bytes required by VLAN */ + /* (in addition to the Ethernet header) */ +#define VLAN_ETH_HLEN 18 /* Total octets in header. */ +#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */ + +/* + * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan + */ +#define VLAN_ETH_DATA_LEN 1500 /* Max. octets in payload */ +#define VLAN_ETH_FRAME_LEN 1518 /* Max. octets in frame sans FCS */ + +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#define VLAN_PRIO_SHIFT 13 +#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator */ +#define VLAN_TAG_PRESENT VLAN_CFI_MASK +#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */ +#define VLAN_N_VID 4096 + +#endif /* _UAPI_LINUX_IF_ETHER_H */ diff --git a/include/linux/mdio.h b/include/linux/mdio.h index ea20608..6e821d9 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * linux/mdio.h: definitions for MDIO (clause 45) transceivers * Copyright 2006-2009 Solarflare Communications Inc. @@ -42,7 +43,11 @@ #define MDIO_PKGID2 15 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ +#define MDIO_PCS_EEE_ABLE 20 /* EEE Capability register */ +#define MDIO_PCS_EEE_WK_ERR 22 /* EEE wake error counter */ #define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ +#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ +#define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */ /* Media-dependent registers. */ #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ @@ -55,7 +60,6 @@ #define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ #define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */ #define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */ -#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ #define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ @@ -81,6 +85,7 @@ #define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART #define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE #define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */ +#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */ /* 10 Gb/s */ #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) @@ -245,9 +250,25 @@ #define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */ #define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */ -/* AN EEE Advertisement register. */ -#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ -#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ +/* EEE Supported/Advertisement/LP Advertisement registers. + * + * EEE capability Register (3.20), Advertisement (7.60) and + * Link partner ability (7.61) registers have and can use the same identical + * bit masks. + */ +#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ +#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ +/* Note: the two defines above can be potentially used by the user-land + * and cannot remove them now. + * So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros + * using the previous ones (that can be considered obsolete). + */ +#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */ +#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */ +#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */ +#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */ +#define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */ +#define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */ /* LASI RX_ALARM control/status registers. */ #define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */ @@ -281,4 +302,9 @@ #define MDIO_DEVAD_NONE (-1) #define MDIO_EMULATE_C22 4 +static inline __u16 mdio_phy_id_c45(int prtad, int devad) +{ + return MDIO_PHY_ID_C45 | (prtad << 5) | devad; +} + #endif /* __LINUX_MDIO_H__ */ diff --git a/include/linux/mii.h b/include/linux/mii.h index 19afb74..21db032 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * linux/mii.h: definitions for MII-compatible transceivers * Originally drivers/net/sunhme.h. @@ -9,53 +10,55 @@ #define __LINUX_MII_H__ /* Generic MII registers. */ - -#define MII_BMCR 0x00 /* Basic mode control register */ -#define MII_BMSR 0x01 /* Basic mode status register */ -#define MII_PHYSID1 0x02 /* PHYS ID 1 */ -#define MII_PHYSID2 0x03 /* PHYS ID 2 */ -#define MII_ADVERTISE 0x04 /* Advertisement control reg */ -#define MII_LPA 0x05 /* Link partner ability reg */ -#define MII_EXPANSION 0x06 /* Expansion register */ -#define MII_CTRL1000 0x09 /* 1000BASE-T control */ -#define MII_STAT1000 0x0a /* 1000BASE-T status */ -#define MII_ESTATUS 0x0f /* Extended Status */ -#define MII_DCOUNTER 0x12 /* Disconnect counter */ -#define MII_FCSCOUNTER 0x13 /* False carrier counter */ -#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ -#define MII_RERRCOUNTER 0x15 /* Receive error counter */ -#define MII_SREVISION 0x16 /* Silicon revision */ -#define MII_RESV1 0x17 /* Reserved... */ -#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ -#define MII_PHYADDR 0x19 /* PHY address */ -#define MII_RESV2 0x1a /* Reserved... */ -#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ -#define MII_NCONFIG 0x1c /* Network interface config */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */ +#define MII_MMD_DATA 0x0e /* MMD Access Data Register */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ /* Basic mode control register. */ -#define BMCR_RESV 0x003f /* Unused... */ -#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ -#define BMCR_CTST 0x0080 /* Collision test */ -#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ -#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ -#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */ +#define BMCR_PDOWN 0x0800 /* Enable low power state */ #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ -#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ -#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ -#define BMCR_RESET 0x8000 /* Reset the DP83840 */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset to default state */ +#define BMCR_SPEED10 0x0000 /* Select 10Mbps */ /* Basic mode status register. */ -#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ -#define BMSR_JCD 0x0002 /* Jabber detected */ -#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ #define BMSR_RFAULT 0x0010 /* Remote fault detected */ #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ -#define BMSR_RESV 0x00c0 /* Unused... */ -#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ -#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ -#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ @@ -63,7 +66,7 @@ #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ /* Advertisement control register. */ -#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ @@ -72,19 +75,19 @@ #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ -#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ -#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ -#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ -#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ -#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ - ADVERTISE_CSMA) -#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ - ADVERTISE_100HALF | ADVERTISE_100FULL) +#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ + ADVERTISE_CSMA) +#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ + ADVERTISE_100HALF | ADVERTISE_100FULL) /* Link partner ability register. */ #define LPA_SLCT 0x001f /* Same as advertise selector */ @@ -97,12 +100,12 @@ #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ -#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ -#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RESV 0x1000 /* Unused... */ #define LPA_RFAULT 0x2000 /* Link partner faulted */ #define LPA_LPACK 0x4000 /* Link partner acked us */ -#define LPA_NPAGE 0x8000 /* Next page bit */ +#define LPA_NPAGE 0x8000 /* Next page bit */ #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) @@ -113,21 +116,23 @@ #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ -#define EXPANSION_RESV 0xffe0 /* Unused... */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ #define ESTATUS_1000_XFULL 0x8000 /* Can do 1000BX Full */ #define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */ -#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ -#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ /* N-way test register. */ -#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ -#define NWAYTEST_RESV2 0xfe00 /* Unused... */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ /* 1000BASE-T Control register */ -#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ -#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +#define CTL1000_AS_MASTER 0x0800 +#define CTL1000_ENABLE_MASTER 0x1000 /* 1000BASE-T Status register */ #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ @@ -139,6 +144,13 @@ #define FLOW_CTRL_TX 0x01 #define FLOW_CTRL_RX 0x02 +/* MMD Access Control register fields */ +#define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/ +#define MII_MMD_CTRL_ADDR 0x0000 /* Address */ +#define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */ +#define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */ +#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */ + /** * mii_nway_result * @negotiated: value of MII ANAR and'd with ANLPAR diff --git a/include/log.h b/include/log.h index 653fb8d..a872fc6 100644 --- a/include/log.h +++ b/include/log.h @@ -39,16 +39,17 @@ enum log_level_t { enum log_category_t { LOGC_FIRST = 0, /* First part mirrors UCLASS_... */ - LOGC_NONE = UCLASS_COUNT, - LOGC_ARCH, - LOGC_BOARD, - LOGC_CORE, + LOGC_NONE = UCLASS_COUNT, /* First number is after all uclasses */ + LOGC_ARCH, /* Related to arch-specific code */ + LOGC_BOARD, /* Related to board-specific code */ + LOGC_CORE, /* Related to core features (non-driver-model) */ LOGC_DM, /* Core driver-model */ LOGC_DT, /* Device-tree */ LOGC_EFI, /* EFI implementation */ + LOGC_ALLOC, /* Memory allocation */ - LOGC_COUNT, - LOGC_END, + LOGC_COUNT, /* Number of log categories */ + LOGC_END, /* Sentinel value for a list of log categories */ }; /* Helper to cast a uclass ID to a log category */ @@ -88,8 +89,22 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, */ #if CONFIG_IS_ENABLED(LOG) #define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL) +#define log_err(_fmt...) log(LOG_CATEGORY, LOGL_ERR, ##_fmt) +#define log_warning(_fmt...) log(LOG_CATEGORY, LOGL_WARNING, ##_fmt) +#define log_notice(_fmt...) log(LOG_CATEGORY, LOGL_NOTICE, ##_fmt) +#define log_info(_fmt...) log(LOG_CATEGORY, LOGL_INFO, ##_fmt) +#define log_debug(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt) +#define log_content(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_CONTENT, ##_fmt) +#define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #else #define _LOG_MAX_LEVEL LOGL_INFO +#define log_err(_fmt...) +#define log_warning(_fmt...) +#define log_notice(_fmt...) +#define log_info(_fmt...) +#define log_debug(_fmt...) +#define log_content(_fmt...) +#define log_io(_fmt...) #endif /* Emit a log record if the level is less that the maximum */ @@ -175,7 +190,7 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line, }) #else #define log_ret(_ret) (_ret) -#define log_msg_ret(_ret) (_ret) +#define log_msg_ret(_msg, _ret) (_ret) #endif /** diff --git a/include/net.h b/include/net.h index 2b2deb5..51c099d 100644 --- a/include/net.h +++ b/include/net.h @@ -14,6 +14,7 @@ #include <asm/cache.h> #include <asm/byteorder.h> /* for nton* / ntoh* stuff */ +#include <linux/if_ether.h> #define DEBUG_LL_STATE 0 /* Link local state machine changes */ #define DEBUG_DEV_PKT 0 /* Packets or info directed to the device */ @@ -596,7 +597,8 @@ int net_set_ether(uchar *xet, const uchar *dest_ethaddr, uint prot); int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot); /* Set IP header */ -void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source); +void net_set_ip_header(uchar *pkt, struct in_addr dest, struct in_addr source, + u16 pkt_len, u8 proto); void net_set_udp_header(uchar *pkt, struct in_addr dest, int dport, int sport, int len); @@ -635,6 +637,7 @@ rxhand_f *net_get_udp_handler(void); /* Get UDP RX packet handler */ void net_set_udp_handler(rxhand_f *); /* Set UDP RX packet handler */ rxhand_f *net_get_arp_handler(void); /* Get ARP RX packet handler */ void net_set_arp_handler(rxhand_f *); /* Set ARP RX packet handler */ +bool arp_is_waiting(void); /* Waiting for ARP reply? */ void net_set_icmp_handler(rxhand_icmp_f *f); /* Set ICMP RX handler */ void net_set_timeout_handler(ulong, thand_f *);/* Set timeout handler */ @@ -653,6 +656,14 @@ static inline void net_set_state(enum net_loop_state state) net_state = state; } +/* + * net_get_async_tx_pkt_buf - Get a packet buffer that is not in use for + * sending an asynchronous reply + * + * returns - ptr to packet buffer + */ +uchar * net_get_async_tx_pkt_buf(void); + /* Transmit a packet */ static inline void net_send_packet(uchar *pkt, int len) { @@ -670,6 +681,9 @@ static inline void net_send_packet(uchar *pkt, int len) * @param sport Source UDP port * @param payload_len Length of data after the UDP header */ +int net_send_ip_packet(uchar *ether, struct in_addr dest, int dport, int sport, + int payload_len, int proto, u8 action, u32 tcp_seq_num, + u32 tcp_ack_num); int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport, int payload_len); diff --git a/include/os.h b/include/os.h index 5c79721..28eb625 100644 --- a/include/os.h +++ b/include/os.h @@ -27,16 +27,6 @@ struct sandbox_state; ssize_t os_read(int fd, void *buf, size_t count); /** - * Access to the OS read() system call with non-blocking access - * - * \param fd File descriptor as returned by os_open() - * \param buf Buffer to place data - * \param count Number of bytes to read - * \return number of bytes read, or -1 on error - */ -ssize_t os_read_no_block(int fd, void *buf, size_t count); - -/** * Access to the OS write() system call * * \param fd File descriptor as returned by os_open() @@ -75,6 +65,7 @@ int os_open(const char *pathname, int flags); #define OS_O_RDWR 2 #define OS_O_MASK 3 /* Mask for read/write flags */ #define OS_O_CREAT 0100 +#define OS_O_TRUNC 01000 /** * Access to the OS close() system call @@ -334,4 +325,29 @@ void os_localtime(struct rtc_time *rt); * os_abort() - Raise SIGABRT to exit sandbox (e.g. to debugger) */ void os_abort(void); + +/** + * os_mprotect_allow() - Remove write-protection on a region of memory + * + * The start and length will be page-aligned before use. + * + * @start: Region start + * @len: Region length in bytes + * @return 0 if OK, -1 on error from mprotect() + */ +int os_mprotect_allow(void *start, size_t len); + +/** + * os_write_file() - Write a file to the host filesystem + * + * This can be useful when debugging for writing data out of sandbox for + * inspection by external tools. + * + * @name: File path to write to + * @buf: Data to write + * @size: Size of data to write + * @return 0 if OK, -ve on error + */ +int os_write_file(const char *name, const void *buf, int size); + #endif diff --git a/include/panel.h b/include/panel.h index 6237d32..cd596d4 100644 --- a/include/panel.h +++ b/include/panel.h @@ -15,6 +15,16 @@ struct panel_ops { * @return 0 if OK, -ve on error */ int (*enable_backlight)(struct udevice *dev); + + /** + * set_backlight - Set panel backlight brightness + * + * @dev: Panel device containing the backlight to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ + int (*set_backlight)(struct udevice *dev, int percent); + /** * get_timings() - Get display timings from panel. * @@ -29,14 +39,24 @@ struct panel_ops { #define panel_get_ops(dev) ((struct panel_ops *)(dev)->driver->ops) /** - * panel_enable_backlight() - Enable the panel backlight + * panel_enable_backlight() - Enable/disable the panel backlight * * @dev: Panel device containing the backlight to enable + * @enable: true to enable the backlight, false to dis * @return 0 if OK, -ve on error */ int panel_enable_backlight(struct udevice *dev); /** + * panel_set_backlight - Set brightness for the panel backlight + * + * @dev: Panel device containing the backlight to update + * @percent: Brightness value (0 to 100, or BACKLIGHT_... value) + * @return 0 if OK, -ve on error + */ +int panel_set_backlight(struct udevice *dev, int percent); + +/** * panel_get_display_timing() - Get display timings from panel. * * @dev: Panel device containing the display timings diff --git a/include/part_efi.h b/include/part_efi.h index 8525770..7170b61 100644 --- a/include/part_efi.h +++ b/include/part_efi.h @@ -24,7 +24,7 @@ #define EFI_PMBR_OSTYPE_EFI 0xEF #define EFI_PMBR_OSTYPE_EFI_GPT 0xEE -#define GPT_HEADER_SIGNATURE 0x5452415020494645ULL +#define GPT_HEADER_SIGNATURE_UBOOT 0x5452415020494645ULL #define GPT_HEADER_REVISION_V1 0x00010000 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL #define GPT_ENTRY_NUMBERS CONFIG_EFI_PARTITION_ENTRIES_NUMBERS diff --git a/include/phy_interface.h b/include/phy_interface.h index 0760d65..c682318 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -27,6 +27,10 @@ typedef enum { PHY_INTERFACE_MODE_RXAUI, PHY_INTERFACE_MODE_SFI, PHY_INTERFACE_MODE_INTERNAL, + PHY_INTERFACE_MODE_25G_AUI, + PHY_INTERFACE_MODE_XLAUI, + PHY_INTERFACE_MODE_CAUI2, + PHY_INTERFACE_MODE_CAUI4, PHY_INTERFACE_MODE_NONE, /* Must be last */ PHY_INTERFACE_MODE_COUNT, @@ -50,6 +54,10 @@ static const char * const phy_interface_strings[] = { [PHY_INTERFACE_MODE_RXAUI] = "rxaui", [PHY_INTERFACE_MODE_SFI] = "sfi", [PHY_INTERFACE_MODE_INTERNAL] = "internal", + [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui", + [PHY_INTERFACE_MODE_XLAUI] = "xlaui4", + [PHY_INTERFACE_MODE_CAUI2] = "caui2", + [PHY_INTERFACE_MODE_CAUI4] = "caui4", [PHY_INTERFACE_MODE_NONE] = "", }; diff --git a/include/samsung/exynos5-dt-types.h b/include/samsung/exynos5-dt-types.h index 8e11af3..8fe08fe 100644 --- a/include/samsung/exynos5-dt-types.h +++ b/include/samsung/exynos5-dt-types.h @@ -9,6 +9,7 @@ enum { EXYNOS5_BOARD_ODROID_XU3_REV02, EXYNOS5_BOARD_ODROID_XU4_REV01, EXYNOS5_BOARD_ODROID_HC1_REV01, + EXYNOS5_BOARD_ODROID_HC2_REV01, EXYNOS5_BOARD_ODROID_UNKNOWN, EXYNOS5_BOARD_COUNT, @@ -25,5 +26,6 @@ bool board_is_generic(void); bool board_is_odroidxu3(void); bool board_is_odroidxu4(void); bool board_is_odroidhc1(void); +bool board_is_odroidhc2(void); #endif diff --git a/include/string.h b/include/string.h new file mode 100644 index 0000000..38134dc --- /dev/null +++ b/include/string.h @@ -0,0 +1 @@ +#include <linux/string.h> diff --git a/include/sysreset.h b/include/sysreset.h index a5c0b74..61295e3 100644 --- a/include/sysreset.h +++ b/include/sysreset.h @@ -11,6 +11,7 @@ enum sysreset_t { SYSRESET_WARM, /* Reset CPU, keep GPIOs active */ SYSRESET_COLD, /* Reset CPU and GPIOs */ SYSRESET_POWER, /* Reset PMIC (remove and restore power) */ + SYSRESET_POWER_OFF, /* Turn off power */ SYSRESET_COUNT, }; @@ -31,11 +32,20 @@ struct sysreset_ops { /** * get_status() - get printable reset status information * + * @dev: Device to check * @buf: Buffer to receive the textual reset information * @size: Size of the passed buffer * @return 0 if OK, -ve on error */ int (*get_status)(struct udevice *dev, char *buf, int size); + + /** + * get_last() - get information on the last reset + * + * @dev: Device to check + * @return last reset state (enum sysreset_t) or -ve error + */ + int (*get_last)(struct udevice *dev); }; #define sysreset_get_ops(dev) ((struct sysreset_ops *)(dev)->driver->ops) @@ -49,8 +59,9 @@ struct sysreset_ops { int sysreset_request(struct udevice *dev, enum sysreset_t type); /** - * get_status() - get printable reset status information + * sysreset_get_status() - get printable reset status information * + * @dev: Device to check * @buf: Buffer to receive the textual reset information * @size: Size of the passed buffer * @return 0 if OK, -ve on error @@ -58,6 +69,14 @@ int sysreset_request(struct udevice *dev, enum sysreset_t type); int sysreset_get_status(struct udevice *dev, char *buf, int size); /** + * sysreset_get_last() - get information on the last reset + * + * @dev: Device to check + * @return last reset state (enum sysreset_t) or -ve error + */ +int sysreset_get_last(struct udevice *dev); + +/** * sysreset_walk() - cause a system reset * * This works through the available sysreset devices until it finds one that can @@ -72,6 +91,19 @@ int sysreset_get_status(struct udevice *dev, char *buf, int size); int sysreset_walk(enum sysreset_t type); /** + * sysreset_get_last_walk() - get information on the last reset + * + * This works through the available sysreset devices until it finds one that can + * perform a reset. If the provided sysreset type is not available, the next one + * will be tried. + * + * If no device prives the information, this function returns -ENOENT + * + * @return last reset state (enum sysreset_t) or -ve error + */ +int sysreset_get_last_walk(void); + +/** * sysreset_walk_halt() - try to reset, otherwise halt * * This calls sysreset_walk(). If it returns, indicating that reset is not diff --git a/include/tpm-v1.h b/include/tpm-v1.h index 6b4941e..be2eca9 100644 --- a/include/tpm-v1.h +++ b/include/tpm-v1.h @@ -81,6 +81,12 @@ enum tpm_capability_areas { TPM_CAP_VERSION_VAL = 0x0000001A, }; +enum tmp_cap_flag { + TPM_CAP_FLAG_PERMANENT = 0x108, +}; + +#define TPM_TAG_PERMANENT_FLAGS 0x001f + #define TPM_NV_PER_GLOBALLOCK BIT(15) #define TPM_NV_PER_PPREAD BIT(16) #define TPM_NV_PER_PPWRITE BIT(0) @@ -93,6 +99,14 @@ enum { TPM_PUBEK_SIZE = 256, }; +enum { + TPM_CMD_EXTEND = 0x14, + TPM_CMD_GET_CAPABILITY = 0x65, + TPM_CMD_NV_DEFINE_SPACE = 0xcc, + TPM_CMD_NV_WRITE_VALUE = 0xcd, + TPM_CMD_NV_READ_VALUE = 0xcf, +}; + /** * TPM return codes as defined in the TCG Main specification * (TPM Main Part 2 Structures; Specification version 1.2) @@ -231,6 +245,40 @@ struct tpm_permanent_flags { u8 disable_full_da_logic_info; } __packed; +#define TPM_SHA1_160_HASH_LEN 0x14 + +struct __packed tpm_composite_hash { + u8 digest[TPM_SHA1_160_HASH_LEN]; +}; + +struct __packed tpm_pcr_selection { + __be16 size_of_select; + u8 pcr_select[3]; /* matches vboot's struct */ +}; + +struct __packed tpm_pcr_info_short { + struct tpm_pcr_selection pcr_selection; + u8 locality_at_release; + struct tpm_composite_hash digest_at_release; +}; + +struct __packed tpm_nv_attributes { + __be16 tag; + __be32 attributes; +}; + +struct __packed tpm_nv_data_public { + __be16 tag; + __be32 nv_index; + struct tpm_pcr_info_short pcr_info_read; + struct tpm_pcr_info_short pcr_info_write; + struct tpm_nv_attributes permission; + u8 read_st_clear; + u8 write_st_clear; + u8 write_define; + __be32 data_size; +}; + /** * Issue a TPM_Startup command. * @@ -477,4 +525,32 @@ u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], */ u32 tpm_get_random(void *data, u32 count); +/** + * tpm_finalise_physical_presence() - Finalise physical presence + * + * @return return code of the operation (0 = success) + */ +u32 tpm_finalise_physical_presence(void); + +/** + * tpm_nv_set_locked() - lock the non-volatile space + * + * @return return code of the operation (0 = success) + */ +u32 tpm_nv_set_locked(void); + +/** + * tpm_set_global_lock() - set the global lock + * + * @return return code of the operation (0 = success) + */ +u32 tpm_set_global_lock(void); + +/** + * tpm_resume() - start up the TPM from resume (after suspend) + * + * @return return code of the operation (0 = success) + */ +u32 tpm_resume(void); + #endif /* __TPM_V1_H */ diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 780e061..c77b416 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -83,6 +83,7 @@ enum tpm2_command_codes { TPM2_CC_PCR_SETAUTHPOL = 0x012C, TPM2_CC_DAM_RESET = 0x0139, TPM2_CC_DAM_PARAMETERS = 0x013A, + TPM2_CC_NV_READ = 0x014E, TPM2_CC_GET_CAPABILITY = 0x017A, TPM2_CC_PCR_READ = 0x017E, TPM2_CC_PCR_EXTEND = 0x0182, diff --git a/include/usb_ether.h b/include/usb_ether.h index 49f47d3..e85acad 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -8,16 +8,6 @@ #include <net.h> -/* - * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble - * and FCS/CRC (frame check sequence). - */ -#define ETH_ALEN 6 /* Octets in one ethernet addr */ -#define ETH_HLEN 14 /* Total octets in header. */ -#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ -#define ETH_DATA_LEN 1500 /* Max. octets in payload */ -#define ETH_FRAME_LEN PKTSIZE_ALIGN /* Max. octets in frame sans FCS */ - /* TODO(sjg@chromium.org): Remove @pusb_dev when all boards use CONFIG_DM_ETH */ struct ueth_data { /* eth info */ diff --git a/include/video.h b/include/video.h index e7fc5c9..75200f0 100644 --- a/include/video.h +++ b/include/video.h @@ -55,7 +55,7 @@ enum video_log2_bpp { * @xsize: Number of pixel columns (e.g. 1366) * @ysize: Number of pixels rows (e.g.. 768) * @rot: Display rotation (0=none, 1=90 degrees clockwise, etc.) - * @bpix: Encoded bits per pixel + * @bpix: Encoded bits per pixel (enum video_log2_bpp) * @vidconsole_drv_name: Driver to use for the text console, NULL to * select automatically * @font_size: Font size in pixels (0 to use a default value) @@ -120,8 +120,9 @@ int video_reserve(ulong *addrp); * video_clear() - Clear a device's frame buffer to background color. * * @dev: Device to clear + * @return 0 */ -void video_clear(struct udevice *dev); +int video_clear(struct udevice *dev); /** * video_sync() - Sync a device's frame buffer with its hardware @@ -131,8 +132,10 @@ void video_clear(struct udevice *dev); * buffer are displayed to the user. * * @dev: Device to sync + * @force: True to force a sync even if there was one recently (this is + * very expensive on sandbox) */ -void video_sync(struct udevice *vid); +void video_sync(struct udevice *vid, bool force); /** * video_sync_all() - Sync all devices' frame buffers with there hardware @@ -266,6 +269,6 @@ int lg4573_spi_startup(unsigned int bus, unsigned int cs, */ void video_get_info_str(int line_number, char *info); -#endif /* CONFIG_DM_VIDEO */ +#endif /* !CONFIG_DM_VIDEO */ #endif |