diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/cgtqmx8.h | 181 | ||||
| -rw-r--r-- | include/configs/gw_ventana.h | 10 | ||||
| -rw-r--r-- | include/configs/imx8mn_evk.h | 68 | ||||
| -rw-r--r-- | include/configs/npi_imx6ull.h | 96 | ||||
| -rw-r--r-- | include/configs/o4-imx6ull-nano.h | 33 | ||||
| -rw-r--r-- | include/configs/smegw01.h | 63 | ||||
| -rw-r--r-- | include/configs/verdin-imx8mm.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imxrt1050-clock.h | 6 |
8 files changed, 393 insertions, 66 deletions
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h new file mode 100644 index 0000000..15c5027 --- /dev/null +++ b/include/configs/cgtqmx8.h @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2017-2018 NXP + * Copyright 2018 congatec AG + * + */ + +#ifndef __CGTQMX8_H +#define __CGTQMX8_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_EMBED +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define USDHC1_BASE_ADDR 0x5B010000 +#define USDHC2_BASE_ADDR 0x5B020000 +#define USDHC3_BASE_ADDR 0x5B030000 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +/* Boot M4 */ +#define M4_BOOT_ENV \ + "m4_0_image=m4_0.bin\0" \ + "m4_1_image=m4_1.bin\0" \ + "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ + "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ + "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ + "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ + +#ifdef CONFIG_NAND_BOOT +#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " +#else +#define MFG_NAND_PARTITION "" +#endif +#define FEC0_RESET IMX_GPIO_NR(2, 5) +#define FEC0_PDOMAIN "conn_enet0" + +#define CONFIG_MFG_ENV_SETTINGS \ + "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + MFG_NAND_PARTITION \ + "clk_ignore_unused "\ + "\0" \ + "initrd_addr=0x83800000\0" \ + "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + M4_BOOT_ENV \ + "script=boot.scr\0" \ + "image=Image\0" \ + "panel=NULL\0" \ + "console=ttyLP0\0" \ + "fdt_addr=0x83000000\0" \ + "boot_fdt=try\0" \ + "fdt_file=imx8qm-cgt-qmx8.dtb\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ + +/* Serial */ +#define CONFIG_BAUDRATE 115200 + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_MXC_PHYADDR -1 +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __CGTQMX8_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6a..4f2f323 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif @@ -82,13 +80,6 @@ /* Various command support */ -/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL - /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 596e255..985bec8 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -31,69 +31,29 @@ #endif +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ "image=Image\0" \ + BOOTENV \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "console=ttymxc1,115200\0" \ - "fdt_addr=0x43000000\0" \ + "fdt_addr_r=0x43000000\0" \ "boot_fit=no\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if run loadfdt; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${loadaddr} ${image}; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi;" /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h new file mode 100644 index 0000000..3be9b8f --- /dev/null +++ b/include/configs/npi_imx6ull.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +#ifndef _NPI_IMX6ULL_H +#define _NPI_IMX6ULL_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* SPL options */ +#include "imx6_spl.h" + +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Size of malloc() poll */ +#define CONFIG_SYS_MALLOC_LEN SZ_2M + +/* Console configs */ +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +#define CONFIG_NETMASK 255.255.255.0 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* environment settings */ +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_NAND) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +/* NAND */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 + +#ifdef CONFIG_CMD_NET +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "eth0" +#endif + +#define CONFIG_IMX_THERMAL + +#define CONFIG_FEC_ENET_DEV 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0,115200n8\0" \ + "image=zImage\0" \ + "fdtfile=imx6ull-seeed-npi-dev-board.dtb\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "fdt_addr_r=0x82000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x87100000\0" \ + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x87000000\0" \ + "root=/dev/mmcblk0p2 rootwait\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(UBIFS, ubifs, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#endif /* _NPI_IMX6ULL_H */ diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h new file mode 100644 index 0000000..b9746b9 --- /dev/null +++ b/include/configs/o4-imx6ull-nano.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> */ + +#ifndef __O4_IMX6ULL_NANO_CONFIG_H +#define __O4_IMX6ULL_NANO_CONFIG_H + +#include "mx6_common.h" + +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#if IS_ENABLED(CONFIG_CMD_USB) +# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* CONFIG_CMD_USB */ + +#if IS_ENABLED(CONFIG_FEC_MXC) +# define CONFIG_FEC_XCV_TYPE RMII +#endif /* CONFIG_FEC_MXC */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mmcdev=0\0" \ + "mmcpart=2\0" \ + "mmcargs=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcpart} console=ttymxc0,${baudrate} panic=30\0" \ + "mmcboot=run mmcargs && ext4load mmc ${mmcdev}:${mmcpart} $loadaddr /boot/zImage && bootz $loadaddr - $fdtcontroladdr\0" \ + "bootcmd=run mmcboot\0" \ + "bootcmd_mfg=fastboot usb 0\0" + +#endif /* __O4_IMX6ULL_NANO_CONFIG_H */ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h new file mode 100644 index 0000000..50f0013 --- /dev/null +++ b/include/configs/smegw01.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 NXP Semiconductors + * Copyright (C) 2021 Fabio Estevam <festevam@denx.de> + * + * Configuration settings for the smegw01 board. + */ + +#ifndef __SMEGW01_CONFIG_H +#define __SMEGW01_CONFIG_H + +#include "mx7_common.h" +#include <imximage.h> + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) + +/* MMC Config*/ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdtfile=imx7d-smegw01.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "bootm_size=0x10000000\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "fi;\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#endif diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index e2a8178..7be5e5d 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,6 +16,8 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CONFIG_SYS_BOOTM_LEN SZ_64M + #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 diff --git a/include/dt-bindings/clock/imxrt1050-clock.h b/include/dt-bindings/clock/imxrt1050-clock.h index c174f90..f74dbbc 100644 --- a/include/dt-bindings/clock/imxrt1050-clock.h +++ b/include/dt-bindings/clock/imxrt1050-clock.h @@ -52,7 +52,7 @@ #define IMXRT1050_CLK_USDHC2 43 #define IMXRT1050_CLK_LPUART1 44 #define IMXRT1050_CLK_SEMC 45 -#define IMXRT1050_CLK_LCDIF 46 +#define IMXRT1050_CLK_LCDIF_APB 46 #define IMXRT1050_CLK_PLL1_ARM 47 #define IMXRT1050_CLK_PLL2_SYS 48 #define IMXRT1050_CLK_PLL3_USB_OTG 49 @@ -60,6 +60,8 @@ #define IMXRT1050_CLK_PLL5_VIDEO 51 #define IMXRT1050_CLK_PLL6_ENET 52 #define IMXRT1050_CLK_PLL7_USB_HOST 53 -#define IMXRT1050_CLK_END 54 +#define IMXRT1050_CLK_LCDIF_PIX 54 +#define IMXRT1050_CLK_USBOH3 55 +#define IMXRT1050_CLK_END 56 #endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */ |