diff options
Diffstat (limited to 'include')
284 files changed, 168 insertions, 1323 deletions
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 35560ab..afd7cc8 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -34,6 +34,5 @@ #define CONFIG_SYS_SDRAM_BASE 0xc8000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 69fa1c1..ad7bd13 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -29,6 +29,5 @@ #define CONFIG_SYS_SDRAM_BASE 0xD0000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ #endif /* __CONFIG_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 6c6469b..25c3f22 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -70,8 +70,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 5411641..f200d70 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -75,8 +75,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 42c62b4..9ff66d7 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -62,8 +62,6 @@ #define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ #endif -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 75278f4..f7bfe59 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -82,8 +82,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_MONITOR_LEN 0x40000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 356ad3e..dcd8365 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -77,8 +77,6 @@ #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 35ff267..9012794 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -79,8 +79,6 @@ #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 900b0b5..e191dc6 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -80,8 +80,6 @@ #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 4f82389..79a4e61 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -84,8 +84,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index a6c953f..47ea51c 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -78,8 +78,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -95,7 +93,6 @@ #endif #ifdef CONFIG_CMD_NAND -# define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index f519bef..a2e36cc 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -80,8 +80,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -96,7 +94,6 @@ # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif -# define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 1826a6f..b080933 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -56,8 +56,6 @@ #define CONFIG_SERVERIP 192.168.0.1 #define CONFIG_NETMASK 255.0.0.0 -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ - /* Miscellaneous configurable options */ /* Definitions for initial stack pointer and data area (in DPRAM) */ @@ -76,7 +74,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) -#define CONFIG_SYS_MONITOR_LEN (320 << 10) /* Environment Configuration */ @@ -85,7 +82,6 @@ /* Ethernet configuration part */ /* NAND configuration part */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x0C000000 #endif /* __CONFIG_H */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index edf9b34..bb93c28 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -126,12 +126,9 @@ * The reserved memory */ -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ - /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ @@ -217,16 +214,9 @@ #endif #endif -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR #endif /* diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0951931..b241939 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -229,14 +229,11 @@ #define CADMUS_BASE_ADDR_PHYS CADMUS_BASE_ADDR #endif -#define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -331,13 +328,6 @@ #endif /* CONFIG_TSEC_ENET */ /* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 8492a64..addb306 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -202,7 +202,6 @@ extern unsigned long get_sdram_size(void); #endif #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_TARGET_P1010RDB_PA) /* NAND Flash Timing Params */ @@ -297,14 +296,11 @@ extern unsigned long get_sdram_size(void); FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - /* * Config the L2 Cache as L2 SRAM */ @@ -312,18 +308,15 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #else #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #endif #endif @@ -399,7 +392,7 @@ extern unsigned long get_sdram_size(void); #endif /* CONFIG_TSEC_ENET */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* @@ -411,9 +404,6 @@ extern unsigned long get_sdram_size(void); #endif #endif -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \ || defined(CONFIG_FSL_SATA) #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 0ac7f16..08c1bcc 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -59,8 +59,6 @@ #else #define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR #endif -#define CONFIG_SYS_L3_SIZE (1024 << 10) -#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_DCSRBAR 0xf0000000 @@ -121,7 +119,6 @@ #endif #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* NAND flash config */ #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ @@ -145,7 +142,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf @@ -163,8 +159,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - /* Serial Port - controlled on board with jumper J8 * open - index 2 * shorted - index 1 @@ -313,14 +307,8 @@ #define CONFIG_SYS_TBIPA_VALUE 8 #endif -/* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index e42e6d5..9629d73 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -34,8 +34,6 @@ * U-Boot bootcode configuration */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ - #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ /* size in bytes reserved for initial data */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 8926c26..67e42b9 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -34,8 +34,6 @@ * U-Boot bootcode configuration */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 14f0ce60..62c4177 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -104,7 +104,6 @@ * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE (256 << 10) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #ifdef CONFIG_PHYS_64BIT @@ -237,7 +236,6 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -279,7 +277,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf @@ -297,8 +294,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -370,7 +365,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* Qman/Bman */ @@ -429,12 +424,6 @@ */ /* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index fad9594..ad8037e 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -78,7 +78,6 @@ * (CONFIG_SYS_INIT_L3_VADDR) will be different. */ #define CONFIG_SYS_INIT_L3_VADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE 256 << 10 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 @@ -213,7 +212,6 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -255,7 +253,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -267,8 +264,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - /* Serial Port - controlled on board with jumper J8 * open - index 2 * shorted - index 1 @@ -351,7 +346,7 @@ */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* Qman/Bman */ @@ -418,12 +413,6 @@ #endif /* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 285e5fc..2dcaeda 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -76,7 +76,6 @@ * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE (512 << 10) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 @@ -201,7 +200,6 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -259,7 +257,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -269,7 +266,6 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* * Serial Port @@ -406,7 +402,6 @@ #define CONFIG_SYS_PMAN #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN /* RMan */ -#define CONFIG_SYS_INTERLAKEN #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -427,7 +422,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* @@ -435,12 +430,6 @@ */ /* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 7fe499b..223c8567 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -71,7 +71,6 @@ * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE (512 << 10) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 @@ -177,7 +176,6 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -219,7 +217,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -229,7 +226,6 @@ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* * Serial Port @@ -360,7 +356,6 @@ #define CONFIG_SYS_PMAN #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN /* RMan */ -#define CONFIG_SYS_INTERLAKEN #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -384,7 +379,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 0dde24e..12edfdd 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -52,7 +52,6 @@ * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE (512 << 10) #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #define CONFIG_SYS_DCSRBAR 0xf0000000 @@ -75,7 +74,6 @@ /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -87,8 +85,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - /* Serial Port - controlled on board with jumper J8 * open - index 2 * shorted - index 1 @@ -136,12 +132,6 @@ #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull /* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* * Miscellaneous configurable options */ @@ -243,7 +233,6 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -367,7 +356,6 @@ #define CONFIG_SYS_PMAN #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN -#define CONFIG_SYS_INTERLAKEN #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -394,7 +382,7 @@ */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index bd7e2f1..8eefaf2 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -193,24 +193,6 @@ #endif /* - * Default to using SPI for environment, etc. - * 0x000000 - 0x020000 : SPL (128KiB) - * 0x020000 - 0x0A0000 : U-Boot (512KiB) - * 0x0A0000 - 0x0BFFFF : First copy of U-Boot Environment (128KiB) - * 0x0C0000 - 0x0DFFFF : Second copy of U-Boot Environment (128KiB) - * 0x0E0000 - 0x442000 : Linux Kernel - * 0x442000 - 0x800000 : Userland - */ -#if defined(CONFIG_SPI_BOOT) -/* SPL related */ -#elif defined(CONFIG_EMMC_BOOT) -#define CONFIG_SYS_MMC_MAX_DEVICE 2 -#endif - -/* Network. */ -/* Enable Atheros phy driver */ - -/* * NOR Size = 16 MiB * Number of Sectors/Blocks = 128 * Sector Size = 128 KiB diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 9cfae04..e0f5f2b 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -89,7 +89,6 @@ /* **** PISMO SUPPORT *** */ /* on one chip */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 3f3b399..2bda66f 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -40,7 +40,6 @@ /* amcore design has flash data bytes wired swapped */ #define CONFIG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ -#define CONFIG_SYS_MONITOR_LEN ((128 - 4) * 1024) #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index c9f876f..e2e491b 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -9,7 +9,7 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 @@ -61,7 +61,7 @@ /* Link Definitions */ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 8f33894..192c9cf 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 3 /* Network */ #define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 8997c6a..1f2b3b5 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -26,7 +26,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0 @@ -412,7 +412,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index adfadd7..58635df 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -46,9 +46,6 @@ */ #ifdef CONFIG_RAM #define CONFIG_MONITOR_IS_IN_RAM -#define ENABLE_JFFS 0 -#else -#define ENABLE_JFFS 1 #endif /* I2C */ @@ -192,7 +189,6 @@ #define CONFIG_SYS_FLASH_BASE 0x00000000 /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* * For booting Linux, the board info and command line data @@ -210,14 +206,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*) -#if ENABLE_JFFS -/* JFFS Partition offset set */ -#define CONFIG_SYS_JFFS2_FIRST_BANK 0 -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 -/* 512k reserved for u-boot */ -#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 -#endif - /* Cache Configuration */ #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index ca5815f..d51da9d 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -43,7 +43,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 5576a5f..5dc8f21 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -24,7 +24,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD22 */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 02d04d0..d31a774 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -34,9 +34,6 @@ #define PHYS_FLASH_1 0x10000000 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_SEC 1:0-3 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - /* Address and size of Primary Environment Sector */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -153,7 +150,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2d257c4..0108547 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -20,7 +20,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ @@ -32,8 +31,6 @@ #endif -#define CONFIG_SYS_MONITOR_LEN 0x80000 - #ifdef CONFIG_SD_BOOT #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index f2ca4f3..00f5774 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -21,7 +21,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) @@ -36,8 +35,6 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20953f03 #define CONFIG_SYS_MCKR 0x1301 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index bc687fc..c60c248 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -25,7 +25,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 0e76658..71a2863 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -27,7 +27,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ @@ -40,8 +39,6 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 #define CONFIG_SYS_MCKR 0x1301 diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index 0198051..b347125 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/bcm963158.h b/include/configs/bcm963158.h index f473963..b15c411 100644 --- a/include/configs/bcm963158.h +++ b/include/configs/bcm963158.h @@ -8,8 +8,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif diff --git a/include/configs/bcm96855.h b/include/configs/bcm96855.h index ba2d8a3..6e420f2 100644 --- a/include/configs/bcm96855.h +++ b/include/configs/bcm96855.h @@ -8,8 +8,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif diff --git a/include/configs/bcm96856.h b/include/configs/bcm96856.h index 3050cf3..a7ae71e 100644 --- a/include/configs/bcm96856.h +++ b/include/configs/bcm96856.h @@ -8,8 +8,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif diff --git a/include/configs/bcm96858.h b/include/configs/bcm96858.h index 8bd1169..4e584b4 100644 --- a/include/configs/bcm96858.h +++ b/include/configs/bcm96858.h @@ -8,8 +8,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index b3e1fdd..ca2bc19 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -51,7 +51,6 @@ #include <linux/sizes.h> /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define IMX_FEC1_BASE ENET1_BASE_ADDR diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 959c521..0b1fc91 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -21,8 +21,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -#undef CONFIG_SYS_LOADS_BAUD_CHANGE - /* FLASH */ #if !defined(CONFIG_MTD_NOR_FLASH) #define CONFIG_SH_QSPI_BASE 0xE6B10000 diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index c1c1b37..bad1439 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -6,6 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm6838.h> -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 6b1e82a..c4110f8 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -14,9 +14,6 @@ /* SPL config */ #ifdef CONFIG_SPL_BUILD - -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) - #define CONFIG_MALLOC_F_ADDR 0x00120000 #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 6ac8487..c395384 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -12,8 +12,6 @@ #include <asm/arch/imx-regs.h> #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) - #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 @@ -22,7 +20,7 @@ /* Flat Device Tree Definitions */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 @@ -111,7 +109,7 @@ /* Link Definitions */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/cherryhill.h b/include/configs/cherryhill.h index 6c7f9ea..726c43d 100644 --- a/include/configs/cherryhill.h +++ b/include/configs/cherryhill.h @@ -8,8 +8,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (2 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/ci20.h b/include/configs/ci20.h index d094fb5..63dac1d 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -10,7 +10,6 @@ #define __CONFIG_CI20_H__ /* Memory configuration */ -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 1043eb7..cbf8534 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -92,9 +92,9 @@ /* MMC Config*/ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* USB Configs */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index cbba726..874c0eb 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -15,8 +15,8 @@ /* Machine config */ /* MMC */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR @@ -129,7 +129,6 @@ /* NAND */ #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* APBH DMA is required for NAND support */ /* Ethernet */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 50cb2a4..f0fbbe2 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -46,7 +46,6 @@ #define CONFIG_HSMMC2_8BIT #include <configs/ti_armv7_omap.h> -#undef CONFIG_SYS_MONITOR_LEN #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) @@ -74,7 +73,6 @@ "bootz ${loadaddr} - ${fdtaddr}\0" /* SPL defines. */ -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* EEPROM */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 898ca96..52000b5 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -170,8 +170,6 @@ enter a valid image address in flash */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 321edab..d7e181b 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -18,8 +18,8 @@ /* ENET1 */ /* MMC Config */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 1 #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -122,7 +122,6 @@ #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */ #define CONFIG_SYS_NAND_BASE -1 #endif diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 5d6449c..d641fbf 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -10,7 +10,7 @@ #include <linux/sizes.h> #include <linux/stringify.h> -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 @@ -94,7 +94,7 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index d8b8736..14fdf5b 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ /* Host */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index b8d0dc9..7380440 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -14,11 +14,11 @@ #include "mx7_common.h" /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #elif CONFIG_TARGET_COLIBRI_IMX7_EMMC -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_IPADDR 192.168.10.2 @@ -166,7 +166,6 @@ #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES #endif diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 73d1844..b758086 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define UBOOT_UPDATE \ "update_uboot=nand erase.part u-boot && " \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 268afbb..0f6f99d 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -15,7 +15,6 @@ #include <linux/sizes.h> /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index a46b394..e8b0724 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -6,6 +6,3 @@ #include <configs/bmips_common.h> #include <configs/bmips_bcm63268.h> -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 6e819ad..823d37f 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 23c493b..f730043 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -15,8 +15,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h deleted file mode 100644 index 434da31..0000000 --- a/include/configs/corenet_ds.h +++ /dev/null @@ -1,365 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2009-2012 Freescale Semiconductor, Inc. - * Copyright 2020-2021 NXP - */ - -/* - * Corenet DS style board configuration file - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/stringify.h> - -#include "../board/freescale/common/ics307_clk.h" - -#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#endif - -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -/* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#endif - -/* High Level Configuration Options */ - -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc -#endif - -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ - -/* - * Config the L3 Cache as L3 SRAM - */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE) -#else -#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR -#endif -#define CONFIG_SYS_L3_SIZE (1024 << 10) -#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) - -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull -#endif - -/* - * DDR Setup - */ -#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define SPD_EEPROM_ADDRESS1 0x51 -#define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ - -/* - * Local Bus Definitions - */ - -/* Set the local bus clock 1/8 of platform clock */ -#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 - -#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* Start of PromJet */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull -#else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -#endif - -#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ -#ifdef CONFIG_PHYS_64BIT -#define PIXIS_BASE_PHYS 0xfffdf0000ull -#else -#define PIXIS_BASE_PHYS PIXIS_BASE -#endif - -#define PIXIS_LBMAP_SWITCH 7 -#define PIXIS_LBMAP_MASK 0xf0 -#define PIXIS_LBMAP_SHIFT 4 -#define PIXIS_LBMAP_ALTBANK 0x40 - -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - -/* Nand Flash */ -#ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BASE 0xffa00000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull -#else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -#endif - -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* NAND flash config */ -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ - | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ - | BR_PS_8 /* Port Size = 8 bit */ \ - | BR_MS_FCM /* MSEL = FCM */ \ - | BR_V) /* valid */ -#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ - | OR_FCM_PGS /* Large Page*/ \ - | OR_FCM_CSCT \ - | OR_FCM_CST \ - | OR_FCM_CHT \ - | OR_FCM_SCY_1 \ - | OR_FCM_TRLX \ - | OR_FCM_EHTR) -#endif /* CONFIG_NAND_FSL_ELBC */ - -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} - -#define CONFIG_HWCONFIG - -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR -/* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#else -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS -#endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - -/* Serial Port - controlled on board with jumper J8 - * open - index 2 - * shorted - index 1 - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) - -/* I2C */ - -/* - * RapidIO - */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull -#else -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 -#endif -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ - -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull -#else -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 -#endif -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ - -/* - * for slave u-boot IMAGE instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull -/* - * for slave UCODE and ENV instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ - -/* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ - -/* - * SRIO_PCIE_BOOT - SLAVE - */ -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) -#endif - -/* - * eSPI - Enhanced SPI - */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ - -/* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull - -/* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull - -/* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull - -/* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull - -/* Qman/Bman */ -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#else -#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE -#endif -#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull -#else -#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE -#endif -#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME - -#ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c -#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d -#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x1e -#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f -#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 - -#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c -#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d -#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e -#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f -#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 - -#define CONFIG_SYS_TBIPA_VALUE 8 -#endif - -/* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#endif - -/* - * Miscellaneous configurable options - */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ - -/* - * Environment Configuration - */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ - -#ifdef CONFIG_TARGET_P4080DS -#define __USB_PHY_TYPE ulpi -#else -#define __USB_PHY_TYPE utmi -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=cs0_cs1;" \ - "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ - "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ - "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ - "tftpflash=tftpboot $loadaddr $uboot && " \ - "protect off $ubootaddr +$filesize && " \ - "erase $ubootaddr +$filesize && " \ - "cp.b $loadaddr $ubootaddr $filesize && " \ - "protect on $ubootaddr +$filesize && " \ - "cmp.b $loadaddr $ubootaddr $filesize\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ - "ramdiskfile=p4080ds/ramdisk.uboot\0" \ - "fdtaddr=1e00000\0" \ - "fdtfile=p4080ds/p4080ds.dtb\0" \ - "bdev=sda3\0" - -#include <asm/fsl_secure_boot.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 5e43c21..0596afb 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -37,7 +37,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index 3537561..efd0b77 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -8,8 +8,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (2 << 20) - #define CONFIG_SMSC_SIO1007 #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 4c11808..e8a8af7 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_SMSC_LPC47M #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 58c9024..281cbe3 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -107,14 +107,12 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 #undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 36052fe..6079596 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -15,9 +15,9 @@ /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #else -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #ifdef CONFIG_CMD_NET @@ -35,7 +35,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* I2C configs */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 66fb25b..4236612 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -36,7 +36,6 @@ * NAND controller */ #define CONFIG_SYS_NAND_BASE SLC_NAND_BASE -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } /* @@ -86,7 +85,6 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE /* See common/spl/spl.c spl_set_header_raw_uboot() */ -#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE /* * Include SoC specific configuration diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 53ed7de..4297047 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #ifndef CONFIG_INTERNAL_UART /* Use BayTrail internal HS UART which is memory-mapped */ #undef CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 2040deb..54b2192 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -27,8 +27,8 @@ /* Miscellaneous configurable options */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 3 /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/display5.h b/include/configs/display5.h index c23a57e..eb65f17 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -42,8 +42,8 @@ #define CONFIG_I2C_MULTI_BUS /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 79cacd7..aaa2ef0 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -74,8 +74,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 -#define CONFIG_SYS_MONITOR_LEN 0x20000 - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/edison.h b/include/configs/edison.h index 34536ec..b05141a 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -12,9 +12,4 @@ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - -/* RTC */ -#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 - #endif diff --git a/include/configs/efi-x86_payload.h b/include/configs/efi-x86_payload.h index 59fad4c..f50c2ce 100644 --- a/include/configs/efi-x86_payload.h +++ b/include/configs/efi-x86_payload.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 7fc3459..affe20a 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -17,8 +17,8 @@ #endif /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* PMIC */ #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 7526d3b..555239b 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -22,7 +22,7 @@ #define CONFIG_MXC_USB_FLAGS 0 /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -36,11 +36,11 @@ #if defined(CONFIG_ENV_IS_IN_MMC) /* RiOTboard */ #define CONFIG_FDTFILE "imx6dl-riotboard.dtb" -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ #define CONFIG_FDTFILE "imx6q-marsboard.dtb" -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* Framebuffer */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 7923fbb..75322a3 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -45,8 +45,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -#undef CONFIG_SYS_MAX_NAND_DEVICE -#define CONFIG_SYS_MAX_NAND_DEVICE 3 #define CONFIG_SYS_NAND_BASE2 (0x18000000) /* physical address */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ CONFIG_SYS_NAND_BASE2} diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 7a3c800..22647ab 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -37,7 +37,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 054cb53..81f450c 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -21,8 +21,6 @@ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - /* Common environment variables */ #define ENV_ITB \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 49f57dd..545408a 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - /* ns16550 UART is memory-mapped in Quark SoC */ #undef CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 635d0f0..52b9fe2 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* NAND flash */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ @@ -34,8 +33,6 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 #define CONFIG_SYS_MCKR 0x1301 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index e592dc4..fa6f0e6 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -25,12 +25,9 @@ * The reserved memory */ -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ - /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ @@ -44,13 +41,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} /* - * Environment - */ - -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index ab8c66f..d519384 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -100,7 +100,7 @@ /* environment organization */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index fb69716..d2138c2 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index bba64af..a9ef35e 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -20,10 +20,9 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* * PCI express diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 879bd5c..fe4b02c 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -24,7 +24,6 @@ #endif /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND (which is 512M), aligned to start of last sector */ diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index bdc9c47..973df8e 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -39,6 +39,5 @@ BOOTENV /* TODO: Remove this once the SD clock is fixed */ -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 1024 #endif /* __HIKEY_H */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 6ebdc3d..232f786 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -81,7 +81,6 @@ #define PHYS_FLASH_1 0xc0000000 /* Flash Base for U-Boot */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */ /* Address and size of Redundant Environment Sector */ /* @@ -97,7 +96,6 @@ * NAND */ #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0xd8000000 #define CONFIG_MXC_NAND_HWECC diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index fa73cab..f52367c 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -126,7 +126,6 @@ /* NAND */ #ifdef CONFIG_NAND_MXS -# define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE 0x40000000 # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 9ab3f8a..008fc07 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -18,8 +18,8 @@ #include "mx6_common.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Ethernet Configs */ @@ -116,7 +116,6 @@ /* Environment organization */ /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 488b2f1..3afe418 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -9,9 +9,6 @@ #ifdef CONFIG_SPL /* MMC support */ -#if defined(CONFIG_SPL_MMC) -#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ -#endif /* SATA support */ #if defined(CONFIG_SPL_SATA) diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 201684b..5025ad9 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -94,17 +94,17 @@ #include "imx6_spl.h" #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #ifdef CONFIG_SYS_BOOT_EMMC /* Boot from eMMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 1 +#define CFG_SYS_FSL_ESDHC_ADDR 1 #else /* Boot from SD-card */ -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 +# define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 50885c5..46a96f1 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x20000000 diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index f0f800b..caa6a11 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -74,8 +74,8 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index 5900c05..362b980 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -13,9 +13,6 @@ #ifdef CONFIG_SPL /* MMC support */ -#if defined(CONFIG_SPL_MMC) -#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ -#endif #endif /* CONFIG_SPL */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index c69f2fa..917d567 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -134,8 +133,8 @@ /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 79ed397..8e08899 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index a5b7e9f..dd9f93f 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_1M - #ifdef CONFIG_SPL_BUILD #define CONFIG_MALLOC_F_ADDR 0x930000 @@ -33,8 +31,8 @@ #define PHY_ANEG_TIMEOUT 20000 /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index dac642e..f1d1c1c 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define UBOOT_ITB_OFFSET 0x57C00 #define FSPI_CONF_BLOCK_SIZE 0x1000 #define UBOOT_ITB_OFFSET_FSPI \ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 6b7f3af..9cdba70 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -10,7 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -49,7 +48,7 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MM_ICORE_MX8MM_H */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 1301560..dadc829 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 6faecbd..f6634c8 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h index c6b2962..a2323bd 100644 --- a/include/configs/imx8mn_bsh_smm_s2.h +++ b/include/configs/imx8mn_bsh_smm_s2.h @@ -43,7 +43,6 @@ #define PHYS_SDRAM_SIZE SZ_256M /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x20000000 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index a371c5b..d6959ac 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_bsh_smm_s2pro.h b/include/configs/imx8mn_bsh_smm_s2pro.h index 37fda66..035e5c7 100644 --- a/include/configs/imx8mn_bsh_smm_s2pro.h +++ b/include/configs/imx8mn_bsh_smm_s2pro.h @@ -30,6 +30,6 @@ #define PHYS_SDRAM_SIZE SZ_512M /* USDHC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MN_BSH_SMM_S2PRO_H */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index ae7fcb1..9c75e3e 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index c8604e0..a484d91 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -52,6 +51,6 @@ #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ /* USDHC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MN_VAR_SOM_H */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index c43c4da..940e32c 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 4b4731c..bf87825 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_1M - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 @@ -27,8 +25,8 @@ #define FEC_QUIRK_ENET_MAC /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=run bootcmd ; reset\0" \ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 140eba3..1b533e2 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index 28d4416..7986d20 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -11,7 +11,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index ddc035a..5be4609 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,7 +12,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* GUIDs for capsule updatable firmware images */ @@ -42,10 +41,6 @@ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 4 -#ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ -#endif - #define PHY_ANEG_TIMEOUT 20000 #endif @@ -155,8 +150,8 @@ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_FSL_FSPI #define FSL_FSPI_FLASH_SIZE SZ_32M @@ -171,7 +166,6 @@ #ifdef CONFIG_NAND_MXS /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x20000000 #endif /* CONFIG_NAND_MXS */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 455f5a8..ef507c3 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index ab74d5b..4b2107e 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 @@ -58,7 +56,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index ea43056..2d4c8d7 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 @@ -64,7 +62,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 97bd504..1905e53 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -9,8 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 @@ -96,7 +94,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 5f9d06e..7f6d59d 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) - #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 308f17f..67f19bc 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -11,7 +11,7 @@ #include <asm/arch/imx-regs.h> #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 @@ -106,7 +106,7 @@ * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, * USDHC2 is for SD, USDHC3 is for SD on base board */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index f8ec16e..567351f 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -11,8 +11,6 @@ #include <asm/arch/imx-regs.h> #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) - #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CONFIG_MALLOC_F_ADDR 0x00120000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index ebfc166..7bf0ce7 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index f9750da..b281466 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -132,7 +131,7 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG3_BASE_ADDR diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 7b9a5b1..bf09510 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -26,6 +26,5 @@ * Miscellaneous configurable options */ #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ -#define CONFIG_SYS_MONITOR_LEN 0x00100000 #endif /* __CONFIG_H */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 1bfc89b..35cf27a 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -15,9 +15,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } -#define CONFIG_LOADS_ECHO -#define CONFIG_SYS_LOADS_BAUD_CHANGE - #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ "actual_bank=0\0" diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 04192d8..181ed1b 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -26,12 +26,10 @@ #define CONFIG_SYS_FLASH_BASE 0xF0000000 /* Reserve 768 kB for Mon */ -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ /* @@ -61,7 +59,6 @@ #if defined(CONFIG_CMD_NAND) #define CONFIG_NAND_KMETER1 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE #endif diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 43471e0..0613b77 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -119,7 +119,6 @@ #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } /* QRIO FPGA Definitions */ @@ -155,7 +154,6 @@ /* * I2C */ -#define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_MAX_HOPS 1 @@ -179,8 +177,6 @@ #define CONFIG_LS102XA_STREAM_ID -#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */ - /* * Environment */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 1b19001..2e1459e 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -154,7 +154,6 @@ * Config the L3 Cache as L3 SRAM */ #define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_L3_SIZE 256 << 10 #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull @@ -278,7 +277,6 @@ /* More NAND Flash Params */ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* QRIO on IFC CS2 */ #define CONFIG_SYS_QRIO_BASE 0xfb000000 @@ -314,7 +312,6 @@ #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -326,8 +323,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */ - /* * Serial Port - controlled on board with jumper J8 * open - index 2 diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index b9d20c9..d6b60d8 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -11,7 +11,6 @@ #define CONFIG_HOSTNAME "kmcoge5ne" #define CONFIG_NAND_ECC_BCH #define CONFIG_NAND_KMETER1 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 3bf7970..d3447a8 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -45,8 +45,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_EXTRA_ENV_SETTINGS BOOTENV diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index d77e4b4..6acd2f7 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -7,8 +7,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K) - /* GUID for capsule updatable firmware image */ #define KONTRON_PITX_IMX8M_FIT_IMAGE_GUID \ EFI_GUID(0xc898e959, 0x5b1f, 0x4e6d, 0x88, 0xe0, \ @@ -72,7 +70,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index df46e58..38860bf 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -20,7 +20,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL @@ -32,15 +32,13 @@ /* generic timer */ /* early heap for SPL DM */ -#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE +#define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE /* serial port */ #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) - /* GUID for capsule updatable firmware image */ #define KONTRON_SL28_FIT_IMAGE_GUID \ EFI_GUID(0x86ebd44f, 0xfeb8, 0x466f, 0x8b, 0xb8, \ diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 389469a..dbd7d10 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -15,8 +15,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ @@ -27,7 +25,7 @@ #endif /* CONFIG_SPL_BUILD*/ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #define CONFIG_USBD_HS @@ -90,6 +88,6 @@ /* Monitor Command Prompt */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index a1fc056..a784002 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -20,7 +20,7 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 87eb10d..77f84e1 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -11,12 +11,12 @@ #include <linux/sizes.h> #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL /*SPI device */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index a0ff3b8..1b417c7 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -17,7 +17,7 @@ #define SYS_SDRAM_SIZE_1024 0x40000000 /* ENV */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index f418c8c..885774f 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -41,10 +41,6 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MONITOR_LEN 0x80000 -#endif - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 37b8cd7..926c858 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -10,16 +10,11 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MONITOR_LEN 0xc0000 -#endif - #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN 0x80000 #endif #define SPD_EEPROM_ADDRESS 0x51 @@ -107,7 +102,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif /* diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 157f218..fce9119 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -50,9 +50,6 @@ * size increases then increase this size in case of secure boot as * it uses raw U-Boot image instead of FIT image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 83c74b6..2c96b6f 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -53,9 +53,6 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 2442266..43dbeea 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -14,7 +14,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL @@ -57,7 +57,7 @@ "env exists secureboot && esbc_halt;" #define OCRAM_NONSECURE_SIZE 0x00010000 -#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 +#define CFG_SYS_FSL_QSPI_BASE 0x20000000 /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 9f146c4..8c19468 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -33,7 +33,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL @@ -54,9 +54,6 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_NXP_ESBC */ #endif @@ -76,9 +73,6 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 4158d15..d207e47 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -111,7 +111,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 4bfe4e3..206de7e 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -82,7 +82,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 26ce93a..7e1a724 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -33,7 +33,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL @@ -54,22 +54,13 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_NXP_ESBC */ #endif -#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) -#define CONFIG_SYS_MONITOR_LEN 0x100000 -#endif - /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE - -#define CONFIG_SYS_MONITOR_LEN 0xa0000 #endif /* GPIO */ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 2df5f3f..48408f2 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE /* IFC Timing Params */ @@ -74,7 +73,7 @@ /* * Environment */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index b411efd..037d462 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -127,7 +127,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 5d32957..7693493 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -50,7 +50,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE /* @@ -105,7 +104,7 @@ /* * Environment */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #define AQR105_IRQ_MASK 0x80000000 /* FMan */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 7d76170..73e4ac3 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -27,11 +27,11 @@ /* Link Definitions */ /* Link Definitions */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 +#define CFG_SYS_FSL_QSPI_BASE 0x20000000 #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* @@ -146,9 +146,6 @@ unsigned long long get_qixis_addr(void); * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_NXP_ESBC */ #endif diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 2d3351e..d50b76b 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -102,7 +102,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index d98ed39..4edf40b 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -86,7 +86,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index dc43ecb..53a3af1 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -18,7 +18,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL @@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #endif -#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #include <asm/arch/soc.h> diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index d02d7fc..1fa4aa3 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -103,7 +103,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 09484dc..e1c66c5 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -100,7 +100,6 @@ #define CONFIG_SYS_NAND_FTIM3 0x0 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index ed69b85..8b2b747 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -15,7 +15,7 @@ /* DDR */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CONFIG_SYS_SDRAM_SIZE 0x200000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -27,7 +27,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 03e1619..a20b41b 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -37,14 +37,13 @@ * MMC Driver */ #ifdef CONFIG_CMD_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* * NAND */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR @@ -66,7 +65,6 @@ */ #ifdef CONFIG_CMD_DATE #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_M41T11_BASE_YEAR 2000 #endif /* diff --git a/include/configs/malta.h b/include/configs/malta.h index ff70a59..30c2e41 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -13,8 +13,6 @@ #define CONFIG_MEMSIZE_IN_BYTES -#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 - /* * CPU Configuration */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 17986a0..69ca7c5 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* NOR 16-bit mode */ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index b35ba59..b90a84d 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index cffcd9d..9f913fa 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -52,7 +52,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -# define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ # define CONFIG_SYS_NAND_DBW_8 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 6bcae31..50c52f8 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" \ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 554c435..9b1ba36 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -15,13 +15,10 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x800000 -#define CONFIG_SYS_NONCACHED_MEMORY 0x100000 - /* MMC */ #define MMC_SUPPORTS_TUNING /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index f995399..fd8e30a 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -9,10 +9,6 @@ #ifndef __MT7622_H #define __MT7622_H -#include <linux/sizes.h> - -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 0cd8b08..73093f9 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -13,8 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Environment */ /* Preloader -> Uboot */ diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 22d11d0..668dc3c 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -13,8 +13,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Environment */ /* Defines for SPL */ diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h index 1f81b0b..9f26b0b 100644 --- a/include/configs/mt7981.h +++ b/include/configs/mt7981.h @@ -9,10 +9,6 @@ #ifndef __MT7981_H #define __MT7981_H -#include <linux/sizes.h> - -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h index 00e1c57..4fbd57a 100644 --- a/include/configs/mt7986.h +++ b/include/configs/mt7986.h @@ -9,10 +9,6 @@ #ifndef __MT7986_H #define __MT7986_H -#include <linux/sizes.h> - -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 5ff5541..d159416 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -9,10 +9,6 @@ #ifndef __MT8512_H #define __MT8512_H -#include <linux/sizes.h> - -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 6d47046..7cabbef 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -9,11 +9,6 @@ #ifndef __MT8518_H #define __MT8518_H -#include <linux/sizes.h> - -#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M - - /* DRAM definition */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 20e00ec..6d4fff3 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -61,8 +61,5 @@ /* * Common NAND configuration */ -#ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif #endif /* _MV_COMMON_H */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 5a956f0..5debd91 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -25,8 +25,6 @@ /* When runtime detection fails this is the default */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - /* USB ethernet */ /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index fbc9a04..95afb35 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -34,7 +34,7 @@ /* * MMC Configs * */ -#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index d58d153..7783563 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -17,7 +17,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* bootz: zImage/initrd.img support */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 60ec34c..3c9b2ad 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -14,7 +14,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 @@ -25,7 +25,7 @@ #define CONFIG_POWER_FSL #define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 -#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 +#define CFG_SYS_FSL_PMIC_I2C_ADDR 0x8 /* Command definition */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index cffbb64..bc90b95 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -14,7 +14,7 @@ #include "imx6_spl.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index bfcab1b..bc9fab1 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -13,7 +13,7 @@ #include "mx6_common.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_SUPPORT_EMMC_BOOT #define EMMC_ENV \ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index c76e7ea..61570b7 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -33,10 +33,9 @@ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR #endif -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 16f8858..49cd151 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -21,7 +21,7 @@ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #ifdef CONFIG_CMD_PCI #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 9f89093..26b97bd3 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -17,7 +17,7 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ @@ -98,6 +98,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index e9ccb99..44a5eef 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -89,8 +89,8 @@ /* Environment organization */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_IOMUX_LPSR diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index c878041..0d9764e 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -83,10 +83,9 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ @@ -101,6 +100,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 570e2ce..83779f0 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -115,7 +115,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* Network */ diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index ab56ea0..d0e3d3f 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -22,13 +22,13 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_NAND_MXS -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #else -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #endif diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 00cc547..604923e 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -20,8 +20,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index b96341a..2a97d2f 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -93,7 +93,6 @@ */ #ifdef CONFIG_NAND_MXS /* NAND stuff */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index fc15ed8..e861038 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -83,7 +83,6 @@ /* NAND */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 #endif diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 4162ee8..a777305 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -13,13 +13,13 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -30,7 +30,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index d507f8f..ec5339d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -16,8 +16,8 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 6 diff --git a/include/configs/novena.h b/include/configs/novena.h index 1696aa2..f2a04ca 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -43,8 +43,8 @@ /* I2C EEPROM */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* PCI express */ #ifdef CONFIG_CMD_PCI diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 217427a..ccc203f 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -13,13 +13,13 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_NETMASK 255.255.255.0 @@ -31,7 +31,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 25116c5..ab1eb78 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -19,8 +19,6 @@ "loadaddr=20080000\0" \ "ethrotate=yes\0" -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 - #if defined(CONFIG_MMC_OCTEONTX) #define MMC_SUPPORTS_TUNING /** EMMC specific defines */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 373eb91..38f99ab 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -42,12 +42,6 @@ /** Heap size for U-Boot */ -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192 - /** EMMC specific defines */ -#if defined(CONFIG_NAND_OCTEONTX) -#define CONFIG_SYS_MAX_NAND_DEVICE 8 -#endif - #endif /* __OCTEONTX_COMMON_H__ */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ad3dbbc..d46ca33 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -21,7 +21,6 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index c47d557..77629d7 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -26,7 +26,6 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 1af87b2..442a3ca 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -16,7 +16,6 @@ /* Board NAND Info. */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 13, 14, 16, 17, 18, 19, 20, 21, 22, \ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index c644768..4103930 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -105,14 +105,12 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 #undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 543a16f..778bf51 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -27,7 +27,6 @@ #define __SW_BOOT_NOR_BANK_UP 0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (256 << 10) #endif /* @@ -58,7 +57,6 @@ #define __SW_BOOT_NOR_BANK_UP 0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (256 << 10) /* * Dynamic MTD Partition support with mtdparts */ @@ -79,7 +77,6 @@ #define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ #define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ #define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ -#define CONFIG_SYS_L2_SIZE (512 << 10) /* * Dynamic MTD Partition support with mtdparts */ @@ -218,7 +215,6 @@ #endif #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ @@ -245,7 +241,6 @@ #endif #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf @@ -265,8 +260,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - #define CONFIG_SYS_CPLD_BASE 0xffa00000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_CPLD_BASE_PHYS 0xfffa00000ull @@ -419,15 +412,12 @@ #endif #endif -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - /* * USB */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 6e593da..dea8712 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -22,14 +22,14 @@ * Tweak the SPL text base address to avoid this. */ -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* Miscellaneous configurable options */ @@ -42,7 +42,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index ae81b8e..2bdae8a 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -16,7 +16,7 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Environment settings */ @@ -29,7 +29,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* I2C configs */ @@ -44,7 +44,6 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* USB Configs */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index a8cfec9..a04a03a 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -14,8 +14,6 @@ /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - /* if no target-specific extra environment settings were defined by the target, define an empty one */ #ifndef PCM052_EXTRA_ENV_SETTINGS diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index cff71df..0119090 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -15,7 +15,6 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* Enable NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 049d1d7..c98393b 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -11,7 +11,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index df17161..49cd9d4 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -10,7 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 9d796f9..4ea16d6 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -25,8 +25,6 @@ /* SDRAM Configuration (for final code, data, stack, heap) */ #define CONFIG_SYS_SDRAM_BASE 0x88000000 -#define CONFIG_SYS_MONITOR_LEN (192 << 10) - /* Memory Test */ /*---------------------------------------------------------------------- diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index dcbcd8d..687133b 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index c0d837d..d4f58b6 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -27,7 +27,7 @@ #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 7fbf2c3..159bf4c 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ @@ -113,7 +113,7 @@ /* Environment starts at 768k = 768 * 1024 = 786432 */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index d1cc1b9..17af19d 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -9,8 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 @@ -75,7 +73,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 9a4a632..09f0ed9 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 7f9442a..278f1b5 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -129,7 +129,6 @@ #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ /* NAND flash */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD22 */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 00d159f..7c23206 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -146,7 +146,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 69f3d06..35fd525 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -25,7 +25,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ @@ -44,8 +43,6 @@ /* Defines for SPL */ -#define CONFIG_SYS_MONITOR_LEN 0x80000 - #ifdef CONFIG_SD_BOOT #elif CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 90f548c..ebf5467 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -58,7 +58,6 @@ /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC - #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 5181792..9fc51fd 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -46,18 +46,10 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) - /* RTC */ #define CONFIG_RTC_PT7C4338 /* - * Environment - */ - -#define CONFIG_LOADS_ECHO /* echo on for serial download */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index ba843e3..5cd1388 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -22,8 +22,6 @@ #include <config_distro_bootcmd.h> #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index f0dfba3..ac39e11 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* Address of u-boot image in Flash */ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 2e54211..3a38e06 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -20,8 +20,6 @@ #define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) #define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - /* Timer */ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 9efda3e..7432cff 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -31,8 +31,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) -#define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) - /* ENV setting */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index f4b3481..81f16ed 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -19,8 +19,6 @@ #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 -#define CONFIG_SYS_MONITOR_LEN (600 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 712a47a..de4510a 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -121,8 +121,6 @@ #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ - /* FLASH and environment organization */ #define CONFIG_MMC_DEFAULT_DEV 0 diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index b9b56d9..70c6ec5 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -28,7 +28,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_MASK_ALE BIT(21) #define CONFIG_SYS_NAND_MASK_CLE BIT(22) diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 0eecb56..79f354d 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -16,6 +16,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index 178a6ad..de6c92e 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -21,6 +21,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index b18377b..ebdb392 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -28,6 +28,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 3b91e83..9281c7c 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -21,7 +21,6 @@ /* NAND Flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE BIT(21) diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index bbd7297..da2ae96 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -13,6 +13,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index fad65cb..eed688d 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -29,7 +29,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) @@ -40,7 +39,6 @@ /* SPL */ /* size of u-boot.bin to load */ -#define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) /* Falcon boot support on raw MMC */ /* U-Boot proper stored by default at 0x200 (256 KiB) */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index ccb3842..b05fa59 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -38,7 +38,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) @@ -48,6 +47,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index d5cd45c..c4552c2 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -17,7 +17,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x80000000 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) @@ -27,6 +26,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 411ed29..d719992 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -17,7 +17,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x80000000 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) @@ -27,6 +26,4 @@ /* SPL */ -#define CONFIG_SYS_MONITOR_LEN (512 << 10) - #endif diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index e6c200f..c7f03a1 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -29,7 +29,6 @@ /* NAND support */ /* Max number of NAND devices */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #include "tegra-common-post.h" diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5759794..87da5e4 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -368,8 +368,6 @@ #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ /* to access nand at */ /* CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND - devices */ #endif #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 802ed07..a77215d 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -54,7 +54,6 @@ */ /* NAND flash settings */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 1395b8d..ba562b2 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -84,8 +84,6 @@ * FLASH and environment organization */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ - /*----------------------------------------------------------------------- * Boot configuration */ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 681c831..faa13c6 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -15,7 +15,7 @@ #define PHYS_SDRAM_SIZE SZ_512M /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 59bba7d..c56fb37 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -30,7 +30,6 @@ /* NAND Flash */ #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index c3f30af..704a714 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -68,19 +68,9 @@ #define CONFIG_DW_WDT_CLOCK_KHZ 25000 /* - * MMC Driver - */ -#ifdef CONFIG_CMD_MMC -/* FIXME */ -/* using smaller max blk cnt to avoid flooding the limited stack we have */ -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */ -#endif - -/* * NAND Support */ #ifdef CONFIG_NAND_DENALI -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #endif diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 06198dd..86cc377 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -81,9 +81,6 @@ /* * SDMMC configurations */ -#ifdef CONFIG_CMD_MMC -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 -#endif /* * Flash configurations */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 762ba44..3c978f5 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -78,8 +78,6 @@ /* * Flash on the LocalBus */ -#define CONFIG_SYS_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */ - #define CONFIG_SYS_FLASH0 0xFE000000 #define CONFIG_SYS_FLASH1 0xFC000000 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 } @@ -92,24 +90,19 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */ - /* FPGA and NAND */ #define CONFIG_SYS_FPGA_BASE 0xc0000000 #define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* LIME GDC */ #define CONFIG_SYS_LIME_BASE 0xc8000000 -#define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ /* * General PCI @@ -140,13 +133,6 @@ /* Options are: TSEC[0,1] */ /* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* * Miscellaneous configurable options */ diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index 201f2c2..ee038d8 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -12,8 +12,6 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index eeee587..49672df 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -19,9 +19,9 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #endif /* CONFIG_FSL_USDHC */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index b0ec226..c7d6d93 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -33,7 +33,6 @@ "ramdisk_addr_r=0xC0438000\0" \ BOOTENV -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ CONFIG_SPL_PAD_TO) diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index 78089b9..07a5bfc 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -21,11 +21,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ SZ_256M -/*MMC SD*/ -#define CONFIG_SYS_MMC_MAX_DEVICE 2 - /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /*****************************************************************************/ #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 214901c..b809f93 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -21,11 +21,7 @@ */ #define CONFIG_SYS_BOOTMAPSZ SZ_256M -/*MMC SD*/ -#define CONFIG_SYS_MMC_MAX_DEVICE 3 - /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Ethernet need */ #ifdef CONFIG_DWC_ETH_QOS diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index d8a3348..ba49075 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -34,10 +34,6 @@ "sf write ${loadaddr} 0x00800000 ${filesize}\0" \ "" -/* Realtime clock */ -#define CONFIG_RTC_MCFRRTC -#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 - #define CONFIG_SYS_SBFHDR_SIZE 0x7 /* Input, PCI, Flexbus, and VCO */ @@ -72,7 +68,6 @@ #endif /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* * For booting Linux, the board info and command line data diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 12666b7..7207686 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -73,14 +73,11 @@ #ifdef CONFIG_NAND_SUNXI #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 -#define CONFIG_SYS_MAX_NAND_DEVICE 8 #endif /* mmc config */ #define CONFIG_MMC_SUNXI_SLOT 0 -#define CONFIG_SYS_MMC_MAX_DEVICE 4 - /* * Miscellaneous configurable options */ @@ -90,8 +87,6 @@ /* FLASH and environment organization */ -#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ - /* * We cannot use expressions here, because expressions won't be evaluated in * autoconf.mk. diff --git a/include/configs/taurus.h b/include/configs/taurus.h index a29652d..45780d9 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -54,7 +54,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) diff --git a/include/configs/tec.h b/include/configs/tec.h index 432ccbd..2377b47 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Environment in NAND, aligned to start of last sector */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 4e20e1d..69acabf 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -7,8 +7,6 @@ #ifndef __TEGRA_COMMON_POST_H #define __TEGRA_COMMON_POST_H -#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ - #if CONFIG_IS_ENABLED(CMD_USB) # define BOOT_TARGET_USB(func) func(USB, usb, 0) #else diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 159ba09..2915db7 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -28,13 +28,6 @@ */ #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -/* - * Common HW configuration. - * If this varies between SoCs later, move to tegraNN-common.h - * Note: This is number of devices, not max device ID. - */ -#define CONFIG_SYS_MMC_MAX_DEVICE 4 - #ifdef CONFIG_ARM64 #define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" #else diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index eaa19ee..af0a095 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -11,8 +11,6 @@ #ifndef __THEADORABLE_X86_COMMON_H #define __THEADORABLE_X86_COMMON_H -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 1aca83a..82add65 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -43,7 +43,6 @@ * access CS0 at is 0x8000000. */ #define CONFIG_SYS_NAND_BASE 0x8000000 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* NAND: SPL related configs */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 29a6038..6c01ab8 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -65,11 +65,9 @@ #define CONFIG_SYS_NAND_MASK_CLE 0x4000 #define CONFIG_SYS_NAND_MASK_ALE 0x2000 #define CONFIG_SYS_NAND_CS 2 -#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index 727c648..44706c7 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -19,7 +19,6 @@ #ifndef CONFIG_SYS_NAND_BASE #define CONFIG_SYS_NAND_BASE 0x8000000 #endif -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif /* Now for the remaining common defines */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 725a5a6..47f3c81 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -52,8 +52,6 @@ */ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_MONITOR_LEN (256 << 10) - /* SPL */ #ifdef CONFIG_MTD_RAW_NAND diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 7c77a8d..ab6cd06 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -28,8 +28,6 @@ #define PHYS_SDRAM_2 0x8080000000 #define PHYS_SDRAM_2_SIZE 0x180000000 -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 - #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x20000000\0" \ "load_addr=0xa0000000\0" \ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 9498dbe..2c58915 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -44,7 +44,7 @@ #endif /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h index f5a9f12..7eed31c 100644 --- a/include/configs/tuxx1.h +++ b/include/configs/tuxx1.h @@ -31,8 +31,4 @@ #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" -#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ - 0x0000c000 | \ - MxMR_WLFx_2X) - #endif /* __CONFIG_H */ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 03e5c04..8af5151 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -15,7 +15,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc1,115200\0" \ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index e30b6cc..093e2e8 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -15,7 +15,7 @@ #include "imx6_spl.h" /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Command definition */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index d9e95ab..32b47db 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -35,14 +35,11 @@ BOOT_TARGET_DEVICE_UBIFS(func) \ BOOT_TARGET_DEVICE_USB(func) -#define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */ - #if !defined(CONFIG_ARM64) /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 #endif -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index e0dde1c..44eaeda 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -33,7 +33,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 08a6f5f..c381934 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -20,7 +20,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* SD/MMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 1de0023..f513dad 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index ce72798..fea4329 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 7c0856a..5d77306 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -124,8 +124,6 @@ #define CONFIG_SYS_SERIAL0 V2M_UART0 #define CONFIG_SYS_SERIAL1 V2M_UART1 -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 - /* Miscellaneous configurable options */ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index c13f2ba..7e3d347 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -14,13 +14,12 @@ /* NAND support */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR /* Dynamic MTD partition support */ #endif -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 6eb022f..a4484fd 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -32,7 +32,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* PMIC */ #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 899b8ca..91c1f4b 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -15,8 +15,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/warp7.h b/include/configs/warp7.h index a9cc859..a4b12dc 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -14,7 +14,7 @@ #define PHYS_SDRAM_SIZE SZ_512M /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ @@ -90,7 +90,7 @@ /* environment organization */ -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index f53ea3c..a7c805c 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -42,7 +42,6 @@ */ /* driver configuration */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_CHIPS 1 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE @@ -64,7 +63,6 @@ /* SPL will use serial */ /* SPL will load U-Boot from NAND offset 0x40000 */ /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_TEXT_BASE */ -#define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE diff --git a/include/configs/x530.h b/include/configs/x530.h index cb12683..0add626 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -27,7 +27,6 @@ */ /* NAND */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define BBT_CUSTOM_SCAN #define BBT_CUSTOM_SCAN_PAGE 0 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 4109af7..ec87edd 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -6,8 +6,6 @@ #ifndef _X86_CHROMEBOOK_H #define _X86_CHROMEBOOK_H -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 42b2cb2..8e22d6e 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -19,12 +19,6 @@ #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 /*----------------------------------------------------------------------- - * Real Time Clock Configuration - */ -#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS - -/*----------------------------------------------------------------------- * Serial Configuration */ #define CONFIG_SYS_NS16550_PORT_MAPPED diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index f72f3e6..60f007a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -27,10 +27,6 @@ EFI_GUID(0xcf9ecfd4, 0x938b, 0x41c5, 0x85, 0x51, \ 0x1f, 0x88, 0x3a, 0xb7, 0xdc, 0x18) -#ifdef CONFIG_NAND_ARASAN -# define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif - /* Miscellaneous configurable options */ #if defined(CONFIG_ZYNQMP_USB) diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 0e43b37..fc8ec32 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -16,7 +16,7 @@ #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Miscellaneous configurable options */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index ad8ea65..58d01f4 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -50,11 +50,6 @@ #define CONFIG_SYS_SDRAM_BASE MEMADDR(0x00000000) /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */ -#ifdef CONFIG_XTFPGA_LX60 -# define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */ -#else -# define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */ -#endif /* Memory test is destructive so default must not overlap vectors or U-Boot*/ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index dc0cba0..6574cf9 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -40,10 +40,6 @@ # define CONFIG_FLASH_SHOW_PROGRESS 10 #endif -#ifdef CONFIG_NAND_ZYNQ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#endif - #ifdef CONFIG_USB_EHCI_ZYNQ # define DFU_DEFAULT_POLL_TIMEOUT 300 # define CONFIG_THOR_RESET_OFF @@ -199,9 +195,6 @@ /* Extend size of kernel image for uncompression */ -/* Boot FreeBSD/vxWorks from an ELF image */ -#define CONFIG_SYS_MMC_MAX_DEVICE 1 - /* Address in RAM where the parameters must be copied by SPL. */ /* Not using MMC raw mode - just for compilation purpose */ diff --git a/include/fm_eth.h b/include/fm_eth.h index bf95706..7475b51 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -51,18 +51,18 @@ enum fm_eth_type { */ #ifdef CONFIG_SYS_FMAN_V3 #ifdef CONFIG_TARGET_LS1046AFRWY -#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000) +#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfd000) #else -#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000) +#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfc000) #endif -#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000) +#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfd000) #if (CONFIG_SYS_NUM_FMAN == 2) -#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000) -#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfd000) +#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfc000) +#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfd000) #endif #else -#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xe1120) -#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000) +#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xe1120) +#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xf1000) #endif #define DEFAULT_FM_MDIO_NAME "FSL_MDIO0" @@ -84,7 +84,7 @@ enum fm_eth_type { .port = FM##idx##_DTSEC##n, \ .rx_port_id = RX_PORT_1G_BASE + n - 1, \ .tx_port_id = TX_PORT_1G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1]),\ } @@ -98,7 +98,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE2 + n - 1, \ .tx_port_id = TX_PORT_10G_BASE2 + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1]),\ } #else @@ -112,7 +112,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1+8]),\ } #else @@ -125,7 +125,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1+8]),\ } #endif @@ -141,7 +141,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE2 + n - 3, \ .tx_port_id = TX_PORT_10G_BASE2 + n - 3, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1-2]),\ } #endif @@ -156,7 +156,7 @@ enum fm_eth_type { .port = FM##idx##_DTSEC##n, \ .rx_port_id = RX_PORT_1G_BASE + n - 1, \ .tx_port_id = TX_PORT_1G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, mac_1g[n-1]),\ } @@ -169,7 +169,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, mac_10g[n-1]),\ } #endif diff --git a/include/fsl_sec.h b/include/fsl_sec.h index d57c4ca..d8861d1 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -272,7 +272,7 @@ struct sg_entry { #if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8) /* Job Ring Base Address */ -#define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) +#define JR_BASE_ADDR(x) (CFG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) /* Secure Memory Offset varies accross versions */ #define SM_V1_OFFSET 0x0f4 #define SM_V2_OFFSET 0xa00 @@ -287,7 +287,7 @@ struct sg_entry { /* JR Allocation Error */ #define SMCSJR_AERR (3 << 12) /* Secure memory partition 0 page 0 owner register */ -#define CAAM_SMPO_0 (CONFIG_SYS_FSL_SEC_ADDR + 0x1FBC) +#define CAAM_SMPO_0 (CFG_SYS_FSL_SEC_ADDR + 0x1FBC) /* Secure memory command register */ #define CAAM_SMCJR(v, jr) (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_CMD(v)) /* Secure memory command status register */ diff --git a/include/mk48t59.h b/include/mk48t59.h index 5d863ef..f95d349 100644 --- a/include/mk48t59.h +++ b/include/mk48t59.h @@ -11,9 +11,9 @@ #if defined(CONFIG_RTC_MK48T59) && defined(CONFIG_CMD_DATE) -#define RTC_PORT_ADDR0 CONFIG_SYS_ISA_IO + 0x70 +#define RTC_PORT_ADDR0 0x70 #define RTC_PORT_ADDR1 RTC_PORT_ADDR0 + 0x1 -#define RTC_PORT_DATA CONFIG_SYS_ISA_IO + 0x76 +#define RTC_PORT_DATA 0x76 /* RTC Offsets */ #define RTC_SECONDS 0x1FF9 diff --git a/include/mmc.h b/include/mmc.h index 027e8bc..571fa62 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -952,11 +952,6 @@ int mmc_get_env_dev(void); /* Minimum partition switch timeout in units of 10-milliseconds */ #define MMC_MIN_PART_SWITCH_TIME 30 /* 300 ms */ -/* Set block count limit because of 16 bit register limit on some hardware*/ -#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 -#endif - /** * mmc_get_blk_desc() - Get the block descriptor for an MMC device * diff --git a/include/post.h b/include/post.h index a07a6bc..ec03556 100644 --- a/include/post.h +++ b/include/post.h @@ -27,7 +27,7 @@ #elif defined (CONFIG_MPC85xx) #include <asm/immap_85xx.h> -#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \ +#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CFG_SYS_MPC85xx_PIC_OFFSET + \ offsetof(ccsr_pic_t, tfrr)) #endif diff --git a/include/w83c553f.h b/include/w83c553f.h deleted file mode 100644 index 2403e34..0000000 --- a/include/w83c553f.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - */ - - /* winbond access routines and defines*/ - -/* from the winbond data sheet - - The W83C553F SIO controller with PCI arbiter is a multi-function PCI device. - Function 0 is the ISA bridge, and Function 1 is the bus master IDE controller. -*/ - -/*ISA bridge configuration space*/ - -#define W83C553F_VID 0x10AD -#define W83C553F_DID 0x0565 - -#define WINBOND_PCICONTR 0x40 /*pci control reg*/ -#define WINBOND_SGBAR 0x41 /*scatter/gather base address reg*/ -#define WINBOND_LBCR 0x42 /*Line Buffer Control reg*/ -#define WINBOND_IDEIRCR 0x43 /*IDE Interrupt Routing Control Reg*/ -#define WINBOND_PCIIRCR 0x44 /*PCI Interrupt Routing Control Reg*/ -#define WINBOND_BTBAR 0x46 /*BIOS Timer Base Address Register*/ -#define WINBOND_IPADCR 0x48 /*ISA to PCI Address Decoder Control Register*/ -#define WINBOND_IRADCR 0x49 /*ISA ROM Address Decoder Control Register*/ -#define WINBOND_IPMHSAR 0x4a /*ISA to PCI Memory Hole STart Address Register*/ -#define WINBOND_IPMHSR 0x4b /*ISA to PCI Memory Hols Size Register*/ -#define WINBOND_CDR 0x4c /*Clock Divisor Register*/ -#define WINBOND_CSCR 0x4d /*Chip Select Control Register*/ -#define WINBOND_ATSCR 0x4e /*AT System Control register*/ -#define WINBOND_ATBCR 0x4f /*AT Bus ControL Register*/ -#define WINBOND_IRQBEE0R 0x60 /*IRQ Break Event Enable 0 Register*/ -#define WINBOND_IRQBEE1R 0x61 /*IRQ Break Event Enable 1 Register*/ -#define WINBOND_ABEER 0x62 /*Additional Break Event Enable Register*/ -#define WINBOND_DMABEER 0x63 /*DMA Break Event Enable Register*/ - -#define WINDOND_IDECSR 0x40 /*IDE Control/Status Register, Function 1*/ - -#define IPADCR_MBE512 0x1 -#define IPADCR_MBE640 0x2 -#define IPADCR_IPATOM4 0x10 -#define IPADCR_IPATOM5 0x20 -#define IPADCR_IPATOM6 0x40 -#define IPADCR_IPATOM7 0x80 - -#define CSCR_UBIOSCSE 0x10 -#define CSCR_BIOSWP 0x20 - -#define IDECSR_P0EN 0x01 -#define IDECSR_P0F16 0x02 -#define IDECSR_P1EN 0x10 -#define IDECSR_P1F16 0x20 -#define IDECSR_LEGIRQ 0x800 - -/* - * Interrupt controller - */ -#define W83C553F_PIC1_ICW1 CONFIG_SYS_ISA_IO + 0x20 -#define W83C553F_PIC1_ICW2 CONFIG_SYS_ISA_IO + 0x21 -#define W83C553F_PIC1_ICW3 CONFIG_SYS_ISA_IO + 0x21 -#define W83C553F_PIC1_ICW4 CONFIG_SYS_ISA_IO + 0x21 -#define W83C553F_PIC1_OCW1 CONFIG_SYS_ISA_IO + 0x21 -#define W83C553F_PIC1_OCW2 CONFIG_SYS_ISA_IO + 0x20 -#define W83C553F_PIC1_OCW3 CONFIG_SYS_ISA_IO + 0x20 -#define W83C553F_PIC1_ELC CONFIG_SYS_ISA_IO + 0x4D0 -#define W83C553F_PIC2_ICW1 CONFIG_SYS_ISA_IO + 0xA0 -#define W83C553F_PIC2_ICW2 CONFIG_SYS_ISA_IO + 0xA1 -#define W83C553F_PIC2_ICW3 CONFIG_SYS_ISA_IO + 0xA1 -#define W83C553F_PIC2_ICW4 CONFIG_SYS_ISA_IO + 0xA1 -#define W83C553F_PIC2_OCW1 CONFIG_SYS_ISA_IO + 0xA1 -#define W83C553F_PIC2_OCW2 CONFIG_SYS_ISA_IO + 0xA0 -#define W83C553F_PIC2_OCW3 CONFIG_SYS_ISA_IO + 0xA0 -#define W83C553F_PIC2_ELC CONFIG_SYS_ISA_IO + 0x4D1 - -#define W83C553F_TMR1_CMOD CONFIG_SYS_ISA_IO + 0x43 - -/* - * DMA controller - */ -#define W83C553F_DMA1 CONFIG_SYS_ISA_IO + 0x000 /* channel 0 - 3 */ -#define W83C553F_DMA2 CONFIG_SYS_ISA_IO + 0x0C0 /* channel 4 - 7 */ - -/* command/status register bit definitions */ - -#define W83C553F_CS_COM_DACKAL (1<<7) /* DACK# assert level */ -#define W83C553F_CS_COM_DREQSAL (1<<6) /* DREQ sense assert level */ -#define W83C553F_CS_COM_GAP (1<<4) /* group arbitration priority */ -#define W83C553F_CS_COM_CGE (1<<2) /* channel group enable */ - -#define W83C553F_CS_STAT_CH0REQ (1<<4) /* channel 0 (4) DREQ status */ -#define W83C553F_CS_STAT_CH1REQ (1<<5) /* channel 1 (5) DREQ status */ -#define W83C553F_CS_STAT_CH2REQ (1<<6) /* channel 2 (6) DREQ status */ -#define W83C553F_CS_STAT_CH3REQ (1<<7) /* channel 3 (7) DREQ status */ - -#define W83C553F_CS_STAT_CH0TC (1<<0) /* channel 0 (4) TC status */ -#define W83C553F_CS_STAT_CH1TC (1<<1) /* channel 1 (5) TC status */ -#define W83C553F_CS_STAT_CH2TC (1<<2) /* channel 2 (6) TC status */ -#define W83C553F_CS_STAT_CH3TC (1<<3) /* channel 3 (7) TC status */ - -/* mode register bit definitions */ - -#define W83C553F_MODE_TM_DEMAND (0<<6) /* transfer mode - demand */ -#define W83C553F_MODE_TM_SINGLE (1<<6) /* transfer mode - single */ -#define W83C553F_MODE_TM_BLOCK (2<<6) /* transfer mode - block */ -#define W83C553F_MODE_TM_CASCADE (3<<6) /* transfer mode - cascade */ -#define W83C553F_MODE_ADDRDEC (1<<5) /* address increment/decrement select */ -#define W83C553F_MODE_AUTOINIT (1<<4) /* autoinitialize enable */ -#define W83C553F_MODE_TT_VERIFY (0<<2) /* transfer type - verify */ -#define W83C553F_MODE_TT_WRITE (1<<2) /* transfer type - write */ -#define W83C553F_MODE_TT_READ (2<<2) /* transfer type - read */ -#define W83C553F_MODE_TT_ILLEGAL (3<<2) /* transfer type - illegal */ -#define W83C553F_MODE_CH0SEL (0<<0) /* channel 0 (4) select */ -#define W83C553F_MODE_CH1SEL (1<<0) /* channel 1 (5) select */ -#define W83C553F_MODE_CH2SEL (2<<0) /* channel 2 (6) select */ -#define W83C553F_MODE_CH3SEL (3<<0) /* channel 3 (7) select */ - -/* request register bit definitions */ - -#define W83C553F_REQ_CHSERREQ (1<<2) /* channel service request */ -#define W83C553F_REQ_CH0SEL (0<<0) /* channel 0 (4) select */ -#define W83C553F_REQ_CH1SEL (1<<0) /* channel 1 (5) select */ -#define W83C553F_REQ_CH2SEL (2<<0) /* channel 2 (6) select */ -#define W83C553F_REQ_CH3SEL (3<<0) /* channel 3 (7) select */ - -/* write single mask bit register bit definitions */ - -#define W83C553F_WSMB_CHMASKSEL (1<<2) /* channel mask select */ -#define W83C553F_WSMB_CH0SEL (0<<0) /* channel 0 (4) select */ -#define W83C553F_WSMB_CH1SEL (1<<0) /* channel 1 (5) select */ -#define W83C553F_WSMB_CH2SEL (2<<0) /* channel 2 (6) select */ -#define W83C553F_WSMB_CH3SEL (3<<0) /* channel 3 (7) select */ - -/* read/write all mask bits register bit definitions */ - -#define W83C553F_RWAMB_CH0MASK (1<<0) /* channel 0 (4) mask */ -#define W83C553F_RWAMB_CH1MASK (1<<1) /* channel 1 (5) mask */ -#define W83C553F_RWAMB_CH2MASK (1<<2) /* channel 2 (6) mask */ -#define W83C553F_RWAMB_CH3MASK (1<<3) /* channel 3 (7) mask */ - -/* typedefs */ - -#define W83C553F_DMA1_CS 0x8 -#define W83C553F_DMA1_WR 0x9 -#define W83C553F_DMA1_WSMB 0xA -#define W83C553F_DMA1_WM 0xB -#define W83C553F_DMA1_CBP 0xC -#define W83C553F_DMA1_MC 0xD -#define W83C553F_DMA1_CM 0xE -#define W83C553F_DMA1_RWAMB 0xF - -#define W83C553F_DMA2_CS 0x10 -#define W83C553F_DMA2_WR 0x12 -#define W83C553F_DMA2_WSMB 0x14 -#define W83C553F_DMA2_WM 0x16 -#define W83C553F_DMA2_CBP 0x18 -#define W83C553F_DMA2_MC 0x1A -#define W83C553F_DMA2_CM 0x1C -#define W83C553F_DMA2_RWAMB 0x1E - -void initialise_w83c553f(void); |