diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/sunxi/clk_a10.c | 2 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a10s.c | 2 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a23.c | 3 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a31.c | 6 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a64.c | 3 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a80.c | 8 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a83t.c | 3 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_h3.c | 3 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_h6.c | 5 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_h616.c | 5 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_r40.c | 3 | ||||
| -rw-r--r-- | drivers/gpio/axp_gpio.c | 21 | ||||
| -rw-r--r-- | drivers/gpio/sunxi_gpio.c | 6 | ||||
| -rw-r--r-- | drivers/mtd/nand/raw/sunxi_nand.c | 173 | ||||
| -rw-r--r-- | drivers/phy/allwinner/phy-sun4i-usb.c | 6 | ||||
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 | ||||
| -rw-r--r-- | drivers/power/regulator/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/power/regulator/Makefile | 1 | ||||
| -rw-r--r-- | drivers/power/regulator/axp_usb_power.c | 49 |
19 files changed, 203 insertions, 116 deletions
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c index abd4e8b..f27306f 100644 --- a/drivers/clk/sunxi/clk_a10.c +++ b/drivers/clk/sunxi/clk_a10.c @@ -23,6 +23,7 @@ static struct ccu_clk_gate a10_gates[] = { [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), [CLK_AHB_MMC3] = GATE(0x060, BIT(11)), + [CLK_AHB_NAND] = GATE(0x060, BIT(13)), [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), @@ -47,6 +48,7 @@ static struct ccu_clk_gate a10_gates[] = { [CLK_APB1_UART6] = GATE(0x06c, BIT(22)), [CLK_APB1_UART7] = GATE(0x06c, BIT(23)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), [CLK_SPI2] = GATE(0x0a8, BIT(31)), diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c index e486ced..16ac589 100644 --- a/drivers/clk/sunxi/clk_a10s.c +++ b/drivers/clk/sunxi/clk_a10s.c @@ -20,6 +20,7 @@ static struct ccu_clk_gate a10s_gates[] = { [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), + [CLK_AHB_NAND] = GATE(0x060, BIT(13)), [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), @@ -35,6 +36,7 @@ static struct ccu_clk_gate a10s_gates[] = { [CLK_APB1_UART2] = GATE(0x06c, BIT(18)), [CLK_APB1_UART3] = GATE(0x06c, BIT(19)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), [CLK_SPI2] = GATE(0x0a8, BIT(31)), diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index d94feca..45d5ba7 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -17,6 +17,7 @@ static struct ccu_clk_gate a23_gates[] = { [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_NAND] = GATE(0x060, BIT(13)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), [CLK_BUS_OTG] = GATE(0x060, BIT(24)), @@ -34,6 +35,7 @@ static struct ccu_clk_gate a23_gates[] = { [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), @@ -52,6 +54,7 @@ static struct ccu_reset a23_resets[] = { [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 3606589..6ca8000 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -18,6 +18,8 @@ static struct ccu_clk_gate a31_gates[] = { [CLK_AHB1_MMC1] = GATE(0x060, BIT(9)), [CLK_AHB1_MMC2] = GATE(0x060, BIT(10)), [CLK_AHB1_MMC3] = GATE(0x060, BIT(11)), + [CLK_AHB1_NAND1] = GATE(0x060, BIT(12)), + [CLK_AHB1_NAND0] = GATE(0x060, BIT(13)), [CLK_AHB1_EMAC] = GATE(0x060, BIT(17)), [CLK_AHB1_SPI0] = GATE(0x060, BIT(20)), [CLK_AHB1_SPI1] = GATE(0x060, BIT(21)), @@ -43,6 +45,8 @@ static struct ccu_clk_gate a31_gates[] = { [CLK_APB2_UART4] = GATE(0x06c, BIT(20)), [CLK_APB2_UART5] = GATE(0x06c, BIT(21)), + [CLK_NAND0] = GATE(0x080, BIT(31)), + [CLK_NAND1] = GATE(0x084, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), [CLK_SPI2] = GATE(0x0a8, BIT(31)), @@ -65,6 +69,8 @@ static struct ccu_reset a31_resets[] = { [RST_AHB1_MMC1] = RESET(0x2c0, BIT(9)), [RST_AHB1_MMC2] = RESET(0x2c0, BIT(10)), [RST_AHB1_MMC3] = RESET(0x2c0, BIT(11)), + [RST_AHB1_NAND1] = RESET(0x2c0, BIT(12)), + [RST_AHB1_NAND0] = RESET(0x2c0, BIT(13)), [RST_AHB1_EMAC] = RESET(0x2c0, BIT(17)), [RST_AHB1_SPI0] = RESET(0x2c0, BIT(20)), [RST_AHB1_SPI1] = RESET(0x2c0, BIT(21)), diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index 136ba89..fd26cd4 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -20,6 +20,7 @@ static const struct ccu_clk_gate a64_gates[] = { [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_NAND] = GATE(0x060, BIT(13)), [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), @@ -45,6 +46,7 @@ static const struct ccu_clk_gate a64_gates[] = { [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), @@ -74,6 +76,7 @@ static const struct ccu_reset a64_resets[] = { [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c index 3c9eb14..c5834f4 100644 --- a/drivers/clk/sunxi/clk_a80.c +++ b/drivers/clk/sunxi/clk_a80.c @@ -14,12 +14,18 @@ #include <linux/bitops.h> static const struct ccu_clk_gate a80_gates[] = { + [CLK_NAND0_0] = GATE(0x400, BIT(31)), + [CLK_NAND0_1] = GATE(0x404, BIT(31)), + [CLK_NAND1_0] = GATE(0x408, BIT(31)), + [CLK_NAND1_1] = GATE(0x40c, BIT(31)), [CLK_SPI0] = GATE(0x430, BIT(31)), [CLK_SPI1] = GATE(0x434, BIT(31)), [CLK_SPI2] = GATE(0x438, BIT(31)), [CLK_SPI3] = GATE(0x43c, BIT(31)), [CLK_BUS_MMC] = GATE(0x580, BIT(8)), + [CLK_BUS_NAND0] = GATE(0x580, BIT(13)), + [CLK_BUS_NAND1] = GATE(0x580, BIT(12)), [CLK_BUS_SPI0] = GATE(0x580, BIT(20)), [CLK_BUS_SPI1] = GATE(0x580, BIT(21)), [CLK_BUS_SPI2] = GATE(0x580, BIT(22)), @@ -42,6 +48,8 @@ static const struct ccu_clk_gate a80_gates[] = { static const struct ccu_reset a80_resets[] = { [RST_BUS_MMC] = RESET(0x5a0, BIT(8)), + [RST_BUS_NAND0] = RESET(0x5a0, BIT(13)), + [RST_BUS_NAND1] = RESET(0x5a0, BIT(12)), [RST_BUS_SPI0] = RESET(0x5a0, BIT(20)), [RST_BUS_SPI1] = RESET(0x5a0, BIT(21)), [RST_BUS_SPI2] = RESET(0x5a0, BIT(22)), diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c index d5af37b..760d98c 100644 --- a/drivers/clk/sunxi/clk_a83t.c +++ b/drivers/clk/sunxi/clk_a83t.c @@ -18,6 +18,7 @@ static struct ccu_clk_gate a83t_gates[] = { [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_NAND] = GATE(0x060, BIT(13)), [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), @@ -42,6 +43,7 @@ static struct ccu_clk_gate a83t_gates[] = { [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), @@ -70,6 +72,7 @@ static struct ccu_reset a83t_resets[] = { [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index 213ab51..32bc95f 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -19,6 +19,7 @@ static struct ccu_clk_gate h3_gates[] = { [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_NAND] = GATE(0x060, BIT(13)), [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), @@ -49,6 +50,7 @@ static struct ccu_clk_gate h3_gates[] = { [CLK_BUS_EPHY] = GATE(0x070, BIT(0)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), @@ -77,6 +79,7 @@ static struct ccu_reset h3_resets[] = { [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c index 24eb972..071fd58 100644 --- a/drivers/clk/sunxi/clk_h6.c +++ b/drivers/clk/sunxi/clk_h6.c @@ -21,6 +21,10 @@ static struct ccu_clk_gate h6_gates[] = { [CLK_DE] = GATE(0x600, BIT(31)), [CLK_BUS_DE] = GATE(0x60c, BIT(0)), + [CLK_NAND0] = GATE(0x810, BIT(31)), + [CLK_NAND1] = GATE(0x814, BIT(31)), + [CLK_BUS_NAND] = GATE(0x82c, BIT(0)), + [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), @@ -72,6 +76,7 @@ static struct ccu_clk_gate h6_gates[] = { static struct ccu_reset h6_resets[] = { [RST_BUS_DE] = RESET(0x60c, BIT(16)), + [RST_BUS_NAND] = RESET(0x82c, BIT(16)), [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c index 88d6bf3..113dcff 100644 --- a/drivers/clk/sunxi/clk_h616.c +++ b/drivers/clk/sunxi/clk_h616.c @@ -20,6 +20,10 @@ static struct ccu_clk_gate h616_gates[] = { [CLK_DE] = GATE(0x600, BIT(31)), [CLK_BUS_DE] = GATE(0x60c, BIT(0)), + [CLK_NAND0] = GATE(0x810, BIT(31)), + [CLK_NAND1] = GATE(0x814, BIT(31)), + [CLK_BUS_NAND] = GATE(0x82c, BIT(0)), + [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), @@ -81,6 +85,7 @@ static struct ccu_clk_gate h616_gates[] = { static struct ccu_reset h616_resets[] = { [RST_BUS_DE] = RESET(0x60c, BIT(16)), + [RST_BUS_NAND] = RESET(0x82c, BIT(16)), [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c index 630e80d..0fef6f3 100644 --- a/drivers/clk/sunxi/clk_r40.c +++ b/drivers/clk/sunxi/clk_r40.c @@ -19,6 +19,7 @@ static struct ccu_clk_gate r40_gates[] = { [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), [CLK_BUS_MMC3] = GATE(0x060, BIT(11)), + [CLK_BUS_NAND] = GATE(0x060, BIT(13)), [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), [CLK_BUS_SPI2] = GATE(0x060, BIT(22)), @@ -57,6 +58,7 @@ static struct ccu_clk_gate r40_gates[] = { [CLK_BUS_UART6] = GATE(0x06c, BIT(22)), [CLK_BUS_UART7] = GATE(0x06c, BIT(23)), + [CLK_NAND] = GATE(0x080, BIT(31)), [CLK_SPI0] = GATE(0x0a0, BIT(31)), [CLK_SPI1] = GATE(0x0a4, BIT(31)), [CLK_SPI2] = GATE(0x0a8, BIT(31)), @@ -91,6 +93,7 @@ static struct ccu_reset r40_resets[] = { [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), [RST_BUS_MMC3] = RESET(0x2c0, BIT(11)), + [RST_BUS_NAND] = RESET(0x2c0, BIT(13)), [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), [RST_BUS_SPI2] = RESET(0x2c0, BIT(22)), diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c index 35585dc..4967219 100644 --- a/drivers/gpio/axp_gpio.c +++ b/drivers/gpio/axp_gpio.c @@ -36,18 +36,11 @@ static int axp_gpio_direction_input(struct udevice *dev, unsigned pin) { u8 reg; - switch (pin) { -#ifndef CONFIG_AXP152_POWER /* NA on axp152 */ - case SUNXI_GPIO_AXP0_VBUS_DETECT: - return 0; -#endif - default: - reg = axp_get_gpio_ctrl_reg(pin); - if (reg == 0) - return -EINVAL; + reg = axp_get_gpio_ctrl_reg(pin); + if (reg == 0) + return -EINVAL; - return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT); - } + return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT); } static int axp_gpio_direction_output(struct udevice *dev, unsigned pin, @@ -83,12 +76,6 @@ static int axp_gpio_get_value(struct udevice *dev, unsigned pin) int ret; switch (pin) { -#ifndef CONFIG_AXP152_POWER /* NA on axp152 */ - case SUNXI_GPIO_AXP0_VBUS_DETECT: - ret = pmic_bus_read(AXP_POWER_STATUS, &val); - mask = AXP_POWER_STATUS_VBUS_PRESENT; - break; -#endif #ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC /* Only available on later PMICs */ case SUNXI_GPIO_AXP0_VBUS_ENABLE: diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 1e85db1..f0b42e4 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -117,11 +117,7 @@ int sunxi_name_to_gpio(const char *name) #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO char lookup[8]; - if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) { - sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d", - SUNXI_GPIO_AXP0_VBUS_DETECT); - name = lookup; - } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) { + if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) { sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d", SUNXI_GPIO_AXP0_VBUS_ENABLE); name = lookup; diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index c378f08..c0fa1e3 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -24,12 +24,13 @@ * GNU General Public License for more details. */ +#include <clk.h> #include <common.h> -#include <fdtdec.h> +#include <dm.h> #include <malloc.h> #include <memalign.h> #include <nand.h> -#include <asm/global_data.h> +#include <reset.h> #include <dm/device_compat.h> #include <dm/devres.h> #include <linux/bitops.h> @@ -45,8 +46,6 @@ #include <asm/gpio.h> #include <asm/arch/clock.h> -DECLARE_GLOBAL_DATA_PTR; - #define NFC_REG_CTL 0x0000 #define NFC_REG_ST 0x0004 #define NFC_REG_INT 0x0008 @@ -263,7 +262,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) * NAND Controller structure: stores sunxi NAND controller information * * @controller: base controller structure - * @dev: parent device (used to print error messages) + * @dev: DM device (used to print error messages) * @regs: NAND controller registers * @ahb_clk: NAND Controller AHB clock * @mod_clk: NAND Controller mod clock @@ -276,7 +275,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) */ struct sunxi_nfc { struct nand_hw_control controller; - struct device *dev; + struct udevice *dev; void __iomem *regs; struct clk *ahb_clk; struct clk *mod_clk; @@ -1605,24 +1604,24 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc) return 0; } -static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) +static int sunxi_nand_chip_init(struct udevice *dev, struct sunxi_nfc *nfc, + ofnode np, int devnum) { const struct nand_sdr_timings *timings; - const void *blob = gd->fdt_blob; struct sunxi_nand_chip *chip; struct mtd_info *mtd; struct nand_chip *nand; int nsels; int ret; int i; - u32 cs[8], rb[8]; + u32 tmp; - if (!fdt_getprop(blob, node, "reg", &nsels)) + if (!ofnode_get_property(np, "reg", &nsels)) return -EINVAL; nsels /= sizeof(u32); if (!nsels || nsels > 8) { - dev_err(nfc->dev, "invalid reg property size\n"); + dev_err(dev, "invalid reg property size\n"); return -EINVAL; } @@ -1630,7 +1629,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) (nsels * sizeof(struct sunxi_nand_chip_sel)), GFP_KERNEL); if (!chip) { - dev_err(nfc->dev, "could not allocate chip\n"); + dev_err(dev, "could not allocate chip\n"); return -ENOMEM; } @@ -1638,48 +1637,34 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) chip->selected = -1; for (i = 0; i < nsels; i++) { - cs[i] = -1; - rb[i] = -1; - } - - ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels); - if (ret) { - dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret); - return ret; - } - - ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb, - nsels); - if (ret) { - dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret); - return ret; - } - - for (i = 0; i < nsels; i++) { - int tmp = cs[i]; + ret = ofnode_read_u32_index(np, "reg", i, &tmp); + if (ret) { + dev_err(dev, "could not retrieve reg property: %d\n", + ret); + return ret; + } if (tmp > NFC_MAX_CS) { - dev_err(nfc->dev, + dev_err(dev, "invalid reg value: %u (max CS = 7)\n", tmp); return -EINVAL; } if (test_and_set_bit(tmp, &nfc->assigned_cs)) { - dev_err(nfc->dev, "CS %d already assigned\n", tmp); + dev_err(dev, "CS %d already assigned\n", tmp); return -EINVAL; } chip->sels[i].cs = tmp; - tmp = rb[i]; - if (tmp >= 0 && tmp < 2) { + if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) && + tmp < 2) { chip->sels[i].rb.type = RB_NATIVE; chip->sels[i].rb.info.nativeid = tmp; } else { - ret = gpio_request_by_name_nodev(offset_to_ofnode(node), - "rb-gpios", i, - &chip->sels[i].rb.info.gpio, - GPIOD_IS_IN); + ret = gpio_request_by_name(dev, "rb-gpios", i, + &chip->sels[i].rb.info.gpio, + GPIOD_IS_IN); if (ret) chip->sels[i].rb.type = RB_GPIO; else @@ -1690,7 +1675,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) timings = onfi_async_timing_mode_to_sdr_timings(0); if (IS_ERR(timings)) { ret = PTR_ERR(timings); - dev_err(nfc->dev, + dev_err(dev, "could not retrieve timings for ONFI mode 0: %d\n", ret); return ret; @@ -1698,7 +1683,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) ret = sunxi_nand_chip_set_timings(nfc, chip, timings); if (ret) { - dev_err(nfc->dev, "could not configure chip timings: %d\n", ret); + dev_err(dev, "could not configure chip timings: %d\n", ret); return ret; } @@ -1711,7 +1696,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) * in the DT. */ nand->ecc.mode = NAND_ECC_HW; - nand->flash_node = offset_to_ofnode(node); + nand->flash_node = np; nand->select_chip = sunxi_nfc_select_chip; nand->cmd_ctrl = sunxi_nfc_cmd_ctrl; nand->read_buf = sunxi_nfc_read_buf; @@ -1733,25 +1718,25 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) ret = sunxi_nand_chip_init_timings(nfc, chip); if (ret) { - dev_err(nfc->dev, "could not configure chip timings: %d\n", ret); + dev_err(dev, "could not configure chip timings: %d\n", ret); return ret; } ret = sunxi_nand_ecc_init(mtd, &nand->ecc); if (ret) { - dev_err(nfc->dev, "ECC init failed: %d\n", ret); + dev_err(dev, "ECC init failed: %d\n", ret); return ret; } ret = nand_scan_tail(mtd); if (ret) { - dev_err(nfc->dev, "nand_scan_tail failed: %d\n", ret); + dev_err(dev, "nand_scan_tail failed: %d\n", ret); return ret; } ret = nand_register(devnum, mtd); if (ret) { - dev_err(nfc->dev, "failed to register mtd device: %d\n", ret); + dev_err(dev, "failed to register mtd device: %d\n", ret); return ret; } @@ -1760,25 +1745,13 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) return 0; } -static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc) +static int sunxi_nand_chips_init(struct udevice *dev, struct sunxi_nfc *nfc) { - const void *blob = gd->fdt_blob; - int nand_node; + ofnode nand_np; int ret, i = 0; - for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0; - nand_node = fdt_next_subnode(blob, nand_node)) - i++; - - if (i > 8) { - dev_err(nfc->dev, "too many NAND chips: %d (max = 8)\n", i); - return -EINVAL; - } - - i = 0; - for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0; - nand_node = fdt_next_subnode(blob, nand_node)) { - ret = sunxi_nand_chip_init(nand_node, nfc, i++); + dev_for_each_subnode(nand_np, dev) { + ret = sunxi_nand_chip_init(dev, nfc, nand_np, i++); if (ret) return ret; } @@ -1802,55 +1775,67 @@ static void sunxi_nand_chips_cleanup(struct sunxi_nfc *nfc) } #endif /* __UBOOT__ */ -void sunxi_nand_init(void) +static int sunxi_nand_probe(struct udevice *dev) { - const void *blob = gd->fdt_blob; - struct sunxi_nfc *nfc; - fdt_addr_t regs; - int node; + struct sunxi_nfc *nfc = dev_get_priv(dev); + struct reset_ctl_bulk rst_bulk; + struct clk_bulk clk_bulk; int ret; - nfc = kzalloc(sizeof(*nfc), GFP_KERNEL); - if (!nfc) - return; - + nfc->dev = dev; spin_lock_init(&nfc->controller.lock); init_waitqueue_head(&nfc->controller.wq); INIT_LIST_HEAD(&nfc->chips); - node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND); - if (node < 0) { - pr_err("unable to find nfc node in device tree\n"); - goto err; - } + nfc->regs = dev_read_addr_ptr(dev); + if (!nfc->regs) + return -EINVAL; - if (!fdtdec_get_is_enabled(blob, node)) { - pr_err("nfc disabled in device tree\n"); - goto err; - } + ret = reset_get_bulk(dev, &rst_bulk); + if (!ret) + reset_deassert_bulk(&rst_bulk); - regs = fdtdec_get_addr(blob, node, "reg"); - if (regs == FDT_ADDR_T_NONE) { - pr_err("unable to find nfc address in device tree\n"); - goto err; - } - - nfc->regs = (void *)regs; + ret = clk_get_bulk(dev, &clk_bulk); + if (!ret) + clk_enable_bulk(&clk_bulk); ret = sunxi_nfc_rst(nfc); if (ret) - goto err; + return ret; - ret = sunxi_nand_chips_init(node, nfc); + ret = sunxi_nand_chips_init(dev, nfc); if (ret) { - dev_err(nfc->dev, "failed to init nand chips\n"); - goto err; + dev_err(dev, "failed to init nand chips\n"); + return ret; } - return; + return 0; +} -err: - kfree(nfc); +static const struct udevice_id sunxi_nand_ids[] = { + { + .compatible = "allwinner,sun4i-a10-nand", + }, + { } +}; + +U_BOOT_DRIVER(sunxi_nand) = { + .name = "sunxi_nand", + .id = UCLASS_MTD, + .of_match = sunxi_nand_ids, + .probe = sunxi_nand_probe, + .priv_auto = sizeof(struct sunxi_nfc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(sunxi_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize sunxi NAND controller: %d\n", ret); } MODULE_LICENSE("GPL v2"); diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index 2e969ab..6428163 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -224,6 +224,12 @@ static int sun4i_usb_phy_power_on(struct phy *phy) initial_usb_scan_delay = 0; } + /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ + if (phy->id == 0 && sun4i_usb_phy_vbus_detect(phy)) { + dev_warn(phy->dev, "External vbus detected, not enabling our own vbus\n"); + return 0; + } + if (dm_gpio_is_valid(&usb_phy->gpio_vbus)) dm_gpio_set_value(&usb_phy->gpio_vbus, 1); diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index c4fbda7..e510218 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -269,6 +269,7 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = { #endif { "mmc2", 3 }, /* PC6-PC15 */ { "mmc3", 2 }, /* PI4-PI9 */ + { "nand0", 2 }, /* PC0-PC24 */ { "spi0", 3 }, /* PC0-PC2, PC23 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 4 }, /* PF2-PF4 */ @@ -293,6 +294,7 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG3-PG8 */ { "mmc2", 3 }, /* PC6-PC15 */ + { "nand0", 2 }, /* PC0-PC19 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 4 }, /* PF2-PF4 */ @@ -319,6 +321,7 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = { { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC6-PC15, PC24 */ { "mmc3", 4 }, /* PC6-PC15, PC24 */ + { "nand0", 2 }, /* PC0-PC26 */ { "spi0", 3 }, /* PC0-PC2, PC27 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -363,6 +366,7 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = { { "mmc1", 4 }, /* PG0-PG5 */ #endif { "mmc2", 3 }, /* PC5-PC15, PC24 */ + { "nand0", 2 }, /* PC0-PC24 */ { "spi0", 3 }, /* PC0-PC2, PC23 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 4 }, /* PF2-PF4 */ @@ -386,6 +390,7 @@ static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC5-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -424,6 +429,7 @@ static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC5-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -450,6 +456,7 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC5-PC16 */ + { "nand0", 2 }, /* PC0-PC18 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -491,6 +498,7 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC5-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -557,6 +565,7 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC6-PC16 */ + { "nand0", 2 }, /* PC0-PC18 */ { "spi0", 3 }, /* PC0-PC2, PC19 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 4 }, /* PF2-PF4 */ @@ -597,6 +606,7 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC1-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "pwm", 2 }, /* PD22 */ { "spi0", 4 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) @@ -639,6 +649,7 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC1-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 3 }, /* PC0-PC3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -665,6 +676,7 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC1-PC14 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 4 }, /* PC0-PC7 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ @@ -703,6 +715,7 @@ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 2 }, /* PG0-PG5 */ { "mmc2", 3 }, /* PC0-PC16 */ + { "nand0", 2 }, /* PC0-PC16 */ { "spi0", 4 }, /* PC0-PC7, PC15-PC16 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index c346d03..eb5aa38 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -57,6 +57,13 @@ config SPL_REGULATOR_AXP Enable support in SPL for the regulators (DCDCs, LDOs) in the X-Powers AXP152, AXP2xx, and AXP8xx PMICs. +config REGULATOR_AXP_USB_POWER + bool "Enable driver for X-Powers AXP PMIC USB power supply" + depends on DM_REGULATOR && PMIC_AXP + help + Enable support for reading the USB power supply status from + X-Powers AXP2xx and AXP8xx PMICs. + config DM_REGULATOR_BD71837 bool "Enable Driver Model for ROHM BD71837/BD71847 regulators" depends on DM_REGULATOR && DM_PMIC_BD71837 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 2d97e10..d9e0cd5 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o obj-$(CONFIG_$(SPL_)REGULATOR_AXP) += axp_regulator.o +obj-$(CONFIG_$(SPL_)REGULATOR_AXP_USB_POWER) += axp_usb_power.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_DM_REGULATOR_NPCM8XX) += npcm8xx_regulator.o diff --git a/drivers/power/regulator/axp_usb_power.c b/drivers/power/regulator/axp_usb_power.c new file mode 100644 index 0000000..f32fb6a --- /dev/null +++ b/drivers/power/regulator/axp_usb_power.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <dm/device.h> +#include <errno.h> +#include <power/pmic.h> +#include <power/regulator.h> + +#define AXP_POWER_STATUS 0x00 +#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) + +static int axp_usb_power_get_enable(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, AXP_POWER_STATUS); + if (ret < 0) + return ret; + + return !!(ret & AXP_POWER_STATUS_VBUS_PRESENT); +} + +static const struct dm_regulator_ops axp_usb_power_ops = { + .get_enable = axp_usb_power_get_enable, +}; + +static int axp_usb_power_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_plat *uc_plat = dev_get_uclass_plat(dev); + + uc_plat->type = REGULATOR_TYPE_FIXED; + + return 0; +} + +static const struct udevice_id axp_usb_power_ids[] = { + { .compatible = "x-powers,axp202-usb-power-supply" }, + { .compatible = "x-powers,axp221-usb-power-supply" }, + { .compatible = "x-powers,axp223-usb-power-supply" }, + { .compatible = "x-powers,axp813-usb-power-supply" }, + { } +}; + +U_BOOT_DRIVER(axp_usb_power) = { + .name = "axp_usb_power", + .id = UCLASS_REGULATOR, + .of_match = axp_usb_power_ids, + .probe = axp_usb_power_probe, + .ops = &axp_usb_power_ops, +}; |