diff options
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/core.c | 10 | ||||
| -rw-r--r-- | drivers/mtd/nand/spi/core.c | 24 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi-nor-ids.c | 10 |
3 files changed, 26 insertions, 18 deletions
diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 6fbd24b..219efdc 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -130,10 +130,18 @@ EXPORT_SYMBOL_GPL(nanddev_isreserved); */ int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos) { + unsigned int entry; + if (nanddev_isbad(nand, pos) || nanddev_isreserved(nand, pos)) { pr_warn("attempt to erase a bad/reserved block @%llx\n", nanddev_pos_to_offs(nand, pos)); - return -EIO; + if (nanddev_isreserved(nand, pos)) + return -EIO; + + /* remove bad block from BBT */ + entry = nanddev_bbt_pos_to_entry(nand, pos); + nanddev_bbt_set_block_status(nand, entry, + NAND_BBT_BLOCK_STATUS_UNKNOWN); } return nand->ops->erase(nand, pos); diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index fc9d4ed..09bfde6 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -655,16 +655,16 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos) { struct spinand_device *spinand = nand_to_spinand(nand); + u8 marker[2] = { }; struct nand_page_io_req req = { .pos = *pos, - .ooblen = 2, + .ooblen = sizeof(marker), .ooboffs = 0, - .oobbuf.in = spinand->oobbuf, + .oobbuf.in = marker, .mode = MTD_OPS_RAW, }; int ret; - memset(spinand->oobbuf, 0, 2); ret = spinand_select_target(spinand, pos->target); if (ret) return ret; @@ -673,7 +673,7 @@ static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos) if (ret) return ret; - if (spinand->oobbuf[0] != 0xff || spinand->oobbuf[1] != 0xff) + if (marker[0] != 0xff || marker[1] != 0xff) return true; return false; @@ -702,28 +702,20 @@ static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs) static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos) { struct spinand_device *spinand = nand_to_spinand(nand); + u8 marker[2] = { }; struct nand_page_io_req req = { .pos = *pos, .ooboffs = 0, - .ooblen = 2, - .oobbuf.out = spinand->oobbuf, + .ooblen = sizeof(marker), + .oobbuf.out = marker, + .mode = MTD_OPS_RAW, }; int ret; - /* Erase block before marking it bad. */ ret = spinand_select_target(spinand, pos->target); if (ret) return ret; - ret = spinand_write_enable_op(spinand); - if (ret) - return ret; - - ret = spinand_erase_op(spinand, pos); - if (ret) - return ret; - - memset(spinand->oobbuf, 0, 2); return spinand_write_page(spinand, &req); } diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index bc9d4f7..5bd5dd3 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -150,7 +150,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx25u1635e", 0xc22535, 0, 64 * 1024, 32, SECT_4K) }, { INFO("mx25u3235f", 0xc22536, 0, 4 * 1024, 1024, SECT_4K) }, { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, - { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) }, + { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) }, { INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) }, { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, { INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -185,6 +185,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q512ax3", 0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { INFO("mt25ql01g", 0x21ba20, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, @@ -278,6 +279,11 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q32jwm", 0xef8016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K) }, { INFO("w25q64dw", 0xef6017, 0, 64 * 1024, 128, @@ -315,6 +321,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q64cv", 0xef4017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ |