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-rw-r--r--doc/README.x864
-rw-r--r--doc/device-tree-bindings/misc/intel,irq-router.txt6
2 files changed, 9 insertions, 1 deletions
diff --git a/doc/README.x86 b/doc/README.x86
index 04f0220..78664c3 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -256,7 +256,9 @@ the board manual. The SPI-0 flash should have flash descriptor plus ME firmware
and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0
flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program
this image to the SPI-0 flash according to the board manual just once and we are
-all set. For programming U-Boot we just need to program SPI-1 flash.
+all set. For programming U-Boot we just need to program SPI-1 flash. Since the
+default u-boot.rom image for this board is set to 2MB, it should be programmed
+to the last 2MB of the 8MB chip, address range [600000, 7FFFFF].
---
diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt
index 04ad346..09e97b4 100644
--- a/doc/device-tree-bindings/misc/intel,irq-router.txt
+++ b/doc/device-tree-bindings/misc/intel,irq-router.txt
@@ -22,6 +22,12 @@ Required properties :
- intel,pirq-link : Specifies the PIRQ link information with two cells. The
first cell is the register offset that controls the first PIRQ link routing.
The second cell is the total number of PIRQ links the router supports.
+- intel,pirq-regmap : Specifies PIRQ routing register offset of all PIRQ links,
+ encoded as 2 cells a group for each link. The first cell is the PIRQ link
+ number (0 for PIRQA, 1 for PIRQB, etc). The second cell is the PIRQ routing
+ register offset from the interrupt router's base address. If this property
+ is omitted, it indicates a consecutive register offset from the first PIRQ
+ link, as specified by the first cell of intel,pirq-link.
- intel,pirq-mask : Specifies the IRQ mask representing the 16 IRQs in the
8259 PIC. Bit N is 1 means IRQ N is available to be routed.
- intel,pirq-routing : Specifies all PCI devices' IRQ routing information,