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-rw-r--r--doc/README.generic_usb_ohci30
-rw-r--r--doc/api/index.rst1
-rw-r--r--doc/api/linker_lists.rst22
-rw-r--r--doc/api/nvmem.rst10
-rw-r--r--doc/board/st/stm32mp1.rst183
-rw-r--r--doc/board/ti/am62x_sk.rst231
-rw-r--r--doc/board/ti/index.rst1
-rw-r--r--doc/develop/bloblist.rst2
-rw-r--r--doc/develop/commands.rst4
-rw-r--r--doc/develop/driver-model/design.rst2
-rw-r--r--doc/develop/driver-model/of-plat.rst4
-rw-r--r--doc/develop/driver-model/serial-howto.rst9
-rw-r--r--doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt49
-rw-r--r--doc/device-tree-bindings/regulator/regulator.txt1
-rw-r--r--doc/device-tree-bindings/spi/hpe,gxp-spi.yaml37
-rw-r--r--doc/imx/common/imx6.txt31
-rw-r--r--doc/imx/common/imx7.txt23
-rw-r--r--doc/mkimage.157
-rw-r--r--doc/usage/cmd/dm.rst487
-rw-r--r--doc/usage/cmd/loadm.rst49
-rw-r--r--doc/usage/index.rst2
21 files changed, 1111 insertions, 124 deletions
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
index 65b0896..a7da4bc 100644
--- a/doc/README.generic_usb_ohci
+++ b/doc/README.generic_usb_ohci
@@ -11,18 +11,6 @@ Configuration options
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
- CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
-
- - extern int board_usb_init(void);
- - extern int usb_board_stop(void);
- - extern int usb_cpu_init_fail(void);
-
- CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
-
- - extern int usb_cpu_init(void);
- - extern int usb_cpu_stop(void);
- - extern int usb_cpu_init_fail(void);
-
CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI
registers
@@ -43,21 +31,3 @@ config option
needs to be defined.
-
-PCI Controllers
-----------------
-
-You'll need to define
-
- CONFIG_PCI_OHCI
-
-If you have several USB PCI controllers, define
-
- CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list
-
-If undefined, the first instance found in PCI space will be used.
-
-PCI Controllers need to do byte swapping on register accesses, so they
-should to define:
-
- CONFIG_SYS_OHCI_SWAP_REG_ACCESS
diff --git a/doc/api/index.rst b/doc/api/index.rst
index 72fea98..a9338cf 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
linker_lists
lmb
logging
+ nvmem
pinctrl
rng
sandbox
diff --git a/doc/api/linker_lists.rst b/doc/api/linker_lists.rst
index 7063fdc..3cd447f 100644
--- a/doc/api/linker_lists.rst
+++ b/doc/api/linker_lists.rst
@@ -13,7 +13,7 @@ then the corresponding input section name is
::
- .u_boot_list_ + 2_ + @_list + _2_ + @_entry
+ __u_boot_list_ + 2_ + @_list + _2_ + @_entry
and the C variable name is
@@ -23,7 +23,7 @@ and the C variable name is
This ensures uniqueness for both input section and C variable name.
-Note that the names differ only in the first character, "." for the
+Note that the names differ only in the characters, "__" for the
section and "_" for the variable, so that the linker cannot confuse
section and symbol names. From now on, both names will be referred
to as
@@ -63,11 +63,11 @@ iterated at least once.
::
- .u_boot_list_2_array_1
- .u_boot_list_2_array_2_first
- .u_boot_list_2_array_2_second
- .u_boot_list_2_array_2_third
- .u_boot_list_2_array_3
+ __u_boot_list_2_array_1
+ __u_boot_list_2_array_2_first
+ __u_boot_list_2_array_2_second
+ __u_boot_list_2_array_2_third
+ __u_boot_list_2_array_3
If lists must be divided into sublists (e.g. for iterating only on
part of a list), one can simply give the list a name of the form
@@ -129,17 +129,17 @@ the compiler cannot update the alignment of the linker_list item.
In the first case, an 8-byte 'fill' region is added::
- .u_boot_list_2_driver_2_testbus_drv
+ __u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
- .u_boot_list_2_driver_2_testfdt1_drv
+ __u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
- .u_boot_list_2_driver_2_testfdt_drv
+ __u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
- .u_boot_list_2_driver_2_testprobe_drv
+ __u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv
diff --git a/doc/api/nvmem.rst b/doc/api/nvmem.rst
new file mode 100644
index 0000000..d923784
--- /dev/null
+++ b/doc/api/nvmem.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NVMEM API
+=========
+
+.. kernel-doc:: include/nvmem.h
+ :doc: Design
+
+.. kernel-doc:: include/nvmem.h
+ :internal:
diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
index 0c5d3a9..00f9b45 100644
--- a/doc/board/st/stm32mp1.rst
+++ b/doc/board/st/stm32mp1.rst
@@ -1,41 +1,31 @@
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
.. sectionauthor:: Patrick Delaunay <patrick.delaunay@foss.st.com>
-STM32MP15x boards
+STM32MP1xx boards
=================
-This is a quick instruction for setup STM32MP15x boards.
+This is a quick instruction for setup STMicroelectronics STM32MP1xx boards.
-Futher information can be found in STMicrolectronics STM32 WIKI_.
+Further information can be found in STMicroelectronics STM32 WIKI_.
Supported devices
-----------------
-U-Boot supports STMP32MP15x SoCs:
+U-Boot supports all the STMicroelectronics MPU with the associated boards
- - STM32MP157
- - STM32MP153
- - STM32MP151
+ - STMP32MP15x SoCs:
-The STM32MP15x is a Cortex-A MPU aimed at various applications.
+ - STM32MP157
+ - STM32MP153
+ - STM32MP151
-It features:
-
- - Dual core Cortex-A7 application core (Single on STM32MP151)
- - 2D/3D image composition with GPU (only on STM32MP157)
- - Standard memories interface support
- - Standard connectivity, widely inherited from the STM32 MCU family
- - Comprehensive security support
+ - STMP32MP13x SoCs:
-Each line comes with a security option (cryptography & secure boot) and
-a Cortex-A frequency option:
-
- - A : Cortex-A7 @ 650 MHz
- - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- - D : Cortex-A7 @ 800 MHz
- - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
+ - STM32MP135
+ - STM32MP133
+ - STM32MP131
-Everything is supported in Linux but U-Boot is limited to:
+Everything is supported in Linux but U-Boot is limited to the boot device:
1. UART
2. SD card/MMC controller (SDMMC)
@@ -49,7 +39,35 @@ And the necessary drivers
1. I2C
2. STPMIC1 (PMIC and regulator)
3. Clock, Reset, Sysreset
- 4. Fuse
+ 4. Fuse (BSEC)
+ 5. OP-TEE
+ 6. ETH
+ 7. USB host
+ 8. WATCHDOG
+ 9. RNG
+ 10. RTC
+
+STM32MP15x
+``````````
+
+The STM32MP15x is a Cortex-A7 MPU aimed at various applications.
+
+It features:
+
+ - Dual core Cortex-A7 application core (Single on STM32MP151)
+ - 2D/3D image composition with GPU (only on STM32MP157)
+ - Standard memories interface support
+ - Standard connectivity, widely inherited from the STM32 MCU family
+ - Comprehensive security support
+ - Cortex M4 coprocessor
+
+Each line comes with a security option (cryptography & secure boot) and
+a Cortex-A frequency option:
+
+ - A : Cortex-A7 @ 650 MHz
+ - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
+ - D : Cortex-A7 @ 800 MHz
+ - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
Currently the following boards are supported:
@@ -59,6 +77,16 @@ Currently the following boards are supported:
+ stm32mp157c-ev1.dts
+ stm32mp15xx-dhcor-avenger96.dts
+STM32MP13x
+``````````
+
+The STM32MP13x is a single Cortex-A7 MPU aimed at various applications.
+
+Currently the following boards are supported:
+
+ + stm32mp135f-dk.dts
+
+
Boot Sequences
--------------
@@ -71,12 +99,22 @@ Boot Sequences
+ +------------------------+-------------------------+--------------+
| | embedded RAM | DDR |
+----------+------------------------+-------------------------+--------------+
+| TrustZone| secure monitor |
++----------+------------------------+-------------------------+--------------+
+
+The trusted boot chain is recommended with:
+
+- FSBL = **TF-A BL2**
+- Secure monitor = **OP-TEE**
+- SSBL = **U-Boot**
+
+It is the only supported boot chain for STM32MP13x family.
The **Trusted** boot chain with TF-A_
`````````````````````````````````````
defconfig_file :
- + **stm32mp15_defconfig** (for TF-A_ with FIP support)
+ + **stm32mp15_defconfig** and **stm32mp13_defconfig** (for TF-A_ with FIP support)
+ **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support)
+-------------+--------------------------+------------+-------+
@@ -98,8 +136,8 @@ TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file
the secure monitor to access to secure resources.
+ HW_CONFIG: The hardware configuration file = the U-Boot device tree
-The **Basic** boot chain with SPL
-`````````````````````````````````
+The **Basic** boot chain with SPL (for STM32MP15x)
+``````````````````````````````````````````````````
defconfig_file :
+ **stm32mp15_basic_defconfig**
@@ -117,16 +155,19 @@ SPL has limited security initialization.
U-Boot is running in secure mode and provide a secure monitor to the kernel
with only PSCI support (Power State Coordination Interface defined by ARM).
-All the STM32MP15x boards supported by U-Boot use the same generic board
-stm32mp1 which support all the bootable devices.
+.. warning:: This alternate **basic** boot chain with SPL is not supported/promoted by STMicroelectronics to make product.
+
+Device Tree
+-----------
-Each board is configured only with the associated device tree.
+All the STM32MP15x and STM32MP13x boards supported by U-Boot use the same generic board
+stm32mp1 which supports all the bootable devices.
-Device Tree Selection
----------------------
+Each STMicroelectronics board is only configured with the associated device tree.
-You need to select the appropriate device tree for your board,
-the supported device trees for STM32MP15x are:
+STM32MP15x device Tree Selection
+````````````````````````````````
+The supported device trees for STM32MP15x (stm32mp15_trusted_defconfig and stm32mp15_basic_defconfig) are:
+ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1)
@@ -148,6 +189,15 @@ the supported device trees for STM32MP15x are:
+ stm32mp15xx-dhcor-avenger96
+STM32MP13x device Tree Selection
+````````````````````````````````
+The supported device trees for STM32MP13x (stm32mp13_defconfig) are:
+
++ dk: Discovery board
+
+ + stm32mp135f-dk
+
+
Build Procedure
---------------
@@ -170,6 +220,7 @@ Build Procedure
for example: use one output directory for each configuration::
+ # export KBUILD_OUTPUT=stm32mp13
# export KBUILD_OUTPUT=stm32mp15
# export KBUILD_OUTPUT=stm32mp15_trusted
# export KBUILD_OUTPUT=stm32mp15_basic
@@ -184,9 +235,10 @@ Build Procedure
with <defconfig_file>:
- - For **trusted** boot mode : **stm32mp15_defconfig** or
- stm32mp15_trusted_defconfig
- - For basic boot mode: stm32mp15_basic_defconfig
+ - For **trusted** boot mode :
+ - For STM32MP13x: **stm32mp13_defconfig**
+ - For STM32MP15x: **stm32mp15_defconfig** or stm32mp15_trusted_defconfig
+ - For STM32MP15x basic boot mode: stm32mp15_basic_defconfig
5. Configure the device-tree and build the U-Boot image::
@@ -194,37 +246,42 @@ Build Procedure
Examples:
- a) trusted boot with FIP on ev1::
+ a) trusted boot with FIP on STM32MP15x ev1::
# export KBUILD_OUTPUT=stm32mp15
# make stm32mp15_defconfig
# make DEVICE_TREE=stm32mp157c-ev1 all
- b) trusted boot without FIP on dk2::
+ b) trusted boot on STM32MP13x discovery board::
- # export KBUILD_OUTPUT=stm32mp15_trusted
- # make stm32mp15_trusted_defconfig
- # make DEVICE_TREE=stm32mp157c-dk2 all
+ # export KBUILD_OUTPUT=stm32mp13
+ # make stm32mp13_defconfig
+ # make DEVICE_TREE=stm32mp135f-dk all
- c) basic boot on ev1::
+ DEVICE_TEE selection is optional as stm32mp135f-dk is the default board of the defconfig::
+
+ # make stm32mp13_defconfig
+ # make all
+
+ c) basic boot on STM32MP15x ev1::
# export KBUILD_OUTPUT=stm32mp15_basic
# make stm32mp15_basic_defconfig
# make DEVICE_TREE=stm32mp157c-ev1 all
- d) basic boot on ed1::
+ d) basic boot on STM32MP15x ed1::
# export KBUILD_OUTPUT=stm32mp15_basic
# make stm32mp15_basic_defconfig
# make DEVICE_TREE=stm32mp157c-ed1 all
- e) basic boot on dk1::
+ e) basic boot on STM32MP15x dk1::
# export KBUILD_OUTPUT=stm32mp15_basic
# make stm32mp15_basic_defconfig
# make DEVICE_TREE=stm32mp157a-dk1 all
- f) basic boot on avenger96::
+ f) basic boot on STM32MP15x avenger96::
# export KBUILD_OUTPUT=stm32mp15_basic
# make stm32mp15_basic_defconfig
@@ -235,6 +292,7 @@ Build Procedure
So in the output directory (selected by KBUILD_OUTPUT),
you can found the needed U-Boot files:
+ - stm32mp13_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb**
- stm32mp15_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb**
- stm32mp15_trusted_defconfig = u-boot.stm32
@@ -325,9 +383,9 @@ the boot pin values = BOOT0, BOOT1, BOOT2
| SPI-NAND | 1 | 1 | 1 |
+-------------+---------+---------+---------+
-- on the **daugther board ed1 = MB1263** with the switch SW1
-- on **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable)
-- on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2
+- on the STM32MP15x **daughter board ed1 = MB1263** with the switch SW1
+- on STM32MP15x **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable)
+- on board STM32MP15x **DK1/DK2** with the switch SW1 = BOOT0, BOOT2
with only 2 pins available (BOOT1 is forced to 0 and NOR not supported),
the possible value becomes:
@@ -355,7 +413,7 @@ The communication between HOST and board is based on
Prepare an SD card
------------------
-The minimal requirements for STMP32MP15x boot up to U-Boot are:
+The minimal requirements for STMP32MP15x and STM32MP13x boot up to U-Boot are:
- GPT partitioning (with gdisk or with sgdisk)
- 2 fsbl partitions, named "fsbl1" and "fsbl2", size at least 256KiB
@@ -511,14 +569,25 @@ MAC Address
Please read doc/README.enetaddr for the implementation guidelines for mac id
usage. Basically, environment has precedence over board specific storage.
-For STMicroelectonics board, it is retrieved in STM32MP15x OTP :
+For STMicroelectronics board, it is retrieved in:
+
+ - STM32MP15x OTP:
- - OTP_57[31:0] = MAC_ADDR[31:0]
- - OTP_58[15:0] = MAC_ADDR[47:32]
+ - OTP_57[31:0] = MAC_ADDR[31:0]
+ - OTP_58[15:0] = MAC_ADDR[47:32]
-To program a MAC address on virgin OTP words above, you can use the fuse command
+ - STM32MP13x OTP:
+
+ - OTP_57[31:0] = MAC_ADDR0[31:0]
+ - OTP_58[15:0] = MAC_ADDR0[47:32]
+ - OTP_58[31:16] = MAC_ADDR1[15:0]
+ - OTP_59[31:0] = MAC_ADDR1[47:16]
+
+To program a MAC address on virgin STM32MP15x OTP words above, you can use the fuse command
on bank 0 to access to internal OTP and lock them:
+In the next example we are using the 2 OTPs used on STM32MP15x.
+
Prerequisite: check if a MAC address isn't yet programmed in OTP
1) check OTP: their value must be equal to 0::
@@ -571,8 +640,8 @@ Example to set mac address "12:34:56:78:9a:bc"
OTP are protected. It is already done for the board
provided by STMicroelectronics.
-Coprocessor firmware
---------------------
+Coprocessor firmware on STM32MP15x
+----------------------------------
U-Boot can boot the coprocessor before the kernel (coprocessor early boot).
@@ -678,7 +747,7 @@ All the supported device are exported for dfu-util tool::
You can update the boot device:
-- SD card (mmc0) ::
+- SD card (mmc0)::
$> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1.stm32
$> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1.stm32
diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst
new file mode 100644
index 0000000..4e68c20
--- /dev/null
+++ b/doc/board/ti/am62x_sk.rst
@@ -0,0 +1,231 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com>
+
+Texas Instruments AM62 Platforms
+================================
+
+Introduction:
+-------------
+The AM62 SoC family is the follow on AM335x built on the K3 Multicore
+SoC architecture platform, providing ultra-low-power modes, dual
+display, multi-sensor edge compute, security and other BOM-saving
+integrations. The AM62 SoC targets a broad market to enable
+applications such as Industrial HMI, PLC/CNC/Robot control, Medical
+Equipment, Building Automation, Appliances and more.
+
+Some highlights of this SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+ Pin-to-pin compatible options for single and quad core are available.
+* Cortex-M4F for general-purpose or safety usage.
+* Dual display support, providing 24-bit RBG parallel interface and
+ OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
+ resolution.
+* Selectable GPU support, up to 8GFLOPS, providing better user experience
+ in 3D graphic display case and Android.
+* PRU(Programmable Realtime Unit) support for customized programmable
+ interfaces/IOs.
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+ external ports (TSN capable).
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
+ NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+ 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+* Dedicated Centralized System Controller for Security, Power, and
+ Resource Management.
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+ enabling battery powered system design.
+
+More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruiv7
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. code-block:: text
+
+ +------------------------------------------------------------------------+
+ | TIFS | Main R5 | A53 |
+ +------------------------------------------------------------------------+
+ | +--------+ | | |
+ | | Reset | | | |
+ | +--------+ | | |
+ | : | | |
+ | +--------+ | +-----------+ | |
+ | | *ROM* |----------|-->| Reset rls | | |
+ | +--------+ | +-----------+ | |
+ | | | | : | |
+ | | ROM | | : | |
+ | |services| | : | |
+ | | | | +-------------+ | |
+ | | | | | *R5 ROM* | | |
+ | | | | +-------------+ | |
+ | | |<---------|---|Load and auth| | |
+ | | | | | tiboot3.bin | | |
+ | +--------+ | +-------------+ | |
+ | | |<---------|---| Load sysfw | | |
+ | | | | | part to TIFS| | |
+ | | | | | core | | |
+ | | | | +-------------+ | |
+ | | | | : | |
+ | | | | : | |
+ | | | | : | |
+ | | | | +-------------+ | |
+ | | | | | *R5 SPL* | | |
+ | | | | +-------------+ | |
+ | | | | | DDR | | |
+ | | | | | config | | |
+ | | | | +-------------+ | |
+ | | | | | Load | | |
+ | | | | | tispl.bin | | |
+ | | | | +-------------+ | |
+ | | | | | Load R5 | | |
+ | | | | | firmware | | |
+ | | | | +-------------+ | |
+ | | |<---------|---| Start A53 | | |
+ | | | | | and jump to | | |
+ | | | | | DM fw image | | |
+ | | | | +-------------+ | |
+ | | | | | +-----------+ |
+ | | |----------|-----------------------|---->| Reset rls | |
+ | | | | | +-----------+ |
+ | | TIFS | | | : |
+ | |Services| | | +-----------+ |
+ | | |<---------|-----------------------|---->|*ATF/OPTEE*| |
+ | | | | | +-----------+ |
+ | | | | | : |
+ | | | | | +-----------+ |
+ | | |<---------|-----------------------|---->| *A53 SPL* | |
+ | | | | | +-----------+ |
+ | | | | | | Load | |
+ | | | | | | u-boot.img| |
+ | | | | | +-----------+ |
+ | | | | | : |
+ | | | | | +-----------+ |
+ | | |<---------|-----------------------|---->| *U-Boot* | |
+ | | | | | +-----------+ |
+ | | | | | | prompt | |
+ | | |----------|-----------------------|-----+-----------+-----|
+ | +--------+ | | |
+ | | | |
+ +------------------------------------------------------------------------+
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+ requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+1. SYSFW:
+ Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
+ Branch: master
+
+2. ATF:
+ Tree: https://github.com/ARM-software/arm-trusted-firmware.git
+ Branch: master
+
+3. OPTEE:
+ Tree: https://github.com/OP-TEE/optee_os.git
+ Branch: master
+
+4. U-Boot:
+ Tree: https://source.denx.de/u-boot/u-boot
+ Branch: master
+
+5. TI Linux Firmware:
+ Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
+ Branch: ti-linux-firmware
+
+Build procedure:
+----------------
+1. ATF:
+
+.. code-block:: text
+
+ $ make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=lite SPD=opteed
+
+2. OPTEE:
+
+.. code-block:: text
+
+ $ make PLATFORM=k3 CFG_ARM64_core=y CROSS_COMPILE=arm-none-linux-gnueabihf- CROSS_COMPILE64=aarch64-none-linux-gnu-
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. code-block:: text
+
+ $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- am62x_evm_r5_defconfig O=/tmp/r5
+ $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- O=/tmp/r5
+ $ cd <k3-image-gen>
+ $ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- SOC=am62x SBL=/tmp/r5/spl/u-boot-spl.bin SYSFW_PATH=<path to ti-linux-firmware>/ti-sysfw/ti-fs-firmware-am62x-gp.bin
+
+Use the tiboot3.bin generated from last command
+
+* 3.2 A53:
+
+.. code-block:: text
+
+ $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- am62x_evm_a53_defconfig O=/tmp/a53
+ $ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- ATF=<path to ATF dir>/build/k3/lite/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to ti-linux-firmware>/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f O=/tmp/a53
+
+Target Images
+--------------
+Copy the below images to an SD card and boot:
+ - tiboot3.bin from step 3.1
+ - tispl.bin, u-boot.img from 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin:
+
+.. code-block:: text
+
+ +-----------------------+
+ | X.509 |
+ | Certificate |
+ | +-------------------+ |
+ | | | |
+ | | R5 | |
+ | | u-boot-spl.bin | |
+ | | | |
+ | +-------------------+ |
+ | | | |
+ | |TIFS with board cfg| |
+ | | | |
+ | +-------------------+ |
+ | | | |
+ | | | |
+ | | FIT header | |
+ | | +---------------+ | |
+ | | | | | |
+ | | | DTB 1...N | | |
+ | | +---------------+ | |
+ | +-------------------+ |
+ +-----------------------+
+
+- tispl.bin
+
+.. code-block:: text
+
+ +-----------------------+
+ | |
+ | FIT HEADER |
+ | +-------------------+ |
+ | | | |
+ | | A53 ATF | |
+ | +-------------------+ |
+ | | | |
+ | | A53 OPTEE | |
+ | +-------------------+ |
+ | | | |
+ | | R5 DM FW | |
+ | +-------------------+ |
+ | | | |
+ | | A53 SPL | |
+ | +-------------------+ |
+ | | | |
+ | | SPL DTB 1...N | |
+ | +-------------------+ |
+ +-----------------------+
diff --git a/doc/board/ti/index.rst b/doc/board/ti/index.rst
index 014a097..250d924 100644
--- a/doc/board/ti/index.rst
+++ b/doc/board/ti/index.rst
@@ -8,3 +8,4 @@ Texas Instruments
am335x_evm
j721e_evm
+ am62x_sk
diff --git a/doc/develop/bloblist.rst b/doc/develop/bloblist.rst
index 572aa65..81643c7 100644
--- a/doc/develop/bloblist.rst
+++ b/doc/develop/bloblist.rst
@@ -11,6 +11,8 @@ a central structure. Each record of information is assigned a tag so that its
owner can find it and update it. Each record is generally described by a C
structure defined by the code that owns it.
+For the design goals of bloblist, please see the comments at the top of the
+`bloblist.h` header file.
Passing state through the boot process
--------------------------------------
diff --git a/doc/develop/commands.rst b/doc/develop/commands.rst
index c72d1b0..ede880d 100644
--- a/doc/develop/commands.rst
+++ b/doc/develop/commands.rst
@@ -169,8 +169,8 @@ by writing in u-boot.lds ($(srctree)/board/boardname/u-boot.lds) these
.. code-block:: c
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
+ __u_boot_list : {
+ KEEP(*(SORT(__u_boot_list*)));
}
Writing tests
diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst
index 5f33f9f..a75d637 100644
--- a/doc/develop/driver-model/design.rst
+++ b/doc/develop/driver-model/design.rst
@@ -1135,7 +1135,7 @@ constrained systems.
To enable driver model in SPL, define CONFIG_SPL_DM. You might want to
consider the following option also. See the main README for more details.
- - CONFIG_SYS_MALLOC_SIMPLE
+ - CONFIG_SPL_SYS_MALLOC_SIMPLE
- CONFIG_DM_WARN
- CONFIG_DM_DEVICE_REMOVE
- CONFIG_DM_STDIO
diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst
index 237af38..b454f7b 100644
--- a/doc/develop/driver-model/of-plat.rst
+++ b/doc/develop/driver-model/of-plat.rst
@@ -707,9 +707,9 @@ Link errors / undefined reference
Sometimes dtoc does not find the problem for you, but something is wrong and
you get a link error, e.g.::
- :(.u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to
+ :(__u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to
`_u_boot_list_2_driver_2_sandbox_spl_test'
- /usr/bin/ld: dts/dt-uclass.o:(.u_boot_list_2_uclass_2_misc+0x8):
+ /usr/bin/ld: dts/dt-uclass.o:(__u_boot_list_2_uclass_2_misc+0x8):
undefined reference to `_u_boot_list_2_uclass_driver_2_misc'
The first one indicates that the device cannot find its driver. This means that
diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst
index 8af79a9..9da0e57 100644
--- a/doc/develop/driver-model/serial-howto.rst
+++ b/doc/develop/driver-model/serial-howto.rst
@@ -3,15 +3,6 @@
How to port a serial driver to driver model
===========================================
-Almost all of the serial drivers have been converted as at January 2016. These
-ones remain:
-
- * serial_bfin.c
- * serial_pxa.c
-
-The deadline for this work was the end of January 2016. If no one steps
-forward to convert these, at some point there may come a patch to remove them!
-
Here is a suggested approach for converting your serial driver over to driver
model. Please feel free to update this file with your ideas and suggestions.
diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
index 926e3e8..e6ea8d0 100644
--- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
+++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
@@ -3,7 +3,8 @@ ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and DDRPHYC)
--------------------
Required properties:
--------------------
-- compatible : Should be "st,stm32mp1-ddr"
+- compatible : Should be "st,stm32mp1-ddr" for STM32MP15x
+ Should be "st,stm32mp13-ddr" for STM32MP13x
- reg : controleur (DDRCTRL) and phy (DDRPHYC) base address
- clocks : controller clocks handle
- clock-names : associated controller clock names
@@ -13,6 +14,8 @@ Required properties:
the next attributes are DDR parameters, they are generated by DDR tools
included in STM32 Cube tool
+They are required only in SPL, when TFABOOT is not activated.
+
info attributes:
----------------
- st,mem-name : name for DDR configuration, simple string for information
@@ -24,7 +27,7 @@ controlleur attributes:
-----------------------
- st,ctl-reg : controleur values depending of the DDR type
(DDR3/LPDDR2/LPDDR3)
- for STM32MP15x: 25 values are requested in this order
+ for STM32MP15x and STM32MP13x: 25 values are requested in this order
MSTR
MRCTRL0
MRCTRL1
@@ -53,7 +56,7 @@ controlleur attributes:
- st,ctl-timing : controleur values depending of frequency and timing parameter
of DDR
- for STM32MP15x: 12 values are requested in this order
+ for STM32MP15x and STM32MP13x: 12 values are requested in this order
RFSHTMG
DRAMTMG0
DRAMTMG1
@@ -68,7 +71,7 @@ controlleur attributes:
ODTCFG
- st,ctl-map : controleur values depending of address mapping
- for STM32MP15x: 9 values are requested in this order
+ for STM32MP15x and STM32MP13x: 9 values are requested in this order
ADDRMAP1
ADDRMAP2
ADDRMAP3
@@ -99,6 +102,19 @@ controlleur attributes:
PCFGWQOS0_1
PCFGWQOS1_1
+ for STM32MP13x: 11 values are requested in this order
+ SCHED
+ SCHED1
+ PERFHPR1
+ PERFLPR1
+ PERFWR1
+ PCFGR_0
+ PCFGW_0
+ PCFGQOS0_0
+ PCFGQOS1_0
+ PCFGWQOS0_0
+ PCFGWQOS1_0
+
phyc attributes:
----------------
- st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3)
@@ -115,8 +131,19 @@ phyc attributes:
DX2GCR
DX3GCR
+ for STM32MP13x: 9 values are requested in this order
+ PGCR
+ ACIOCR
+ DXCCR
+ DSGCR
+ DCR
+ ODTCR
+ ZQ0CR1
+ DX0GCR
+ DX1GCR
+
- st,phy-timing : phy values depending of frequency and timing parameter of DDR
- for STM32MP15x: 10 values are requested in this order
+ for STM32MP15x and STM32MP13x: 10 values are requested in this order
PTR0
PTR1
PTR2
@@ -128,16 +155,18 @@ phyc attributes:
MR2
MR3
+ for STM32MP13x: 6 values are requested in this order
+ DX0DLLCR
+ DX0DQTR
+ DX0DQSTR
+ DX1DLLCR
+ DX1DQTR
+ DX1DQSTR
Example:
/ {
soc {
- u-boot,dm-spl;
-
ddr: ddr@0x5A003000{
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-
compatible = "st,stm32mp1-ddr";
reg = <0x5A003000 0x550
diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
index 6c9a021..ddb02b7 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -36,6 +36,7 @@ Optional properties:
- regulator-always-on: regulator should never be disabled
- regulator-boot-on: enabled by bootloader/firmware
- regulator-ramp-delay: ramp delay for regulator (in uV/us)
+- regulator-force-boot-off: disabled during the boot stage
- regulator-init-microvolt: a init allowed Voltage value
- regulator-state-(standby|mem|disk)
type: object
diff --git a/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml
new file mode 100644
index 0000000..5e23de1
--- /dev/null
+++ b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/spi/hpe,gxp-spi.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: HPE GXP SPI Controller
+
+maintainers:
+ - Nick Hawkins <nick.hawkins@hpe.com>
+ - Jean-Marie Verdun <verdun@hpe.com>
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+ const: mikrotik,rb4xx-spi
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@c00000200{
+ compatible = "hpe,gxp-spi";
+ reg = <0xc0000200 0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
diff --git a/doc/imx/common/imx6.txt b/doc/imx/common/imx6.txt
index 9007cfb..c5554d8 100644
--- a/doc/imx/common/imx6.txt
+++ b/doc/imx/common/imx6.txt
@@ -162,3 +162,34 @@ icorem6qdl> nand write ${loadaddr} uboot ${filesize}
NAND write: device 0 offset 0x200000, size 0x8fd26
589094 bytes written: OK
icorem6qdl>
+
+SPL Stack size and location notes
+---------------------------------
+
+If we have CONFIG_MX6_OCRAM_256KB then see Figure 8.4.1 in IMX6DQ Reference
+manuals:
+ - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
+ - BOOT ROM stack is at 0x0093FFB8
+ - if icache/dcache is enabled (eFuse/strapping controlled) then the
+ IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
+ fit between 0x00907000 and 0x00938000.
+ - Additionally the BOOT ROM loads what they consider the firmware image
+ which consists of a 4K header in front of us that contains the IVT, DCD
+ and some padding thus 'our' max size is really 0x00908000 - 0x00938000
+ or 192KB
+ - Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
+ SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
+ boot media (given that boot media specific offset is configured properly).
+and if we don't, see Figure 8-3 in IMX6SDL Reference manuals:
+ - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
+ - BOOT ROM stack is at 0x0091FFB8
+ - if icache/dcache is enabled (eFuse/strapping controlled) then the
+ IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
+ fit between 0x00907000 and 0x00918000.
+ - Additionally the BOOT ROM loads what they consider the firmware image
+ which consists of a 4K header in front of us that contains the IVT, DCD
+ and some padding thus 'our' max size is really 0x00908000 - 0x00918000
+ or 64KB
+ - Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
+ SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
+ boot media (given that boot media specific offset is configured properly).
diff --git a/doc/imx/common/imx7.txt b/doc/imx/common/imx7.txt
new file mode 100644
index 0000000..b9db103
--- /dev/null
+++ b/doc/imx/common/imx7.txt
@@ -0,0 +1,23 @@
+U-Boot for Freescale i.MX7
+
+SPL Stack size and location notes
+---------------------------------
+See figure 6-22 in i.MX 7Dual/Solo Reference manuals:
+ - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to
+ 0x00946C00.
+ - Set the stack at the end of the free area section, at 0x00946BB8.
+ - The BOOT ROM loads what they consider the firmware image
+ which consists of a 4K header in front of us that contains the IVT, DCD
+ and some padding. However, the manual also states that the ROM uses the
+ OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use
+ this range for stack and malloc, the SPL itself must fit below 0x920000,
+ or the image will be truncated in at least some boot modes like USB SDP.
+ Thus our max size is really 0x00920000 - 0x00912000. If necessary,
+ CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space
+ for the SPL, but 56KB should be more than enough for the SPL.
+ - Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding)
+ The extra padding could be removed, but this value was used historically
+ based on an incorrect CONFIG_SPL_MAX_SIZE definition.
+ This allows to write the SPL/U-Boot combination generated with
+ u-boot-with-spl.imx directly to a boot media (given that boot media specific
+ offset is configured properly).
diff --git a/doc/mkimage.1 b/doc/mkimage.1
index c92e133..759dc2d 100644
--- a/doc/mkimage.1
+++ b/doc/mkimage.1
@@ -99,6 +99,30 @@ Set image name to 'image name'.
.BI "\-R [" "secondary image name" "]"
Some image types support a second image for additional data. For these types,
use \-R to specify this second image.
+.TS
+allbox;
+lb lbx
+l l.
+Image Type Secondary Image Description
+pblimage Additional RCW-style header, typically used for PBI commands.
+zynqimage, zynqmpimage T{
+Initialization parameters, one per line. Each parameter has the form
+.sp
+.ti 4
+.I address data
+.sp
+where
+.I address
+and
+.I data
+are hexadecimal integers. The boot ROM will write each
+.I data
+to
+.I address
+when loading the image. At most 256 parameters may be specified in this
+manner.
+T}
+.TE
.TP
.BI "\-d [" "image data file" "]"
@@ -110,8 +134,8 @@ Set XIP (execute in place) flag.
.TP
.BI "\-s"
-Create an image with no data. The header will be created, but the image itself
-will not contain data (such as U-Boot or any specified kernel).
+Don't copy in the image data. Depending on the image type, this may create
+just the header, everything but the image data, or nothing at all.
.TP
.BI "\-v"
@@ -177,6 +201,11 @@ should contain a private key file <name>.key for use with signing and a
certificate <name>.crt (containing the public key) for use with verification.
.TP
+.BI "\-G [" "key_file" "]"
+Specifies the private key file to use when signing. This option may be used
+instead of \-k.
+
+.TP
.BI "\-K [" "key_destination" "]"
Specifies a compiled device tree binary file (typically .dtb) to write
public key information into. When a private key is used to sign an image,
@@ -190,6 +219,13 @@ Specifies the private key file to use when signing. This option may be used
instead of \-k.
.TP
+.BI "\-g [" "key_name_hint" "]"
+Sets the key-name-hint property when used with \-f auto. This is the <name>
+part of the key. The directory part is set by \-k. This option also indicates
+that the images included in the FIT should be signed. If this option is
+specified, \-o must be specified as well.
+
+.TP
.BI "\-o [" "signing algorithm" "]"
Specifies the algorithm to be used for signing a FIT image. The default is
taken from the signature node's 'algo' property.
@@ -250,6 +286,15 @@ skipping those for which keys cannot be found. Also add a comment.
.fi
.P
+Add public keys to u-boot.dtb without needing a FIT to sign. This will also
+create a FIT containing an images node with no data named unused.itb.
+.nf
+.B mkimage -f auto -d /dev/null -k /public/signing-keys -g dev \\\\
+.br
+.B -o sha256,rsa2048 -K u-boot.dtb unused.itb
+.fi
+
+.P
Update an existing FIT image, signing it with additional keys.
Add corresponding public keys into u-boot.dtb. This will resign all images
with keys that are available in the new directory. Images that request signing
@@ -277,6 +322,14 @@ automatic mode. No .its file is required.
.B -c """Kernel 4.4 image for production devices""" -d vmlinuz \\\\
.B -b /path/to/rk3288-firefly.dtb -b /path/to/rk3288-jerry.dtb kernel.itb
.fi
+.P
+Create a FIT image containing a signed kernel, using automatic mode. No .its
+file is required.
+.nf
+.B mkimage -f auto -A arm -O linux -T kernel -C none -a 43e00000 -e 0 \\\\
+.br
+.B -d vmlinuz -k /secret/signing-keys -g dev -o sha256,rsa2048 kernel.itb
+.fi
.SH HOMEPAGE
http://www.denx.de/wiki/U-Boot/WebHome
diff --git a/doc/usage/cmd/dm.rst b/doc/usage/cmd/dm.rst
new file mode 100644
index 0000000..7bc1962
--- /dev/null
+++ b/doc/usage/cmd/dm.rst
@@ -0,0 +1,487 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+dm command
+==========
+
+Synopis
+-------
+
+::
+
+ dm compat
+ dm devres
+ dm drivers
+ dm static
+ dm tree
+ dm uclass
+
+Description
+-----------
+
+The *dm* command allows viewing information about driver model, including the
+tree of devices and list of available uclasses.
+
+
+dm compat
+~~~~~~~~~
+
+This shows the compatible strings associated with each driver. Often there
+is only one, but multiple strings are shown on their own line. These strings
+can be looked up in the device tree files for each board, to see which driver is
+used for each node.
+
+dm devres
+~~~~~~~~~
+
+This shows a list of a `devres` (device resource) records for a device. Some
+drivers use the devres API to allocate memory, so that it can be freed
+automatically (without any code needed in the driver's remove() method) when the
+device is removed.
+
+This feature is controlled by CONFIG_DEVRES so no useful output is obtained if
+this option is disabled.
+
+dm drivers
+~~~~~~~~~~
+
+This shows all the available drivers, their uclass and a list of devices that
+use that driver, each on its own line. Drivers with no devices are shown with
+`<none>` as the driver name.
+
+
+dm mem
+~~~~~~
+
+This subcommand is really just for debugging and exploration. It can be enabled
+with the `CONFIG_DM_STATS` option.
+
+All output is in hex except that in brackets which is decimal.
+
+The output consists of a header shows the size of the main device model
+structures (struct udevice, struct driver, struct uclass and struct uc_driver)
+and the count and memory used by each (number of devices, memory used by
+devices, memory used by device names, number of uclasses, memory used by
+uclasses).
+
+After that is a table of information about each type of data that can be
+attached to a device, showing the number that have non-null data for that type,
+the total size of all that data, the amount of memory used in total, the
+amount that would be used if this type uses tags instead and the amount that
+would be thus saved.
+
+The `driver_data` line shows the number of devices which have non-NULL driver
+data.
+
+The `tags` line shows the number of tags and the memory used by those.
+
+At the bottom is an indication of the total memory usage obtained by undertaking
+various changes, none of which is currently implemented in U-Boot:
+
+With tags
+ Using tags instead of all attached types
+
+Singly linked
+ Using a singly linked list
+
+driver index
+ Using a driver index instead of a pointer
+
+uclass index
+ Using a uclass index instead of a pointer
+
+Drop device name
+ Using empty device names
+
+
+dm static
+~~~~~~~~~
+
+This shows devices bound by platform data, i.e. not from the device tree. There
+are normally none of these, but some boards may use static devices for space
+reasons.
+
+
+dm tree
+~~~~~~~
+
+This shows the full tree of devices including the following fields:
+
+uclass
+ Shows the name of the uclass for the device
+
+Index
+ Shows the index number of the device, within the uclass. This shows the
+ ordering within the uclass, but not the sequence number.
+
+Probed
+ Shows `+` if the device is active
+
+Driver
+ Shows the name of the driver that this device uses
+
+Name
+ Shows the device name as well as the tree structure, since child devices are
+ shown attached to their parent.
+
+
+dm uclass
+~~~~~~~~~
+
+This shows each uclass along with a list of devices in that uclass. The uclass
+ID is shown (e.g. uclass 7) and its name.
+
+For each device, the format is::
+
+ n name @ a, seq s
+
+where `n` is the index within the uclass, `a` is the address of the device in
+memory and `s` is the sequence number of the device.
+
+
+Examples
+--------
+
+dm compat
+~~~~~~~~~
+
+This example shows an abridged version of the sandbox output::
+
+ => dm compat
+ Driver Compatible
+ --------------------------------
+ act8846_reg
+ sandbox_adder sandbox,adder
+ axi_sandbox_bus sandbox,axi
+ blk_partition
+ bootcount-rtc u-boot,bootcount-rtc
+ ...
+ rockchip_rk805 rockchip,rk805
+ rockchip,rk808
+ rockchip,rk809
+ rockchip,rk816
+ rockchip,rk817
+ rockchip,rk818
+ root_driver
+ rtc-rv8803 microcrystal,rv8803
+ epson,rx8803
+ epson,rx8900
+ ...
+ wdt_gpio linux,wdt-gpio
+ wdt_sandbox sandbox,wdt
+
+
+dm devres
+~~~~~~~~~
+
+This example shows an abridged version of the sandbox test output (running
+U-Boot with the -T flag)::
+
+ => dm devres
+ - root_driver
+ - demo_shape_drv
+ - demo_simple_drv
+ - demo_shape_drv
+ ...
+ - h-test
+ - devres-test
+ 00000000130194e0 (100 byte) devm_kmalloc_release BIND
+ - another-test
+ ...
+ - syscon@3
+ - a-mux-controller
+ 0000000013025e60 (96 byte) devm_kmalloc_release PROBE
+ 0000000013025f00 (24 byte) devm_kmalloc_release PROBE
+ 0000000013026010 (24 byte) devm_kmalloc_release PROBE
+ 0000000013026070 (24 byte) devm_kmalloc_release PROBE
+ 00000000130260d0 (24 byte) devm_kmalloc_release PROBE
+ - syscon@3
+ - a-mux-controller
+ 0000000013026150 (96 byte) devm_kmalloc_release PROBE
+ 00000000130261f0 (24 byte) devm_kmalloc_release PROBE
+ 0000000013026300 (24 byte) devm_kmalloc_release PROBE
+ 0000000013026360 (24 byte) devm_kmalloc_release PROBE
+ 00000000130263c0 (24 byte) devm_kmalloc_release PROBE
+ - emul-mux-controller
+ 0000000013025fa0 (32 byte) devm_kmalloc_release PROBE
+ - testfdtm0
+ - testfdtm1
+ ...
+ - pinmux_spi0_pins
+ - pinmux_uart0_pins
+ - pinctrl-single-bits
+ 0000000013229180 (320 byte) devm_kmalloc_release PROBE
+ 0000000013229300 (40 byte) devm_kmalloc_release PROBE
+ 0000000013229370 (160 byte) devm_kmalloc_release PROBE
+ 000000001322c190 (40 byte) devm_kmalloc_release PROBE
+ 000000001322c200 (32 byte) devm_kmalloc_release PROBE
+ - pinmux_i2c0_pins
+ ...
+ - reg@0
+ - reg@1
+
+
+dm drivers
+~~~~~~~~~~
+
+This example shows an abridged version of the sandbox output::
+
+ => dm drivers
+ Driver uid uclass Devices
+ ----------------------------------------------------------
+ act8846_reg 087 regulator <none>
+ sandbox_adder 021 axi adder
+ adder
+ axi_sandbox_bus 021 axi axi@0
+ ...
+ da7219 061 misc <none>
+ demo_shape_drv 001 demo demo_shape_drv
+ demo_shape_drv
+ demo_shape_drv
+ demo_simple_drv 001 demo demo_simple_drv
+ demo_simple_drv
+ testfdt_drv 003 testfdt a-test
+ b-test
+ d-test
+ e-test
+ f-test
+ g-test
+ another-test
+ chosen-test
+ testbus_drv 005 testbus some-bus
+ mmio-bus@0
+ mmio-bus@1
+ dsa-port 039 ethernet lan0
+ lan1
+ dsa_sandbox 035 dsa dsa-test
+ eep_sandbox 121 w1_eeprom <none>
+ ...
+ pfuze100_regulator 087 regulator <none>
+ phy_sandbox 077 phy bind-test-child1
+ gen_phy@0
+ gen_phy@1
+ gen_phy@2
+ pinconfig 078 pinconfig gpios
+ gpio0
+ gpio1
+ gpio2
+ gpio3
+ i2c
+ groups
+ pins
+ i2s
+ spi
+ cs
+ pinmux_pwm_pins
+ pinmux_spi0_pins
+ pinmux_uart0_pins
+ pinmux_i2c0_pins
+ pinmux_lcd_pins
+ pmc_sandbox 017 power-mgr pci@1e,0
+ act8846 pmic 080 pmic <none>
+ max77686_pmic 080 pmic <none>
+ mc34708_pmic 080 pmic pmic@41
+ ...
+ wdt_gpio 122 watchdog gpio-wdt
+ wdt_sandbox 122 watchdog wdt@0
+ =>
+
+
+dm mem
+~~~~~~
+
+This example shows the sandbox output::
+
+ > dm mem
+ Struct sizes: udevice b0, driver 80, uclass 30, uc_driver 78
+ Memory: device fe:aea0, device names a16, uclass 5e:11a0
+
+ Attached type Count Size Cur Tags Save
+ --------------- ----- ----- ----- ----- -----
+ plat 45 a8f aea0 a7c4 6dc (1756)
+ parent_plat 1a 3b8 aea0 a718 788 (1928)
+ uclass_plat 3d 6b4 aea0 a7a4 6fc (1788)
+ priv 8a 68f3 aea0 a8d8 5c8 (1480)
+ parent_priv 8 38a0 aea0 a6d0 7d0 (2000)
+ uclass_priv 4e 14a6 aea0 a7e8 6b8 (1720)
+ driver_data f 0 aea0 a6ec 7b4 (1972)
+ uclass 6 20
+ Attached total 191 cb54 3164 (12644)
+ tags 0 0
+
+ Total size: 18b94 (101268)
+
+ With tags: 15a30 (88624)
+ - singly-linked: 14260 (82528)
+ - driver index: 13b6e (80750)
+ - uclass index: 1347c (78972)
+ Drop device name (not SRAM): a16 (2582)
+ =>
+
+
+dm static
+~~~~~~~~~
+
+This example shows the sandbox output::
+
+ => dm static
+ Driver Address
+ ---------------------------------
+ demo_shape_drv 0000562edab8dca0
+ demo_simple_drv 0000562edab8dca0
+ demo_shape_drv 0000562edab8dc90
+ demo_simple_drv 0000562edab8dc80
+ demo_shape_drv 0000562edab8dc80
+ test_drv 0000562edaae8840
+ test_drv 0000562edaae8848
+ test_drv 0000562edaae8850
+ sandbox_gpio 0000000000000000
+ mod_exp_sw 0000000000000000
+ sandbox_test_proc 0000562edabb5330
+ qfw_sandbox 0000000000000000
+ sandbox_timer 0000000000000000
+ sandbox_serial 0000562edaa8ed00
+ sysreset_sandbox 0000000000000000
+
+
+dm tree
+-------
+
+This example shows the abridged sandbox output::
+
+ => dm tree
+ Class Index Probed Driver Name
+ -----------------------------------------------------------
+ root 0 [ + ] root_driver root_driver
+ demo 0 [ ] demo_shape_drv |-- demo_shape_drv
+ demo 1 [ ] demo_simple_drv |-- demo_simple_drv
+ demo 2 [ ] demo_shape_drv |-- demo_shape_drv
+ demo 3 [ ] demo_simple_drv |-- demo_simple_drv
+ demo 4 [ ] demo_shape_drv |-- demo_shape_drv
+ test 0 [ ] test_drv |-- test_drv
+ test 1 [ ] test_drv |-- test_drv
+ test 2 [ ] test_drv |-- test_drv
+ ..
+ sysreset 0 [ ] sysreset_sandbox |-- sysreset_sandbox
+ bootstd 0 [ ] bootstd_drv |-- bootstd
+ bootmeth 0 [ ] bootmeth_distro | |-- syslinux
+ bootmeth 1 [ ] bootmeth_efi | `-- efi
+ reboot-mod 0 [ ] reboot-mode-gpio |-- reboot-mode0
+ reboot-mod 1 [ ] reboot-mode-rtc |-- reboot-mode@14
+ ...
+ ethernet 7 [ + ] dsa-port | `-- lan1
+ pinctrl 0 [ + ] sandbox_pinctrl_gpio |-- pinctrl-gpio
+ gpio 1 [ + ] sandbox_gpio | |-- base-gpios
+ nop 0 [ + ] gpio_hog | | |-- hog_input_active_low
+ nop 1 [ + ] gpio_hog | | |-- hog_input_active_high
+ nop 2 [ + ] gpio_hog | | |-- hog_output_low
+ nop 3 [ + ] gpio_hog | | `-- hog_output_high
+ gpio 2 [ ] sandbox_gpio | |-- extra-gpios
+ gpio 3 [ ] sandbox_gpio | `-- pinmux-gpios
+ i2c 0 [ + ] sandbox_i2c |-- i2c@0
+ i2c_eeprom 0 [ ] i2c_eeprom | |-- eeprom@2c
+ i2c_eeprom 1 [ ] i2c_eeprom_partition | | `-- bootcount@10
+ rtc 0 [ ] sandbox_rtc | |-- rtc@43
+ rtc 1 [ + ] sandbox_rtc | |-- rtc@61
+ i2c_emul_p 0 [ + ] sandbox_i2c_emul_par | |-- emul
+ i2c_emul 0 [ ] sandbox_i2c_eeprom_e | | |-- emul-eeprom
+ i2c_emul 1 [ ] sandbox_i2c_rtc_emul | | |-- emul0
+ i2c_emul 2 [ + ] sandbox_i2c_rtc_emul | | |-- emull
+ i2c_emul 3 [ ] sandbox_i2c_pmic_emu | | |-- pmic-emul0
+ i2c_emul 4 [ ] sandbox_i2c_pmic_emu | | `-- pmic-emul1
+ pmic 0 [ ] sandbox_pmic | |-- sandbox_pmic
+ regulator 0 [ ] sandbox_buck | | |-- buck1
+ regulator 1 [ ] sandbox_buck | | |-- buck2
+ regulator 2 [ ] sandbox_ldo | | |-- ldo1
+ regulator 3 [ ] sandbox_ldo | | |-- ldo2
+ regulator 4 [ ] sandbox_buck | | `-- no_match_by_nodename
+ pmic 1 [ ] mc34708_pmic | `-- pmic@41
+ bootcount 0 [ + ] bootcount-rtc |-- bootcount@0
+ bootcount 1 [ ] bootcount-i2c-eeprom |-- bootcount
+ ...
+ clk 4 [ ] fixed_clock |-- osc
+ firmware 0 [ ] sandbox_firmware |-- sandbox-firmware
+ scmi_agent 0 [ ] sandbox-scmi_agent `-- scmi
+ clk 5 [ ] scmi_clk |-- protocol@14
+ reset 2 [ ] scmi_reset_domain |-- protocol@16
+ nop 8 [ ] scmi_voltage_domain `-- regulators
+ regulator 5 [ ] scmi_regulator |-- reg@0
+ regulator 6 [ ] scmi_regulator `-- reg@1
+ =>
+
+
+dm uclass
+~~~~~~~~~
+
+This example shows the abridged sandbox output::
+
+ => dm uclass
+ uclass 0: root
+ 0 * root_driver @ 03015460, seq 0
+
+ uclass 1: demo
+ 0 demo_shape_drv @ 03015560, seq 0
+ 1 demo_simple_drv @ 03015620, seq 1
+ 2 demo_shape_drv @ 030156e0, seq 2
+ 3 demo_simple_drv @ 030157a0, seq 3
+ 4 demo_shape_drv @ 03015860, seq 4
+
+ uclass 2: test
+ 0 test_drv @ 03015980, seq 0
+ 1 test_drv @ 03015a60, seq 1
+ 2 test_drv @ 03015b40, seq 2
+ ...
+ uclass 20: audio-codec
+ 0 audio-codec @ 030168e0, seq 0
+
+ uclass 21: axi
+ 0 adder @ 0301db60, seq 1
+ 1 adder @ 0301dc40, seq 2
+ 2 axi@0 @ 030217d0, seq 0
+
+ uclass 22: blk
+ 0 mmc2.blk @ 0301ca00, seq 0
+ 1 mmc1.blk @ 0301cee0, seq 1
+ 2 mmc0.blk @ 0301d380, seq 2
+
+ uclass 23: bootcount
+ 0 * bootcount@0 @ 0301b3f0, seq 0
+ 1 bootcount @ 0301b4b0, seq 1
+ 2 bootcount_4@0 @ 0301b570, seq 2
+ 3 bootcount_2@0 @ 0301b630, seq 3
+
+ uclass 24: bootdev
+ 0 mmc2.bootdev @ 0301cbb0, seq 0
+ 1 mmc1.bootdev @ 0301d050, seq 1
+ 2 mmc0.bootdev @ 0301d4f0, seq 2
+
+ ...
+ uclass 78: pinconfig
+ 0 gpios @ 03022410, seq 0
+ 1 gpio0 @ 030224d0, seq 1
+ 2 gpio1 @ 03022590, seq 2
+ 3 gpio2 @ 03022650, seq 3
+ 4 gpio3 @ 03022710, seq 4
+ 5 i2c @ 030227d0, seq 5
+ 6 groups @ 03022890, seq 6
+ 7 pins @ 03022950, seq 7
+ 8 i2s @ 03022a10, seq 8
+ 9 spi @ 03022ad0, seq 9
+ 10 cs @ 03022b90, seq 10
+ 11 pinmux_pwm_pins @ 03022e10, seq 11
+ 12 pinmux_spi0_pins @ 03022ed0, seq 12
+ 13 pinmux_uart0_pins @ 03022f90, seq 13
+ 14 * pinmux_i2c0_pins @ 03023130, seq 14
+ 15 * pinmux_lcd_pins @ 030231f0, seq 15
+
+ ...
+ uclass 119: virtio
+ 0 sandbox_virtio1 @ 030220d0, seq 0
+ 1 sandbox_virtio2 @ 03022190, seq 1
+
+ uclass 120: w1
+ uclass 121: w1_eeprom
+ uclass 122: watchdog
+ 0 * gpio-wdt @ 0301c070, seq 0
+ 1 * wdt@0 @ 03021710, seq 1
+
+ =>
diff --git a/doc/usage/cmd/loadm.rst b/doc/usage/cmd/loadm.rst
new file mode 100644
index 0000000..b657114
--- /dev/null
+++ b/doc/usage/cmd/loadm.rst
@@ -0,0 +1,49 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+loadm command
+=============
+
+Synopsis
+--------
+
+::
+
+ loadm <src_addr> <dst_addr> <len>
+
+Description
+-----------
+
+The loadm command is used to copy memory content from source address
+to destination address and, if efi is enabled, will setup a "Mem" efi
+boot device.
+
+The number of transferred bytes must be set by bytes parameter
+
+src_addr
+ start address of the memory location to be loaded
+
+dst_addr
+ destination address of the byte stream to be loaded
+
+len
+ number of bytes to be copied in hexadecimal. Can not be 0 (zero).
+
+Example
+-------
+
+::
+
+ => loadm ${kernel_addr} ${kernel_addr_r} ${kernel_size}
+ loaded bin to memory: size: 12582912
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADM=y.
+
+Return value
+------------
+
+The return value $? is set 0 (true) if the loading is succefull, and
+is set to 1 (false) in case of error.
+
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 7704184..8b98629 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -33,6 +33,7 @@ Shell commands
cmd/bootz
cmd/cbsysinfo
cmd/conitrace
+ cmd/dm
cmd/echo
cmd/env
cmd/event
@@ -44,6 +45,7 @@ Shell commands
cmd/fatload
cmd/for
cmd/load
+ cmd/loadm
cmd/loady
cmd/mbr
cmd/md
generated by cgit v1.1 at 2024-12-25 07:37:55 +0000