diff options
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mpc8308rdb/sdram.c | 4 | ||||
-rw-r--r-- | board/freescale/mpc8313erdb/sdram.c | 8 | ||||
-rw-r--r-- | board/freescale/mpc8315erdb/sdram.c | 2 | ||||
-rw-r--r-- | board/freescale/mpc8349emds/mpc8349emds.c | 8 | ||||
-rw-r--r-- | board/freescale/mpc8349itx/mpc8349itx.c | 8 | ||||
-rw-r--r-- | board/freescale/mpc837xemds/mpc837xemds.c | 2 | ||||
-rw-r--r-- | board/freescale/mpc837xerdb/mpc837xerdb.c | 2 | ||||
-rw-r--r-- | board/gdsys/mpc8308/sdram.c | 4 | ||||
-rw-r--r-- | board/ids/ids8313/ids8313.c | 2 | ||||
-rw-r--r-- | board/mpc8308_p1m/sdram.c | 4 | ||||
-rw-r--r-- | board/sbc8349/sbc8349.c | 8 | ||||
-rw-r--r-- | board/ve8313/ve8313.c | 8 |
12 files changed, 30 insertions, 30 deletions
diff --git a/board/freescale/mpc8308rdb/sdram.c b/board/freescale/mpc8308rdb/sdram.c index e64b310..317e63e 100644 --- a/board/freescale/mpc8308rdb/sdram.c +++ b/board/freescale/mpc8308rdb/sdram.c @@ -33,7 +33,7 @@ static long fixed_sdram(void) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000); + CONFIG_SYS_SDRAM_BASE & 0xfffff000); out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); @@ -61,7 +61,7 @@ static long fixed_sdram(void) setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN); sync(); - return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); + return get_ram_size(CONFIG_SYS_SDRAM_BASE, msize); } int dram_init(void) diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index 5e074e3..090412d 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -47,7 +47,7 @@ static long fixed_sdram(void) volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; @@ -57,12 +57,12 @@ static long fixed_sdram(void) */ __udelay(50000); -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif im->ddr.csbnds[0].csbnds = - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA); im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c index b9f94c8..2f0f29a 100644 --- a/board/freescale/mpc8315erdb/sdram.c +++ b/board/freescale/mpc8315erdb/sdram.c @@ -44,7 +44,7 @@ static long fixed_sdram(void) u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index ea018e5..f14276f 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -91,7 +91,7 @@ int fixed_sdram(void) u32 ddr_size = msize << 20; /* DDR size in bytes */ u32 ddr_size_log2 = __ilog2(ddr_size); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); #if (CONFIG_SYS_DDR_SIZE != 256) @@ -112,12 +112,12 @@ int fixed_sdram(void) im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; #else -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif im->ddr.csbnds[2].csbnds = - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + ddr_size - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA); im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index aaaea7c..81b3f00 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -37,14 +37,14 @@ int fixed_sdram(void) im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif im->ddr.csbnds[0].csbnds = - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + ddr_size - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA); im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG; diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 09a046d..1692208 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -252,7 +252,7 @@ int fixed_sdram(void) u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); #if (CONFIG_SYS_DDR_SIZE != 512) diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index d9a47b9..18f396a 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -95,7 +95,7 @@ int fixed_sdram(void) u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c index 5ced8eb..3eb0e37 100644 --- a/board/gdsys/mpc8308/sdram.c +++ b/board/gdsys/mpc8308/sdram.c @@ -34,7 +34,7 @@ static long fixed_sdram(void) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000); + CONFIG_SYS_SDRAM_BASE & 0xfffff000); out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); @@ -62,7 +62,7 @@ static long fixed_sdram(void) setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN); sync(); - return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); + return get_ram_size(CONFIG_SYS_SDRAM_BASE, msize); } int dram_init(void) diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c index a37ca8a..a66234a 100644 --- a/board/ids/ids8313/ids8313.c +++ b/board/ids/ids8313/ids8313.c @@ -57,7 +57,7 @@ int fixed_sdram(unsigned long config) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - (CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000)); + (CONFIG_SYS_SDRAM_BASE & 0xfffff000)); out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); sync(); diff --git a/board/mpc8308_p1m/sdram.c b/board/mpc8308_p1m/sdram.c index 4118c01..baf70d8 100644 --- a/board/mpc8308_p1m/sdram.c +++ b/board/mpc8308_p1m/sdram.c @@ -29,7 +29,7 @@ static long fixed_sdram(void) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000); + CONFIG_SYS_SDRAM_BASE & 0xfffff000); out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); @@ -57,7 +57,7 @@ static long fixed_sdram(void) setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN); sync(); - return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize); + return get_ram_size(CONFIG_SYS_SDRAM_BASE, msize); } int dram_init(void) diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index 5584b3d..e51eeae 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -79,19 +79,19 @@ int fixed_sdram(void) u32 ddr_size = msize << 20; /* DDR size in bytes */ u32 ddr_size_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); #if (CONFIG_SYS_DDR_SIZE != 256) #warning Currently any ddr size other than 256 is not supported #endif -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif im->ddr.csbnds[2].csbnds = - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + ddr_size - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA); im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c index 609585b..f4148a2 100644 --- a/board/ve8313/ve8313.c +++ b/board/ve8313/ve8313.c @@ -38,7 +38,7 @@ static long fixed_sdram(void) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - (CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000)); + (CONFIG_SYS_SDRAM_BASE & 0xfffff000)); out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1))); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); @@ -48,12 +48,12 @@ static long fixed_sdram(void) */ __udelay(50000); -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif out_be32(&im->ddr.csbnds[0].csbnds, - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA)); out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG); |