diff options
Diffstat (limited to 'board')
151 files changed, 1783 insertions, 2968 deletions
diff --git a/board/BuS/eb_cpu5282/u-boot.lds b/board/BuS/eb_cpu5282/u-boot.lds index 43bd9b7..c72043d 100644 --- a/board/BuS/eb_cpu5282/u-boot.lds +++ b/board/BuS/eb_cpu5282/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds index 3ff3871..2b76e92 100644 --- a/board/LEOX/elpt860/u-boot.lds +++ b/board/LEOX/elpt860/u-boot.lds @@ -112,6 +112,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds index c2ec827..3334a44 100644 --- a/board/RPXClassic/u-boot.lds +++ b/board/RPXClassic/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds index c2ec827..3334a44 100644 --- a/board/RPXlite/u-boot.lds +++ b/board/RPXlite/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds index c2ec827..3334a44 100644 --- a/board/RPXlite_dw/u-boot.lds +++ b/board/RPXlite_dw/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds index f9d2ec2..84bb763 100644 --- a/board/RRvision/u-boot.lds +++ b/board/RRvision/u-boot.lds @@ -98,6 +98,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/a3m071/README b/board/a3m071/README index 7698614..a0fe832 100644 --- a/board/a3m071/README +++ b/board/a3m071/README @@ -62,7 +62,7 @@ the following command: All this can be integrated into an environment command: => setenv upd_fdt 'tftp 1800000 a3m071/a3m071.dtb;run mtdargs addip2 addtty; \ - fdt addr 1800000;fdt boardsetup;erase fc060000 fc07ffff; \ + fdt addr 1800000;fdt boardsetup;fdt chosen;erase fc060000 fc07ffff; \ cp.b 1800000 fc060000 10000' => saveenv diff --git a/board/a3m071/a3m071.c b/board/a3m071/a3m071.c index 89ced82..0f9f883 100644 --- a/board/a3m071/a3m071.c +++ b/board/a3m071/a3m071.c @@ -24,10 +24,15 @@ #include <mpc5xxx.h> #include <pci.h> #include <miiphy.h> +#include <linux/compiler.h> #include <asm/processor.h> #include <asm/io.h> +#ifdef CONFIG_A4M2K +#include "is46r16320d.h" +#else #include "mt46v16m16-75.h" +#endif DECLARE_GLOBAL_DATA_PTR; @@ -63,6 +68,12 @@ static void sdram_start(int hi_addr) /* normal operation */ out_be32((void *)MPC5XXX_SDRAM_CTRL, control); + + /* + * Wait a short while for the DLL to lock before accessing + * the SDRAM + */ + udelay(100); } #endif @@ -157,12 +168,6 @@ static void get_revisions(int *failsavelevel, int *digiboardversion, struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT; u8 val; - /* - * Figure out failsavelevel - * see ticket dsvk#59 - */ - *failsavelevel = 0; /* 0=failsave, 1=board ok, 2=fpga ok */ - /* read digitalboard-version from TMR[2..4] */ val = 0; val |= (gpt->gpt2.sr & (1 << (31 - 23))) ? (1) : 0; @@ -170,6 +175,17 @@ static void get_revisions(int *failsavelevel, int *digiboardversion, val |= (gpt->gpt4.sr & (1 << (31 - 23))) ? (1 << 2) : 0; *digiboardversion = val; + /* + * A4M2K only supports digiboardversion. No failsavelevel and + * fpgaversion here. + */ +#if !defined(CONFIG_A4M2K) + /* + * Figure out failsavelevel + * see ticket dsvk#59 + */ + *failsavelevel = 0; /* 0=failsave, 1=board ok, 2=fpga ok */ + if (*digiboardversion == 0) { *failsavelevel = 1; /* digiboard-version ok */ @@ -183,6 +199,7 @@ static void get_revisions(int *failsavelevel, int *digiboardversion, if (*fpgaversion == 1) *failsavelevel = 2; /* fpga-version ok */ } +#endif } /* @@ -196,6 +213,11 @@ void spl_board_init(void) struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; struct mpc5xxx_mmap_ctl *mm = (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR; + +#if defined(CONFIG_A4M2K) + /* enable CS3 and CS5 (FPGA) */ + setbits_be32(&mm->ipbi_ws_ctrl, (1 << 19) | (1 << 21)); +#else int digiboardversion; int failsavelevel; int fpgaversion; @@ -219,6 +241,7 @@ void spl_board_init(void) /* And write new value back to register */ out_be32(&mm->ipbi_ws_ctrl, val); +#endif /* * No need to change the pin multiplexing (MPC5XXX_GPS_PORT_CONFIG) @@ -232,8 +255,57 @@ void spl_board_init(void) * MPC5XXX_WU_GPIO_DIR direction is already 0 (INPUT) * set bit 0(msb) to 1 */ - setbits_be32((void *)MPC5XXX_WU_GPIO_ENABLE, 1 << (31 - 0)); + setbits_be32((void *)MPC5XXX_WU_GPIO_ENABLE, CONFIG_WDOG_GPIO_PIN); + +#if defined(CONFIG_A4M2K) + /* Setup USB[x] as MPCDiag[0..3] GPIO outputs */ + + /* set USB0,6,7,8 (MPCDiag[0..3]) direction to output */ + gpio->simple_ddr |= 1 << (31 - 15); + gpio->simple_ddr |= 1 << (31 - 14); + gpio->simple_ddr |= 1 << (31 - 13); + gpio->simple_ddr |= 1 << (31 - 12); + + /* enable USB0,6,7,8 (MPCDiag[0..3]) as GPIO */ + gpio->simple_gpioe |= 1 << (31 - 15); + gpio->simple_gpioe |= 1 << (31 - 14); + gpio->simple_gpioe |= 1 << (31 - 13); + gpio->simple_gpioe |= 1 << (31 - 12); + + /* Setup PSC2[0..2] as STSLED[0..2] GPIO outputs */ + + /* set PSC2[0..2] (STSLED[0..2]) direction to output */ + gpio->simple_ddr |= 1 << (31 - 27); + gpio->simple_ddr |= 1 << (31 - 26); + gpio->simple_ddr |= 1 << (31 - 25); + + /* enable PSC2[0..2] (STSLED[0..2]) as GPIO */ + gpio->simple_gpioe |= 1 << (31 - 27); + gpio->simple_gpioe |= 1 << (31 - 26); + gpio->simple_gpioe |= 1 << (31 - 25); + + /* Setup PSC6[2] as MRST2 self reset GPIO output */ + + /* set PSC6[2]/IRDA_TX (MRST2) direction to output */ + gpio->simple_ddr |= 1 << (31 - 3); + + /* set PSC6[2]/IRDA_TX (MRST2) output as open drain */ + gpio->simple_ode |= 1 << (31 - 3); + /* set PSC6[2]/IRDA_TX (MRST2) output as default high */ + gpio->simple_dvo |= 1 << (31 - 3); + + /* enable PSC6[2]/IRDA_TX (MRST2) as GPIO */ + gpio->simple_gpioe |= 1 << (31 - 3); + + /* Setup PSC6[3] as HARNSSCD harness code GPIO input */ + + /* set PSC6[3]/IR_USB_CLK (HARNSSCD) direction to input */ + gpio->simple_ddr |= 0 << (31 - 2); + + /* enable PSC6[3]/IR_USB_CLK (HARNSSCD) as GPIO */ + gpio->simple_gpioe |= 1 << (31 - 2); +#else /* setup GPIOs for status-leds if needed - see ticket #57 */ if (failsavelevel > 0) { /* digiboard-version is OK */ @@ -267,7 +339,7 @@ void spl_board_init(void) * already cleared (intr_ctrl) MBAR+0x0510 ECLR[0] bit above */ } - +#endif } int checkboard(void) @@ -278,11 +350,16 @@ int checkboard(void) get_revisions(&failsavelevel, &digiboardversion, &fpgaversion); +#ifdef CONFIG_A4M2K + puts("Board: A4M2K\n"); + printf(" digiboard IO version %u\n", digiboardversion); +#else puts("Board: A3M071\n"); printf("Rev: failsave level %u\n", failsavelevel); printf(" digiboard IO version %u\n", digiboardversion); if (failsavelevel > 0) /* only if fpga-version red */ printf(" fpga IO version %u\n", fpgaversion); +#endif return 0; } @@ -333,3 +410,57 @@ int spl_start_uboot(void) return 1; } #endif + +#if defined(CONFIG_HW_WATCHDOG) +static int watchdog_toggle; + +void hw_watchdog_reset(void) +{ + int val; + + /* + * Check if watchdog is enabled via user command + */ + if ((gd->flags & GD_FLG_RELOC) && watchdog_toggle) { + /* Set direction to output */ + setbits_be32((void *)MPC5XXX_WU_GPIO_DIR, CONFIG_WDOG_GPIO_PIN); + + /* + * Toggle watchdog output + */ + val = (in_be32((void *)MPC5XXX_WU_GPIO_DATA_O) & + CONFIG_WDOG_GPIO_PIN); + if (val) { + clrbits_be32((void *)MPC5XXX_WU_GPIO_DATA_O, + CONFIG_WDOG_GPIO_PIN); + } else { + setbits_be32((void *)MPC5XXX_WU_GPIO_DATA_O, + CONFIG_WDOG_GPIO_PIN); + } + } +} + +int do_wdog_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (argc != 2) + goto usage; + + if (strncmp(argv[1], "on", 2) == 0) + watchdog_toggle = 1; + else if (strncmp(argv[1], "off", 3) == 0) + watchdog_toggle = 0; + else + goto usage; + + return 0; +usage: + printf("Usage: wdogtoggle %s\n", cmdtp->usage); + return 1; +} + +U_BOOT_CMD( + wdogtoggle, CONFIG_SYS_MAXARGS, 2, do_wdog_toggle, + "toggle GPIO pin to service watchdog", + "[on/off] - Switch watchdog toggling via GPIO pin on/off" +); +#endif diff --git a/board/a3m071/is46r16320d.h b/board/a3m071/is46r16320d.h new file mode 100644 index 0000000..8183d81 --- /dev/null +++ b/board/a3m071/is46r16320d.h @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define SDRAM_DDR /* is DDR */ + +#if defined(CONFIG_MPC5200) +/* Settings for XLB = 132 MHz */ +/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */ + +/* SDRAM Config Standard timing */ +#define SDRAM_MODE 0x008d0000 +#define SDRAM_EMODE 0x40010000 +#define SDRAM_CONTROL 0x70430f00 +#define SDRAM_CONFIG1 0x33622930 +#define SDRAM_CONFIG2 0x46670000 +#define SDRAM_TAPDELAY 0x10000000 + +#else +#error CONFIG_MPC5200 not defined +#endif diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds index 7cf5b46..c76728a 100644 --- a/board/actux1/u-boot.lds +++ b/board/actux1/u-boot.lds @@ -81,10 +81,10 @@ SECTIONS .bss __bss_start (OVERLAY) : { *(.bss*) . = ALIGN(4); - ___bssend___ = .; + __bss_end = .; } - .bss_end ___bssend___ (OVERLAY) : { - KEEP(*(.__bss_end__)); + .bss_end __bss_end (OVERLAY) : { + KEEP(*(__bss_end)); } /DISCARD/ : { *(.dynstr*) } diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds index e9b5547..984f70e 100644 --- a/board/actux2/u-boot.lds +++ b/board/actux2/u-boot.lds @@ -81,10 +81,10 @@ SECTIONS .bss __bss_start (OVERLAY) : { *(.bss*) . = ALIGN(4); - ___bssend___ = .; + __bss_end = .; } - .bss_end ___bssend___ (OVERLAY) : { - KEEP(*(.__bss_end__)); + .bss_end __bss_end (OVERLAY) : { + KEEP(*(__bss_end)); } /DISCARD/ : { *(.dynstr*) } diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds index b79ea3c..fc48cf0 100644 --- a/board/actux3/u-boot.lds +++ b/board/actux3/u-boot.lds @@ -81,10 +81,10 @@ SECTIONS .bss __bss_start (OVERLAY) : { *(.bss*) . = ALIGN(4); - ___bssend___ = .; + __bss_end = .; } - .bss_end ___bssend___ (OVERLAY) : { - KEEP(*(.__bss_end__)); + .bss_end __bss_end (OVERLAY) : { + KEEP(*(__bss_end)); } /DISCARD/ : { *(.dynstr*) } diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds index 5e0ed00..def2f1f 100644 --- a/board/adder/u-boot.lds +++ b/board/adder/u-boot.lds @@ -89,7 +89,7 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } ENTRY(_start) diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds index 52c986e..dd9d52d 100644 --- a/board/ait/cam_enc_4xx/u-boot-spl.lds +++ b/board/ait/cam_enc_4xx/u-boot-spl.lds @@ -65,7 +65,7 @@ SECTIONS __bss_start = .; *(.bss*) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } >.sram __image_copy_end = .; diff --git a/board/altera/nios2-generic/u-boot.lds b/board/altera/nios2-generic/u-boot.lds index 900fe65..f309598 100644 --- a/board/altera/nios2-generic/u-boot.lds +++ b/board/altera/nios2-generic/u-boot.lds @@ -102,7 +102,7 @@ SECTIONS *(.scommon) } . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; PROVIDE (end = .); /* DEBUG -- symbol table, string table, etc. etc. diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds index 3861b67..e9f026f 100644 --- a/board/amcc/acadia/u-boot-nand.lds +++ b/board/amcc/acadia/u-boot-nand.lds @@ -98,6 +98,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds index 6308d49..209f484 100644 --- a/board/amcc/bamboo/u-boot-nand.lds +++ b/board/amcc/bamboo/u-boot-nand.lds @@ -99,6 +99,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds index 5fc9062..3d61613 100644 --- a/board/amcc/canyonlands/u-boot-nand.lds +++ b/board/amcc/canyonlands/u-boot-nand.lds @@ -99,6 +99,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds index 3861b67..e9f026f 100644 --- a/board/amcc/kilauea/u-boot-nand.lds +++ b/board/amcc/kilauea/u-boot-nand.lds @@ -98,6 +98,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds index b4600de..2ea3944 100644 --- a/board/amcc/sequoia/u-boot-nand.lds +++ b/board/amcc/sequoia/u-boot-nand.lds @@ -99,6 +99,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds index 521d12a..1b537f6 100644 --- a/board/amcc/sequoia/u-boot-ram.lds +++ b/board/amcc/sequoia/u-boot-ram.lds @@ -90,6 +90,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/astro/mcf5373l/u-boot.lds b/board/astro/mcf5373l/u-boot.lds index 5ee8fcc..264e43f 100644 --- a/board/astro/mcf5373l/u-boot.lds +++ b/board/astro/mcf5373l/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts index ae8217d..d0738cb 100644 --- a/board/chromebook-x86/dts/link.dts +++ b/board/chromebook-x86/dts/link.dts @@ -21,4 +21,15 @@ chosen { }; memory { device_type = "memory"; reg = <0 0>; }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich9"; + spi-flash@0 { + reg = <0>; + compatible = "winbond,w25q64", "spi-flash"; + memory-map = <0xff800000 0x00800000>; + }; + }; }; diff --git a/board/cm4008/flash.c b/board/cm4008/flash.c index 5522bf0..0faf197 100644 --- a/board/cm4008/flash.c +++ b/board/cm4008/flash.c @@ -29,6 +29,7 @@ #include <common.h> #include <linux/byteorder/swab.h> +#include <asm/sections.h> flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ diff --git a/board/cm41xx/flash.c b/board/cm41xx/flash.c index 5522bf0..0faf197 100644 --- a/board/cm41xx/flash.c +++ b/board/cm41xx/flash.c @@ -29,6 +29,7 @@ #include <common.h> #include <linux/byteorder/swab.h> +#include <asm/sections.h> flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index e0e8235..629ce4a 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -34,7 +34,9 @@ #include <i2c.h> #include <usb.h> #include <mmc.h> +#include <nand.h> #include <twl4030.h> +#include <bmp_layout.h> #include <linux/compiler.h> #include <asm/io.h> @@ -76,6 +78,65 @@ static u32 gpmc_nand_config[GPMC_MAX_REG] = { 0, }; +#ifdef CONFIG_LCD +#ifdef CONFIG_CMD_NAND +static int splash_load_from_nand(u32 bmp_load_addr) +{ + struct bmp_header *bmp_hdr; + int res, splash_screen_nand_offset = 0x100000; + size_t bmp_size, bmp_header_size = sizeof(struct bmp_header); + + if (bmp_load_addr + bmp_header_size >= gd->start_addr_sp) + goto splash_address_too_high; + + res = nand_read_skip_bad(&nand_info[nand_curr_device], + splash_screen_nand_offset, &bmp_header_size, + (u_char *)bmp_load_addr); + if (res < 0) + return res; + + bmp_hdr = (struct bmp_header *)bmp_load_addr; + bmp_size = le32_to_cpu(bmp_hdr->file_size); + + if (bmp_load_addr + bmp_size >= gd->start_addr_sp) + goto splash_address_too_high; + + return nand_read_skip_bad(&nand_info[nand_curr_device], + splash_screen_nand_offset, &bmp_size, + (u_char *)bmp_load_addr); + +splash_address_too_high: + printf("Error: splashimage address too high. Data overwrites U-Boot " + "and/or placed beyond DRAM boundaries.\n"); + + return -1; +} +#else +static inline int splash_load_from_nand(void) +{ + return -1; +} +#endif /* CONFIG_CMD_NAND */ + +int board_splash_screen_prepare(void) +{ + char *env_splashimage_value; + u32 bmp_load_addr; + + env_splashimage_value = getenv("splashimage"); + if (env_splashimage_value == NULL) + return -1; + + bmp_load_addr = simple_strtoul(env_splashimage_value, 0, 16); + if (bmp_load_addr == 0) { + printf("Error: bad splashimage address specified\n"); + return -1; + } + + return splash_load_from_nand(bmp_load_addr); +} +#endif /* CONFIG_LCD */ + /* * Routine: board_init * Description: hardware init. diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds index 7421eec..809a705 100644 --- a/board/cobra5272/u-boot.lds +++ b/board/cobra5272/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds index 357f59d..1f006d7 100644 --- a/board/cogent/u-boot.lds +++ b/board/cogent/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds index 987b52d..663100e 100644 --- a/board/dave/PPChameleonEVB/u-boot.lds +++ b/board/dave/PPChameleonEVB/u-boot.lds @@ -126,6 +126,6 @@ SECTIONS } :bss . = ALIGN(4); - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/davedenx/aria/aria.c b/board/davedenx/aria/aria.c index 31b079b..2290257 100644 --- a/board/davedenx/aria/aria.c +++ b/board/davedenx/aria/aria.c @@ -35,70 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* Clocks in use */ -#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ - CLOCK_SCCR1_LPC_EN | \ - CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ - CLOCK_SCCR1_PSCFIFO_EN | \ - CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN | \ - CLOCK_SCCR1_NFC_EN | \ - CLOCK_SCCR1_PATA_EN | \ - CLOCK_SCCR1_PCI_EN | \ - CLOCK_SCCR1_TPR_EN) - -#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_SPDIF_EN | \ - CLOCK_SCCR2_DIU_EN | \ - CLOCK_SCCR2_I2C_EN) - -int board_early_init_f(void) -{ - volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - u32 spridr; - - /* - * Initialize Local Window for the On Board FPGA access - */ - out_be32(&im->sysconf.lpcs2aw, - CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE) | - CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE, CONFIG_SYS_ARIA_FPGA_SIZE) - ); - out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); - sync_law(&im->sysconf.lpcs2aw); - - /* - * Initialize Local Window for the On Board SRAM access - */ - out_be32(&im->sysconf.lpcs6aw, - CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE) | - CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE, CONFIG_SYS_ARIA_SRAM_SIZE) - ); - out_be32(&im->lpc.cs_cfg[6], CONFIG_SYS_CS6_CFG); - sync_law(&im->sysconf.lpcs6aw); - - /* - * Configure Flash Speed - */ - out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); - - spridr = in_be32(&im->sysconf.spridr); - - if (SVR_MJREV(spridr) >= 2) - out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); - - /* - * Enable clocks - */ - out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); - out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); -#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) - setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -#endif - - return 0; -} - phys_size_t initdram (int board_type) { return fixed_sdram(NULL, NULL, 0); diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds index dd5f266..bc34fb5 100644 --- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds @@ -66,7 +66,7 @@ SECTIONS __bss_start = .; *(.bss*) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } >.sram __image_copy_end = .; diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds index b3a41af..2557830 100644 --- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds +++ b/board/davinci/da8xxevm/u-boot-spl-hawk.lds @@ -74,7 +74,7 @@ SECTIONS __bss_start = .; *(.bss*) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } _end = .; diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds index eb83b6f..b13d3e1 100644 --- a/board/dvlhost/u-boot.lds +++ b/board/dvlhost/u-boot.lds @@ -81,10 +81,10 @@ SECTIONS .bss __bss_start (OVERLAY) : { *(.bss*) . = ALIGN(4); - ___bssend___ = .; + __bss_end = .; } - .bss_end ___bssend___ (OVERLAY) : { - KEEP(*(.__bss_end__)); + .bss_end __bss_end (OVERLAY) : { + KEEP(*(__bss_end)); } /DISCARD/ : { *(.dynstr*) } diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds index bd74d74..a1481c8 100644 --- a/board/eltec/mhpc/u-boot.lds +++ b/board/eltec/mhpc/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds index ea04eca..e3f7d80 100644 --- a/board/emk/top860/u-boot.lds +++ b/board/emk/top860/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds index e5fa63e..c00b3c3 100644 --- a/board/ep88x/u-boot.lds +++ b/board/ep88x/u-boot.lds @@ -89,7 +89,7 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } ENTRY(_start) diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index cca527f..4297b8b 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -100,6 +100,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c index 748ad7c..e38678f 100644 --- a/board/esd/mecp5123/mecp5123.c +++ b/board/esd/mecp5123/mecp5123.c @@ -33,20 +33,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* Clocks in use */ -#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ - CLOCK_SCCR1_LPC_EN | \ - CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ - CLOCK_SCCR1_PSCFIFO_EN | \ - CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN | \ - CLOCK_SCCR1_NFC_EN | \ - CLOCK_SCCR1_PCI_EN | \ - CLOCK_SCCR1_TPR_EN) - -#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_I2C_EN) - int eeprom_write_enable(unsigned dev_addr, int state) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; @@ -65,18 +51,9 @@ int eeprom_write_enable(unsigned dev_addr, int state) int board_early_init_f(void) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - u32 spridr; int i; /* - * Initialize Local Window for NOR FLASH access - */ - out_be32(&im->sysconf.lpcs0aw, - CSAW_START(CONFIG_SYS_FLASH_BASE) | - CSAW_STOP(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE)); - sync_law(&im->sysconf.lpcs0aw); - - /* * Initialize Local Window for boot access */ out_be32(&im->sysconf.lpbaw, @@ -84,37 +61,6 @@ int board_early_init_f(void) sync_law(&im->sysconf.lpbaw); /* - * Initialize Local Window for VPC3 access - */ - out_be32(&im->sysconf.lpcs1aw, - CSAW_START(CONFIG_SYS_VPC3_BASE) | - CSAW_STOP(CONFIG_SYS_VPC3_BASE, CONFIG_SYS_VPC3_SIZE)); - sync_law(&im->sysconf.lpcs1aw); - - /* - * Configure Flash Speed - */ - out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); - - /* - * Configure VPC3 Speed - */ - out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG); - - spridr = in_be32(&im->sysconf.spridr); - if (SVR_MJREV(spridr) >= 2) - out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); - - /* - * Enable clocks - */ - out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); - out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); -#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) - setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -#endif - - /* * Configure MSCAN clocks */ for (i=0; i<4; ++i) { diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds index 4469b80..6a5cef6 100644 --- a/board/esd/pmc440/u-boot-nand.lds +++ b/board/esd/pmc440/u-boot-nand.lds @@ -129,6 +129,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds index 7642bba..a4d9da7 100644 --- a/board/esd/tasreg/u-boot.lds +++ b/board/esd/tasreg/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds index 357a794..642f1c9 100644 --- a/board/esteem192e/u-boot.lds +++ b/board/esteem192e/u-boot.lds @@ -101,6 +101,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index e2cfcfe..44c61eb 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds index 450103d..0e2206c 100644 --- a/board/fads/u-boot.lds +++ b/board/fads/u-boot.lds @@ -95,7 +95,7 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } ENTRY(_start) diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds index bd74d74..a1481c8 100644 --- a/board/flagadm/u-boot.lds +++ b/board/flagadm/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds index f3c9ed8..6f80e41 100644 --- a/board/freescale/m5208evbe/u-boot.lds +++ b/board/freescale/m5208evbe/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m52277evb/u-boot.lds b/board/freescale/m52277evb/u-boot.lds index ae0a48d..9db171e 100644 --- a/board/freescale/m52277evb/u-boot.lds +++ b/board/freescale/m52277evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5235evb/u-boot.lds b/board/freescale/m5235evb/u-boot.lds index 603858b..f11d483 100644 --- a/board/freescale/m5235evb/u-boot.lds +++ b/board/freescale/m5235evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds index 7421eec..809a705 100644 --- a/board/freescale/m5249evb/u-boot.lds +++ b/board/freescale/m5249evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds index 6838247..9de8885 100644 --- a/board/freescale/m5253demo/u-boot.lds +++ b/board/freescale/m5253demo/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds index 7421eec..809a705 100644 --- a/board/freescale/m5253evbe/u-boot.lds +++ b/board/freescale/m5253evbe/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds index e222e80..82b67d5 100644 --- a/board/freescale/m5271evb/u-boot.lds +++ b/board/freescale/m5271evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds index 7421eec..809a705 100644 --- a/board/freescale/m5272c3/u-boot.lds +++ b/board/freescale/m5272c3/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds index c18758a..fda4cf4 100644 --- a/board/freescale/m5275evb/u-boot.lds +++ b/board/freescale/m5275evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds index 20f6c47..cdfd0e4 100644 --- a/board/freescale/m5282evb/u-boot.lds +++ b/board/freescale/m5282evb/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds index 15dfa7d..c40c565 100644 --- a/board/freescale/m53017evb/u-boot.lds +++ b/board/freescale/m53017evb/u-boot.lds @@ -99,6 +99,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds index 5013ff4..f803e4a 100644 --- a/board/freescale/m5329evb/u-boot.lds +++ b/board/freescale/m5329evb/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds index 5ee8fcc..264e43f 100644 --- a/board/freescale/m5373evb/u-boot.lds +++ b/board/freescale/m5373evb/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m54418twr/u-boot.lds b/board/freescale/m54418twr/u-boot.lds index 2df386b..3247dbf 100644 --- a/board/freescale/m54418twr/u-boot.lds +++ b/board/freescale/m54418twr/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m54451evb/u-boot.lds b/board/freescale/m54451evb/u-boot.lds index 4440d61..fd1289e 100644 --- a/board/freescale/m54451evb/u-boot.lds +++ b/board/freescale/m54451evb/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m54455evb/u-boot.lds b/board/freescale/m54455evb/u-boot.lds index 2df386b..3247dbf 100644 --- a/board/freescale/m54455evb/u-boot.lds +++ b/board/freescale/m54455evb/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds index 269bf8a..bbe36f0 100644 --- a/board/freescale/m547xevb/u-boot.lds +++ b/board/freescale/m547xevb/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds index 68bdad4..9315927 100644 --- a/board/freescale/m548xevb/u-boot.lds +++ b/board/freescale/m548xevb/u-boot.lds @@ -94,6 +94,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 97eeab3..33a8aa5 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -38,25 +38,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* Clocks in use */ -#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ - CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN | \ - CLOCK_SCCR1_LPC_EN | \ - CLOCK_SCCR1_NFC_EN | \ - CLOCK_SCCR1_PATA_EN | \ - CLOCK_SCCR1_PCI_EN | \ - CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ - CLOCK_SCCR1_PSCFIFO_EN | \ - CLOCK_SCCR1_TPR_EN) - -#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_DIU_EN | \ - CLOCK_SCCR2_I2C_EN | \ - CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_SPDIF_EN | \ - CLOCK_SCCR2_USB1_EN | \ - CLOCK_SCCR2_USB2_EN) - void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip); /* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */ @@ -83,20 +64,6 @@ void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) int board_early_init_f(void) { - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - u32 spridr; - - /* - * Initialize Local Window for the CPLD registers access (CS2 selects - * the CPLD chip) - */ - out_be32(&im->sysconf.lpcs2aw, - CSAW_START(CONFIG_SYS_CPLD_BASE) | - CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE) - ); - out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); - sync_law(&im->sysconf.lpcs2aw); - /* * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control * @@ -114,25 +81,6 @@ int board_early_init_f(void) out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32); } #endif - /* - * Configure Flash Speed - */ - out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); - - spridr = in_be32(&im->sysconf.spridr); - - if (SVR_MJREV (spridr) >= 2) - out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); - - /* - * Enable clocks - */ - out_be32 (&im->clk.sccr[0], SCCR1_CLOCKS_EN); - out_be32 (&im->clk.sccr[1], SCCR2_CLOCKS_EN); -#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) - setbits_be32 (&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -#endif - return 0; } diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 2d08fea..264c4e8 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -87,10 +87,10 @@ SECTIONS .bss __bss_start (OVERLAY) : { *(.bss*) . = ALIGN(4); - ___bssend___ = .; + __bss_end = .; } - .bss_end ___bssend___ (OVERLAY) : { - KEEP(*(.__bss_end__)); + .bss_end __bss_end (OVERLAY) : { + KEEP(*(__bss_end)); } /DISCARD/ : { *(.bss*) } diff --git a/board/gaisler/gr_cpci_ax2000/u-boot.lds b/board/gaisler/gr_cpci_ax2000/u-boot.lds index dac87db..60039cc 100644 --- a/board/gaisler/gr_cpci_ax2000/u-boot.lds +++ b/board/gaisler/gr_cpci_ax2000/u-boot.lds @@ -134,7 +134,7 @@ SECTIONS . = ALIGN(16); /* to speed clearing of bss up */ } __bss_end = . ; - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); /* Relocated into main memory */ diff --git a/board/gaisler/gr_ep2s60/u-boot.lds b/board/gaisler/gr_ep2s60/u-boot.lds index 78e0e2d..ec73f73 100644 --- a/board/gaisler/gr_ep2s60/u-boot.lds +++ b/board/gaisler/gr_ep2s60/u-boot.lds @@ -134,7 +134,7 @@ SECTIONS . = ALIGN(16); /* to speed clearing of bss up */ } __bss_end = . ; - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); /* Relocated into main memory */ diff --git a/board/gaisler/gr_xc3s_1500/u-boot.lds b/board/gaisler/gr_xc3s_1500/u-boot.lds index 87ea473..18dfb81 100644 --- a/board/gaisler/gr_xc3s_1500/u-boot.lds +++ b/board/gaisler/gr_xc3s_1500/u-boot.lds @@ -135,7 +135,7 @@ SECTIONS . = ALIGN(16); /* to speed clearing of bss up */ } __bss_end = . ; - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); /* Relocated into main memory */ diff --git a/board/gaisler/grsim/u-boot.lds b/board/gaisler/grsim/u-boot.lds index e854a16..8de272e 100644 --- a/board/gaisler/grsim/u-boot.lds +++ b/board/gaisler/grsim/u-boot.lds @@ -134,7 +134,7 @@ SECTIONS . = ALIGN(16); /* to speed clearing of bss up */ } __bss_end = . ; - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); /* Relocated into main memory */ diff --git a/board/gaisler/grsim_leon2/u-boot.lds b/board/gaisler/grsim_leon2/u-boot.lds index f247e56..e57f734 100644 --- a/board/gaisler/grsim_leon2/u-boot.lds +++ b/board/gaisler/grsim_leon2/u-boot.lds @@ -133,7 +133,7 @@ SECTIONS . = ALIGN(16); /* to speed clearing of bss up */ } __bss_end = . ; - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); /* Relocated into main memory */ diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds index b061441..30138dd 100644 --- a/board/gen860t/u-boot-flashenv.lds +++ b/board/gen860t/u-boot-flashenv.lds @@ -97,7 +97,7 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); .ppcenv: diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds index 9e9449d..08fb4aa 100644 --- a/board/gen860t/u-boot.lds +++ b/board/gen860t/u-boot.lds @@ -98,6 +98,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds index 958dd84..b351a68 100644 --- a/board/genietv/u-boot.lds +++ b/board/genietv/u-boot.lds @@ -112,6 +112,6 @@ SECTIONS common/env_embedded.o (.ppcenv) } . = ALIGN(4); - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds index b2bb50d..8e58963 100644 --- a/board/hermes/u-boot.lds +++ b/board/hermes/u-boot.lds @@ -99,6 +99,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 3133c55..5d1c2ad 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -143,6 +143,6 @@ SECTIONS common/env_embedded.o (.ppcenv) } . = ALIGN(4); - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds index 40f4a38..6e4939b 100644 --- a/board/icu862/u-boot.lds +++ b/board/icu862/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/idmr/u-boot.lds b/board/idmr/u-boot.lds index 6d13831..5b8d3b3 100644 --- a/board/idmr/u-boot.lds +++ b/board/idmr/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS . = ALIGN(4); _ebss = .; } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/ifm/ac14xx/Makefile b/board/ifm/ac14xx/Makefile new file mode 100644 index 0000000..9a76f32 --- /dev/null +++ b/board/ifm/ac14xx/Makefile @@ -0,0 +1,34 @@ +# +# (C) Copyright 2009 Wolfgang Denk <wd@denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := $(BOARD).o + +COBJS := $(COBJS-y) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ifm/ac14xx/ac14xx.c b/board/ifm/ac14xx/ac14xx.c new file mode 100644 index 0000000..7442591 --- /dev/null +++ b/board/ifm/ac14xx/ac14xx.c @@ -0,0 +1,617 @@ +/* + * (C) Copyright 2009 Wolfgang Denk <wd@denx.de> + * (C) Copyright 2009 Dave Srl www.dave.eu + * (C) Copyright 2010 ifm ecomatic GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <common.h> +#include <asm/bitops.h> +#include <command.h> +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/mpc512x.h> +#include <fdt_support.h> +#ifdef CONFIG_MISC_INIT_R +#include <i2c.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +static void gpio_configure(void) +{ + immap_t *im; + gpio512x_t *gpioregs; + + im = (immap_t *) CONFIG_SYS_IMMR; + gpioregs = &im->gpio; + out_be32(&gpioregs->gpodr, 0x00290000); /* open drain */ + out_be32(&gpioregs->gpdat, 0x80001040); /* data (when output) */ + + /* + * out_be32(&gpioregs->gpdir, 0xC2293020); + * workaround for a hardware affect: configure direction in pieces, + * setting all outputs at once drops the reset line too low and + * makes us lose the MII connection (breaks ethernet for us) + */ + out_be32(&gpioregs->gpdir, 0x02003060); /* direction */ + setbits_be32(&gpioregs->gpdir, 0x00200000); /* += reset asi */ + udelay(10); + setbits_be32(&gpioregs->gpdir, 0x00080000); /* += reset safety */ + udelay(10); + setbits_be32(&gpioregs->gpdir, 0x00010000); /* += reset comm */ + udelay(10); + setbits_be32(&gpioregs->gpdir, 0xC0000000); /* += backlight, KB sel */ + + /* to turn from red to yellow when U-Boot runs */ + setbits_be32(&gpioregs->gpdat, 0x00002020); + out_be32(&gpioregs->gpimr, 0x00000000); /* interrupt mask */ + out_be32(&gpioregs->gpicr1, 0x00000004); /* interrupt sense part 1 */ + out_be32(&gpioregs->gpicr2, 0x00A80000); /* interrupt sense part 2 */ + out_be32(&gpioregs->gpier, 0xFFFFFFFF); /* interrupt events, clear */ +} + +/* the physical location of the pins */ +#define GPIOKEY_ROW_BITMASK 0x40000000 +#define GPIOKEY_ROW_UPPER 0 +#define GPIOKEY_ROW_LOWER 1 + +#define GPIOKEY_COL0_BITMASK 0x20000000 +#define GPIOKEY_COL1_BITMASK 0x10000000 +#define GPIOKEY_COL2_BITMASK 0x08000000 + +/* the logical presentation of pressed keys */ +#define GPIOKEY_BIT_FNLEFT (1 << 5) +#define GPIOKEY_BIT_FNRIGHT (1 << 4) +#define GPIOKEY_BIT_DIRUP (1 << 3) +#define GPIOKEY_BIT_DIRLEFT (1 << 2) +#define GPIOKEY_BIT_DIRRIGHT (1 << 1) +#define GPIOKEY_BIT_DIRDOWN (1 << 0) + +/* the hotkey combination which starts recovery */ +#define GPIOKEY_BITS_RECOVERY (GPIOKEY_BIT_FNLEFT | GPIOKEY_BIT_DIRUP | \ + GPIOKEY_BIT_DIRDOWN) + +static void gpio_selectrow(gpio512x_t *gpioregs, u32 row) +{ + + if (row) + setbits_be32(&gpioregs->gpdat, GPIOKEY_ROW_BITMASK); + else + clrbits_be32(&gpioregs->gpdat, GPIOKEY_ROW_BITMASK); + udelay(10); +} + +static u32 gpio_querykbd(void) +{ + immap_t *im; + gpio512x_t *gpioregs; + u32 keybits; + u32 input; + + im = (immap_t *)CONFIG_SYS_IMMR; + gpioregs = &im->gpio; + keybits = 0; + + /* query upper row */ + gpio_selectrow(gpioregs, GPIOKEY_ROW_UPPER); + input = in_be32(&gpioregs->gpdat); + if ((input & GPIOKEY_COL0_BITMASK) == 0) + keybits |= GPIOKEY_BIT_FNLEFT; + if ((input & GPIOKEY_COL1_BITMASK) == 0) + keybits |= GPIOKEY_BIT_DIRUP; + if ((input & GPIOKEY_COL2_BITMASK) == 0) + keybits |= GPIOKEY_BIT_FNRIGHT; + + /* query lower row */ + gpio_selectrow(gpioregs, GPIOKEY_ROW_LOWER); + input = in_be32(&gpioregs->gpdat); + if ((input & GPIOKEY_COL0_BITMASK) == 0) + keybits |= GPIOKEY_BIT_DIRLEFT; + if ((input & GPIOKEY_COL1_BITMASK) == 0) + keybits |= GPIOKEY_BIT_DIRRIGHT; + if ((input & GPIOKEY_COL2_BITMASK) == 0) + keybits |= GPIOKEY_BIT_DIRDOWN; + + /* return bit pattern for keys */ + return keybits; +} + +/* excerpt from the recovery's hw_info.h */ + +static int eeprom_diag = 1; + +struct __attribute__ ((__packed__)) eeprom_layout { + char magic[3]; /** 'ifm' */ + u8 len[2]; /** content length without magic/len fields */ + u8 version[3]; /** structure version */ + u8 type; /** type of PCB */ + u8 reserved[0x37]; /** padding up to offset 0x40 */ + u8 macaddress[6]; /** ethernet MAC (for the mainboard) @0x40 */ +}; + +#define HW_COMP_MAINCPU 2 + +static struct eeprom_layout eeprom_content; +static int eeprom_was_read; /* has_been_read */ +static int eeprom_is_valid; +static int eeprom_version; + +#define get_eeprom_field_int(name) ({ \ + int value; \ + int idx; \ + value = 0; \ + for (idx = 0; idx < sizeof(name); idx++) { \ + value <<= 8; \ + value |= name[idx]; \ + } \ + value; \ +}) + +static int read_eeprom(void) +{ + int eeprom_datalen; + int ret; + + if (eeprom_was_read) + return 0; + + eeprom_is_valid = 0; + ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, + (uchar *)&eeprom_content, sizeof(eeprom_content)); + if (eeprom_diag) { + printf("DIAG: %s() read rc[%d], size[%d]\n", + __func__, ret, sizeof(eeprom_content)); + } + + if (ret != 0) + return -1; + + eeprom_was_read = 1; + + /* + * check validity of EEPROM content + * (check version, length, optionally checksum) + */ + eeprom_is_valid = 1; + eeprom_datalen = get_eeprom_field_int(eeprom_content.len); + eeprom_version = get_eeprom_field_int(eeprom_content.version); + + if (eeprom_diag) { + printf("DIAG: %s() magic[%c%c%c] len[%d] ver[%d] type[%d]\n", + __func__, eeprom_content.magic[0], + eeprom_content.magic[1], eeprom_content.magic[2], + eeprom_datalen, eeprom_version, eeprom_content.type); + } + if (strncmp(eeprom_content.magic, "ifm", strlen("ifm")) != 0) + eeprom_is_valid = 0; + if (eeprom_datalen < sizeof(struct eeprom_layout) - 5) + eeprom_is_valid = 0; + if ((eeprom_version != 1) && (eeprom_version != 2)) + eeprom_is_valid = 0; + if (eeprom_content.type != HW_COMP_MAINCPU) + eeprom_is_valid = 0; + + if (eeprom_diag) + printf("DIAG: %s() valid[%d]\n", __func__, eeprom_is_valid); + + return ret; +} + +int mac_read_from_eeprom(void) +{ + const u8 *mac; + + if (read_eeprom()) { + printf("I2C EEPROM read failed.\n"); + return -1; + } + + if (!eeprom_is_valid) { + printf("I2C EEPROM content not valid\n"); + return -1; + } + + mac = NULL; + switch (eeprom_version) { + case 1: + case 2: + mac = (const u8 *)&eeprom_content.macaddress; + break; + } + + if (mac && is_valid_ether_addr(mac)) { + eth_setenv_enetaddr("ethaddr", mac); + printf("DIAG: %s() MAC value [%s]\n", + __func__, getenv("ethaddr")); + } + + return 0; +} + +/* + * BEWARE! + * this board uses DDR1(!) Micron SDRAM, *NOT* the DDR2 + * which the ADS, Aria or PDM360NG boards are using + * (the steps outlined here refer to the Micron datasheet) + */ +u32 sdram_init_seq[] = { + /* item 6, at least one NOP after CKE went high */ + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + /* item 7, precharge all; item 8, tRP (20ns) */ + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_NOP, + /* item 9, extended mode register; item 10, tMRD 10ns) */ + CONFIG_SYS_MICRON_EMODE | CONFIG_SYS_MICRON_EMODE_PARAM, + CONFIG_SYS_DDRCMD_NOP, + /* + * item 11, (base) mode register _with_ reset DLL; + * item 12, tMRD (10ns) + */ + CONFIG_SYS_MICRON_BMODE | CONFIG_SYS_MICRON_BMODE_RSTDLL | + CONFIG_SYS_MICRON_BMODE_PARAM, + CONFIG_SYS_DDRCMD_NOP, + /* item 13, precharge all; item 14, tRP (20ns) */ + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_NOP, + /* + * item 15, auto refresh (i.e. refresh with CKE held high); + * item 16, tRFC (70ns) + */ + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + /* + * item 17, auto refresh (i.e. refresh with CKE held high); + * item 18, tRFC (70ns) + */ + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + /* item 19, optional, unassert DLL reset; item 20, tMRD (20ns) */ + CONFIG_SYS_MICRON_BMODE | CONFIG_SYS_MICRON_BMODE_PARAM, + CONFIG_SYS_DDRCMD_NOP, + /* + * item 21, "actually done", but make sure 200 DRAM clock cycles + * have passed after DLL reset before READ requests are issued + * (200 cycles at 160MHz -> 1.25 usec) + */ + /* EMPTY, optional, we don't do it */ +}; + +phys_size_t initdram(int board_type) +{ + return fixed_sdram(NULL, sdram_init_seq, ARRAY_SIZE(sdram_init_seq)); +} + +int misc_init_r(void) +{ + u32 keys; + char *s; + int want_recovery; + + /* we use bus I2C-0 for the on-board eeprom */ + i2c_set_bus_num(0); + + /* setup GPIO directions and initial values */ + gpio_configure(); + + /* + * check the GPIO keyboard, + * enforced start of the recovery when + * - the appropriate keys were pressed + * - a previous installation was aborted or has failed + * - "some" external software told us to + */ + want_recovery = 0; + keys = gpio_querykbd(); + printf("GPIO keyboard status [0x%08X]\n", keys); + /* XXX insist in the _exact_ combination? */ + if ((keys & GPIOKEY_BITS_RECOVERY) == GPIOKEY_BITS_RECOVERY) { + printf("GPIO keyboard requested RECOVERY\n"); + /* XXX TODO + * refine the logic to detect the first keypress, and + * wait to recheck IF it was the recovery combination? + */ + want_recovery = 1; + } + s = getenv("install_in_progress"); + if ((s != NULL) && (*s != '\0')) { + printf("previous installation aborted, running RECOVERY\n"); + want_recovery = 1; + } + s = getenv("install_failed"); + if ((s != NULL) && (*s != '\0')) { + printf("previous installation FAILED, running RECOVERY\n"); + want_recovery = 1; + } + s = getenv("want_recovery"); + if ((s != NULL) && (*s != '\0')) { + printf("running RECOVERY according to the request\n"); + want_recovery = 1; + } + + if (want_recovery) + setenv("bootcmd", "run recovery"); + + /* + * boot the recovery system without waiting; boot the + * production system without waiting by default, only + * insert a pause (to provide a chance to get a prompt) + * when GPIO keys were pressed during power on + */ + if (want_recovery) + setenv("bootdelay", "0"); + else if (!keys) + setenv("bootdelay", "0"); + else + setenv("bootdelay", "2"); + + /* get the ethernet MAC from I2C EEPROM */ + mac_read_from_eeprom(); + + return 0; +} + +/* setup specific IO pad configuration */ +static iopin_t ioregs_init[] = { + { /* LPC CS3 */ + offsetof(struct ioctrl512x, io_control_nfc_ce0), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + { /* LPC CS1 */ + offsetof(struct ioctrl512x, io_control_lpc_cs1), 1, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* LPC CS2 */ + offsetof(struct ioctrl512x, io_control_lpc_cs2), 1, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* LPC CS4, CS5 */ + offsetof(struct ioctrl512x, io_control_pata_ce1), 2, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + { /* SDHC CLK, CMD, D0, D1, D2, D3 */ + offsetof(struct ioctrl512x, io_control_pata_ior), 6, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + { /* GPIO keyboard */ + offsetof(struct ioctrl512x, io_control_pci_ad30), 4, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO DN1 PF, LCD power, DN2 PF */ + offsetof(struct ioctrl512x, io_control_pci_ad26), 3, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO reset AS-i */ + offsetof(struct ioctrl512x, io_control_pci_ad21), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO reset safety */ + offsetof(struct ioctrl512x, io_control_pci_ad19), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO reset netX */ + offsetof(struct ioctrl512x, io_control_pci_ad16), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO ma2 en */ + offsetof(struct ioctrl512x, io_control_pci_ad15), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO SD CD, SD WP */ + offsetof(struct ioctrl512x, io_control_pci_ad08), 2, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* FEC RX DV */ + offsetof(struct ioctrl512x, io_control_pci_ad06), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(2), + }, + { /* GPIO AS-i prog, AS-i done, LCD backlight */ + offsetof(struct ioctrl512x, io_control_pci_ad05), 3, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO AS-i wdg */ + offsetof(struct ioctrl512x, io_control_pci_req2), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO safety wdg */ + offsetof(struct ioctrl512x, io_control_pci_req1), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO netX wdg */ + offsetof(struct ioctrl512x, io_control_pci_req0), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO IRQ powerfail */ + offsetof(struct ioctrl512x, io_control_pci_inta), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO AS-i PWRD */ + offsetof(struct ioctrl512x, io_control_pci_frame), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO LED0, LED1 */ + offsetof(struct ioctrl512x, io_control_pci_idsel), 2, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* GPIO IRQ AS-i 1, IRQ AS-i 2, IRQ safety */ + offsetof(struct ioctrl512x, io_control_pci_irdy), 3, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* DIU clk */ + offsetof(struct ioctrl512x, io_control_spdif_txclk), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(2), + }, + { /* FEC TX ER, CRS */ + offsetof(struct ioctrl512x, io_control_spdif_tx), 2, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + { /* GPIO/GPT */ /* to *NOT* have the EXT IRQ0 float */ + offsetof(struct ioctrl512x, io_control_irq0), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + { /* + * FEC col, tx en, tx clk, txd 0-3, mdc, rx er, + * rdx 3-0, mdio, rx clk + */ + offsetof(struct ioctrl512x, io_control_psc0_0), 15, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + /* optional: make sure PSC3 remains the serial console */ + { /* LPC CS6 */ + offsetof(struct ioctrl512x, io_control_psc3_4), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + /* make sure PSC4 remains available for SPI, + *BUT* PSC4_1 is a GPIO kind of SS! */ + { /* enforce drive strength on the SPI pin */ + offsetof(struct ioctrl512x, io_control_psc4_0), 5, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { + offsetof(struct ioctrl512x, io_control_psc4_1), 1, + IO_PIN_OVER_FMUX, + IO_PIN_FMUX(3), + }, + /* optional: make sure PSC5 remains available for SPI */ + { /* enforce drive strength on the SPI pin */ + offsetof(struct ioctrl512x, io_control_psc5_0), 5, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(1), + }, + { /* LPC TSIZ1 */ + offsetof(struct ioctrl512x, io_control_psc6_0), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(1) | IO_PIN_DS(2), + }, + { /* DIU hsync */ + offsetof(struct ioctrl512x, io_control_psc6_1), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(1), + }, + { /* DIU vsync */ + offsetof(struct ioctrl512x, io_control_psc6_4), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(1), + }, + { /* PSC7, part of DIU RGB */ + offsetof(struct ioctrl512x, io_control_psc7_0), 2, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(1), + }, + { /* PSC7, safety UART */ + offsetof(struct ioctrl512x, io_control_psc7_2), 2, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(0) | IO_PIN_DS(1), + }, + { /* DIU (part of) RGB[] */ + offsetof(struct ioctrl512x, io_control_psc8_3), 16, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(1), + }, + { /* DIU data enable */ + offsetof(struct ioctrl512x, io_control_psc11_4), 1, + IO_PIN_OVER_FMUX | IO_PIN_OVER_DRVSTR, + IO_PIN_FMUX(2) | IO_PIN_DS(1), + }, + /* reduce LPB drive strength for improved EMI */ + { /* LPC OE, LPC RW */ + offsetof(struct ioctrl512x, io_control_lpc_oe), 2, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* LPC AX03 through LPC AD00 */ + offsetof(struct ioctrl512x, io_control_lpc_ax03), 36, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* LPC CS5 */ + offsetof(struct ioctrl512x, io_control_pata_ce2), 1, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* SDHC CLK */ + offsetof(struct ioctrl512x, io_control_nfc_wp), 1, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, + { /* SDHC DATA */ + offsetof(struct ioctrl512x, io_control_nfc_ale), 4, + IO_PIN_OVER_DRVSTR, + IO_PIN_DS(2), + }, +}; + +int checkboard(void) +{ + puts("Board: ifm AC14xx\n"); + + /* initialize function mux & slew rate IO inter alia on IO Pins */ + iopin_initialize_bits(ioregs_init, ARRAY_SIZE(ioregs_init)); + + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds index c2ec827..3334a44 100644 --- a/board/ip860/u-boot.lds +++ b/board/ip860/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds index dcd53ec..1b43dbe 100644 --- a/board/ivm/u-boot.lds +++ b/board/ivm/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index defc885..f98844d 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -31,10 +31,7 @@ #include <libfdt.h> #endif -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) #include <i2c.h> -#endif - #include "../common/common.h" /* @@ -370,7 +367,7 @@ static void set_pin(int state, unsigned long mask); * will toggle once what forces the mgocge3un part to restart * immediately. */ -void handle_mgcoge3un_reset(void) +static void handle_mgcoge3un_reset(void) { char *bobcatreset = getenv("bobcatreset"); if (bobcatreset) { diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds index b6fa79f..52c929c 100644 --- a/board/korat/u-boot-F7FC.lds +++ b/board/korat/u-boot-F7FC.lds @@ -135,6 +135,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds index c2ec827..3334a44 100644 --- a/board/kup/kup4k/u-boot.lds +++ b/board/kup/kup4k/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds index c2ec827..3334a44 100644 --- a/board/kup/kup4x/u-boot.lds +++ b/board/kup/kup4x/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds index 30523dc..ce11a91 100644 --- a/board/lwmon/u-boot.lds +++ b/board/lwmon/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/manroland/uc100/u-boot.lds b/board/manroland/uc100/u-boot.lds index 8c75dea..d1bb127 100644 --- a/board/manroland/uc100/u-boot.lds +++ b/board/manroland/uc100/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/matrix_vision/mvsmr/u-boot.lds b/board/matrix_vision/mvsmr/u-boot.lds index 5707770..3225c0b 100644 --- a/board/matrix_vision/mvsmr/u-boot.lds +++ b/board/matrix_vision/mvsmr/u-boot.lds @@ -100,6 +100,6 @@ SECTIONS *(.sbss*) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds index c2ec827..3334a44 100644 --- a/board/mbx8xx/u-boot.lds +++ b/board/mbx8xx/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index 080829b..17ff94e 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -88,6 +88,6 @@ SECTIONS . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/mvblue/u-boot.lds b/board/mvblue/u-boot.lds index e186ee6..adbb5f9 100644 --- a/board/mvblue/u-boot.lds +++ b/board/mvblue/u-boot.lds @@ -97,6 +97,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds index ddb5a72..03891e9 100644 --- a/board/netphone/u-boot.lds +++ b/board/netphone/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds index ddb5a72..03891e9 100644 --- a/board/netta/u-boot.lds +++ b/board/netta/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds index ddb5a72..03891e9 100644 --- a/board/netta2/u-boot.lds +++ b/board/netta2/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds index ddb5a72..03891e9 100644 --- a/board/netvia/u-boot.lds +++ b/board/netvia/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 7d9f361..8d7a227 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -132,10 +132,7 @@ int board_init(void) clock_init(); clock_verify(); -#ifdef CONFIG_SPI_UART_SWITCH - gpio_config_uart(); -#endif -#if defined(CONFIG_TEGRA_SPI) || defined(CONFIG_TEGRA_SLINK) +#ifdef CONFIG_FDT_SPI pin_mux_spi(); spi_init(); #endif diff --git a/board/nvidia/common/common.mk b/board/nvidia/common/common.mk index bd6202c..d9bcb85 100644 --- a/board/nvidia/common/common.mk +++ b/board/nvidia/common/common.mk @@ -1,4 +1,3 @@ # common options for all tegra boards COBJS-y += ../../nvidia/common/board.o -COBJS-$(CONFIG_SPI_UART_SWITCH) += ../../nvidia/common/uart-spi-switch.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c deleted file mode 100644 index e9d445d..0000000 --- a/board/nvidia/common/uart-spi-switch.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/gpio.h> -#include <asm/arch/pinmux.h> -#include <asm/arch/uart-spi-switch.h> -#include <asm/arch/tegra.h> -#include <asm/arch-tegra/tegra_spi.h> -#include <asm/arch-tegra/board.h> - -/* position of the UART/SPI select switch */ -enum spi_uart_switch { - SWITCH_UNKNOWN, - SWITCH_SPI, - SWITCH_UART, - SWITCH_BOTH -}; - -/* Information about the spi/uart switch */ -struct spi_uart { - int gpio; /* GPIO to control switch */ - u32 port; /* Port number of UART affected */ -}; - -static struct spi_uart local; -static enum spi_uart_switch switch_pos; /* Current switch position */ - - -static void get_config(struct spi_uart *config) -{ -#if defined CONFIG_SPI_CORRUPTS_UART - config->gpio = CONFIG_UART_DISABLE_GPIO; - config->port = CONFIG_SPI_CORRUPTS_UART_NR; -#else - config->gpio = -1; -#endif -} - -/* - * Init the UART / SPI switch. This can be called before relocation so we must - * not access BSS. - */ -void gpio_early_init_uart(void) -{ - struct spi_uart config; - - get_config(&config); - if (config.gpio != -1) { - /* Cannot provide a label prior to relocation */ - gpio_request(config.gpio, NULL); - gpio_direction_output(config.gpio, 0); - } -} - -/* - * Configure the UART / SPI switch. - */ -void gpio_config_uart(void) -{ - get_config(&local); - if (local.gpio != -1) { - gpio_direction_output(local.gpio, 0); - switch_pos = SWITCH_UART; - } else { - /* - * If we're here we don't have a SPI switch; go ahead and - * enable the SPI now. We didn't in spi_init() so we wouldn't - * kill the UART. - */ - pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH); - switch_pos = SWITCH_BOTH; - } -} - -static void spi_uart_switch(struct spi_uart *config, - enum spi_uart_switch new_pos) -{ - if (switch_pos == SWITCH_BOTH || new_pos == switch_pos) - return; - - /* pre-delay, allow SPI/UART to settle, FIFO to empty, etc. */ - udelay(CONFIG_SPI_CORRUPTS_UART_DLY); - - /* We need to dynamically change the pinmux, shared w/UART RXD/CTS */ - pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ? - PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD); - - /* - * On Seaboard, MOSI/MISO are shared w/UART. - * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity. - * Enable UART later (cs_deactivate) so we can use it for U-Boot comms. - */ - gpio_direction_output(config->gpio, new_pos == SWITCH_SPI); - switch_pos = new_pos; -} - -void pinmux_select_uart(void) -{ - spi_uart_switch(&local, SWITCH_UART); -} - -void pinmux_select_spi(void) -{ - spi_uart_switch(&local, SWITCH_SPI); -} diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index 2020a5f..2c23a29 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -16,7 +16,12 @@ #include <common.h> #include <asm/arch/pinmux.h> +#include <asm/arch/gp_padctrl.h> #include "pinmux-config-dalmore.h" +#include <i2c.h> + +#define BAT_I2C_ADDRESS 0x48 /* TPS65090 charger */ +#define PMU_I2C_ADDRESS 0x58 /* TPS65913 PMU */ /* * Routine: pinmux_init @@ -32,4 +37,65 @@ void pinmux_init(void) pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); + + /* Initialize any non-default pad configs (APB_MISC_GP regs) */ + padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl)); +} + +#if defined(CONFIG_TEGRA_MMC) +/* + * Do I2C/PMU writes to bring up SD card bus power + * + */ +void board_sdmmc_voltage_init(void) +{ + uchar reg, data_buffer[1]; + int ret; + + ret = i2c_set_bus_num(0);/* PMU is on bus 0 */ + if (ret) + printf("%s: i2c_set_bus_num returned %d\n", __func__, ret); + + /* TPS65913: LDO9_VOLTAGE = 3.3V */ + data_buffer[0] = 0x31; + reg = 0x61; + + ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: PMU i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); + + /* TPS65913: LDO9_CTRL = Active */ + data_buffer[0] = 0x01; + reg = 0x60; + + ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: PMU i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); + + /* TPS65090: FET6_CTRL = enable output auto discharge, enable FET6 */ + data_buffer[0] = 0x03; + reg = 0x14; + + ret = i2c_write(BAT_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: BAT i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ + /* + * NOTE: We don't do mmc-specific pin muxes here. + * They were done globally in pinmux_init(). + */ + + /* Bring up the SDIO3 power rail */ + board_sdmmc_voltage_init(); } +#endif /* MMC */ diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h index 3ef6f4e..8c05a15 100644 --- a/board/nvidia/dalmore/pinmux-config-dalmore.h +++ b/board/nvidia/dalmore/pinmux-config-dalmore.h @@ -361,4 +361,10 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = { DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT), }; + +static struct padctrl_config dalmore_padctrl[] = { + /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ + DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \ + SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE), +}; #endif /* PINMUX_CONFIG_COMMON_H */ diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts index 30cf1fb..86e9459 100644 --- a/board/nvidia/dts/tegra114-dalmore.dts +++ b/board/nvidia/dts/tegra114-dalmore.dts @@ -12,6 +12,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000400"; }; memory { @@ -43,4 +45,20 @@ status = "okay"; clock-frequency = <400000>; }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + sdhci@78000400 { + cd-gpios = <&gpio 170 1>; /* gpio PV2 */ + bus-width = <4>; + status = "okay"; + }; + + sdhci@78000600 { + bus-width = <8>; + status = "okay"; + }; }; diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index e581fdd..498e513 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -31,7 +31,7 @@ #include <asm/gpio.h> /* TODO: Remove this code when the SPI switch is working */ -#if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) +#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds index bd74d74..a1481c8 100644 --- a/board/nx823/u-boot.lds +++ b/board/nx823/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/pcippc2/cpc710.h b/board/pcippc2/cpc710.h deleted file mode 100644 index 8167270..0000000 --- a/board/pcippc2/cpc710.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CPC710_H_ -#define _CPC710_H_ - -/* Revision */ -#define CPC710_TYPE_100 0x80 -#define CPC710_TYPE_100P 0x90 - -/* System control area */ -#define HW_PHYS_SCA 0xff000000 - -#define HW_SCA_CPC0 0x000000 -#define HW_SCA_SDRAM0 0x000000 -#define HW_SCA_DMA0 0x1C0000 - -#define HW_PHYS_CPC0 (HW_PHYS_SCA + HW_SCA_CPC0) -#define HW_PHYS_SDRAM0 (HW_PHYS_SCA + HW_SCA_SDRAM0) - -#define HW_CPC0_PCICNFR 0x000c -#define HW_CPC0_RSTR 0x0010 -#define HW_CPC0_SPOR 0x00e8 -#define HW_CPC0_UCTL 0x1000 -#define HW_CPC0_SIOC0 0x1020 -#define HW_CPC0_ABCNTL 0x1030 -#define HW_CPC0_SESR 0x1060 -#define HW_CPC0_SEAR 0x1070 -#define HW_CPC0_PGCHP 0x1100 -#define HW_CPC0_RGBAN0 0x1110 -#define HW_CPC0_RGBAN1 0x1120 - -#define HW_CPC0_GPDIR 0x1130 -#define HW_CPC0_GPIN 0x1140 -#define HW_CPC0_GPOUT 0x1150 - -#define HW_CPC0_ATAS 0x1160 - -#define HW_CPC0_PCIBAR 0x200018 -#define HW_CPC0_PCIENB 0x201000 - -#define HW_SDRAM0_MCCR 0x1200 -#define HW_SDRAM0_MESR 0x1220 -#define HW_SDRAM0_MEAR 0x1230 - -#define HW_SDRAM0_MCER0 0x1300 -#define HW_SDRAM0_MCER1 0x1310 -#define HW_SDRAM0_MCER2 0x1320 -#define HW_SDRAM0_MCER3 0x1330 -#define HW_SDRAM0_MCER4 0x1340 -#define HW_SDRAM0_MCER5 0x1350 -#define HW_SDRAM0_MCER6 0x1360 -#define HW_SDRAM0_MCER7 0x1370 - -#define HW_BRIDGE_PCIDG 0xf6120 -#define HW_BRIDGE_INTACK 0xf7700 -#define HW_BRIDGE_PIBAR 0xf7800 -#define HW_BRIDGE_PMBAR 0xf7810 -#define HW_BRIDGE_CRR 0xf7ef0 -#define HW_BRIDGE_PR 0xf7f20 -#define HW_BRIDGE_ACR 0xf7f30 -#define HW_BRIDGE_MSIZE 0xf7f40 -#define HW_BRIDGE_IOSIZE 0xf7f60 -#define HW_BRIDGE_SMBAR 0xf7f80 -#define HW_BRIDGE_SIBAR 0xf7fc0 -#define HW_BRIDGE_CFGADDR 0xf8000 -#define HW_BRIDGE_CFGDATA 0xf8010 -#define HW_BRIDGE_PSSIZE 0xf8100 -#define HW_BRIDGE_BARPS 0xf8120 -#define HW_BRIDGE_PSBAR 0xf8140 - -/* Configuration space registers */ -#define CPC710_BUS_NUMBER 0x40 -#define CPC710_SUB_BUS_NUMBER 0x41 - -#endif diff --git a/board/pcippc2/cpc710_init_ram.c b/board/pcippc2/cpc710_init_ram.c deleted file mode 100644 index 8945351..0000000 --- a/board/pcippc2/cpc710_init_ram.c +++ /dev/null @@ -1,232 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> - -#include "pcippc2.h" -#include "i2c.h" - -typedef struct cpc710_mem_org_s { - u8 rows; - u8 cols; - u8 banks2; - u8 org; -} cpc710_mem_org_t; - -static int cpc710_compute_mcer (u32 * mcer, - unsigned long *size, unsigned int sdram); -static int cpc710_eeprom_checksum (unsigned int sdram); -static u8 cpc710_eeprom_read (unsigned int sdram, unsigned int offset); - -static u32 cpc710_mcer_mem[] = { - 0x000003f3, /* 18 lines, 4 Mb */ - 0x000003e3, /* 19 lines, 8 Mb */ - 0x000003c3, /* 20 lines, 16 Mb */ - 0x00000383, /* 21 lines, 32 Mb */ - 0x00000303, /* 22 lines, 64 Mb */ - 0x00000203, /* 23 lines, 128 Mb */ - 0x00000003, /* 24 lines, 256 Mb */ - 0x00000002, /* 25 lines, 512 Mb */ - 0x00000001 /* 26 lines, 1024 Mb */ -}; -static cpc710_mem_org_t cpc710_mem_org[] = { - {0x0c, 0x09, 0x02, 0x00}, /* 0000: 12/ 9/2 */ - {0x0d, 0x09, 0x02, 0x00}, /* 0000: 13/ 9/2 */ - {0x0d, 0x0a, 0x02, 0x00}, /* 0000: 13/10/2 */ - {0x0d, 0x0b, 0x02, 0x00}, /* 0000: 13/11/2 */ - {0x0d, 0x0c, 0x02, 0x00}, /* 0000: 13/12/2 */ - {0x0e, 0x0c, 0x02, 0x00}, /* 0000: 14/12/2 */ - {0x0b, 0x08, 0x02, 0x01}, /* 0001: 11/ 8/2 */ - {0x0b, 0x09, 0x01, 0x02}, /* 0010: 11/ 9/1 */ - {0x0b, 0x0a, 0x01, 0x03}, /* 0011: 11/10/1 */ - {0x0c, 0x08, 0x02, 0x04}, /* 0100: 12/ 8/2 */ - {0x0c, 0x0a, 0x02, 0x05}, /* 0101: 12/10/2 */ - {0x0d, 0x08, 0x01, 0x06}, /* 0110: 13/ 8/1 */ - {0x0d, 0x08, 0x02, 0x07}, /* 0111: 13/ 8/2 */ - {0x0d, 0x09, 0x01, 0x08}, /* 1000: 13/ 9/1 */ - {0x0d, 0x0a, 0x01, 0x09}, /* 1001: 13/10/1 */ - {0x0b, 0x08, 0x01, 0x0a}, /* 1010: 11/ 8/1 */ - {0x0c, 0x08, 0x01, 0x0b}, /* 1011: 12/ 8/1 */ - {0x0c, 0x09, 0x01, 0x0c}, /* 1100: 12/ 9/1 */ - {0x0e, 0x09, 0x02, 0x0d}, /* 1101: 14/ 9/2 */ - {0x0e, 0x0a, 0x02, 0x0e}, /* 1110: 14/10/2 */ - {0x0e, 0x0b, 0x02, 0x0f} /* 1111: 14/11/2 */ -}; - -unsigned long cpc710_ram_init (void) -{ - unsigned long memsize = 0; - unsigned long bank_size; - u32 mcer; - -#ifndef CONFIG_SYS_RAMBOOT - /* Clear memory banks - */ - out32 (REG (SDRAM0, MCER0), 0); - out32 (REG (SDRAM0, MCER1), 0); - out32 (REG (SDRAM0, MCER2), 0); - out32 (REG (SDRAM0, MCER3), 0); - out32 (REG (SDRAM0, MCER4), 0); - out32 (REG (SDRAM0, MCER5), 0); - out32 (REG (SDRAM0, MCER6), 0); - out32 (REG (SDRAM0, MCER7), 0); - iobarrier_rw (); - - /* Disable memory - */ - out32 (REG (SDRAM0, MCCR), 0x13b06000); - iobarrier_rw (); -#endif - - /* Only the first memory bank is initialised now - */ - if (!cpc710_compute_mcer (&mcer, &bank_size, 0)) { - puts ("Unsupported SDRAM type !\n"); - hang (); - } - memsize += bank_size; -#ifndef CONFIG_SYS_RAMBOOT - /* Enable bank, zero start - */ - out32 (REG (SDRAM0, MCER0), mcer | 0x80000000); - iobarrier_rw (); -#endif - -#ifndef CONFIG_SYS_RAMBOOT - /* Enable memory - */ - out32 (REG (SDRAM0, MCCR), in32 (REG (SDRAM0, MCCR)) | 0x80000000); - - /* Wait until initialisation finished - */ - while (!(in32 (REG (SDRAM0, MCCR)) & 0x20000000)) { - iobarrier_rw (); - } - - /* Clear Memory Error Status and Address registers - */ - out32 (REG (SDRAM0, MESR), 0); - out32 (REG (SDRAM0, MEAR), 0); - iobarrier_rw (); - - /* ECC is not configured now - */ -#endif - - /* Memory size counter - */ - out32 (REG (CPC0, RGBAN1), memsize); - - return memsize; -} - -static int cpc710_compute_mcer (u32 * mcer, unsigned long *size, unsigned int sdram) -{ - u8 rows; - u8 cols; - u8 banks2; - unsigned int lines; - u32 mc = 0; - unsigned int i; - cpc710_mem_org_t *org = 0; - - if (!i2c_reset ()) { - puts ("Can't reset I2C!\n"); - hang (); - } - - if (!cpc710_eeprom_checksum (sdram)) { - puts ("Invalid EEPROM checksum !\n"); - hang (); - } - - rows = cpc710_eeprom_read (sdram, 3); - cols = cpc710_eeprom_read (sdram, 4); - /* Can be 2 or 4 banks; divide by 2 - */ - banks2 = cpc710_eeprom_read (sdram, 17) / 2; - - lines = rows + cols + banks2; - - if (lines < 18 || lines > 26) { - /* Unsupported configuration - */ - return 0; - } - - mc |= cpc710_mcer_mem[lines - 18] << 6; - - for (i = 0; i < sizeof (cpc710_mem_org) / sizeof (cpc710_mem_org_t); - i++) { - cpc710_mem_org_t *corg = cpc710_mem_org + i; - - if (corg->rows == rows && corg->cols == cols - && corg->banks2 == banks2) { - org = corg; - - break; - } - } - - if (!org) { - /* Unsupported configuration - */ - return 0; - } - - mc |= (u32) org->org << 2; - - /* Supported configuration - */ - *mcer = mc; - *size = 1l << (lines + 4); - - return 1; -} - -static int cpc710_eeprom_checksum (unsigned int sdram) -{ - u8 sum = 0; - unsigned int i; - - for (i = 0; i < 63; i++) { - sum += cpc710_eeprom_read (sdram, i); - } - - return sum == cpc710_eeprom_read (sdram, 63); -} - -static u8 cpc710_eeprom_read (unsigned int sdram, unsigned int offset) -{ - u8 dev = (sdram << 1) | 0xa0; - u8 data; - - if (!i2c_read_byte (&data, dev, offset)) { - puts ("I2C error !\n"); - hang (); - } - - return data; -} diff --git a/board/pcippc2/cpc710_pci.c b/board/pcippc2/cpc710_pci.c deleted file mode 100644 index ccd18e1..0000000 --- a/board/pcippc2/cpc710_pci.c +++ /dev/null @@ -1,309 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> -#include <pci.h> - -#include "hardware.h" -#include "pcippc2.h" - -struct pci_controller local_hose, cpci_hose; - -static u32 cpc710_mapped_ram; - - /* Enable PCI retry timeouts - */ -void cpc710_pci_enable_timeout (void) -{ - out32(BRIDGE(LOCAL, CFGADDR), 0x50000080); - iobarrier_rw(); - out32(BRIDGE(LOCAL, CFGDATA), 0x32000000); - iobarrier_rw(); - - out32(BRIDGE(CPCI, CFGADDR), 0x50000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), 0x32000000); - iobarrier_rw(); -} - -void cpc710_pci_init (void) -{ - u32 sdram_size = pcippc2_sdram_size(); - - cpc710_mapped_ram = sdram_size < PCI_MEMORY_MAXSIZE ? - sdram_size : PCI_MEMORY_MAXSIZE; - - /* Select the local PCI - */ - out32(REG(CPC0, PCICNFR), 0x80000002); - iobarrier_rw(); - - out32(REG(CPC0, PCIBAR), BRIDGE_LOCAL_PHYS); - iobarrier_rw(); - - /* Enable PCI bridge address decoding - */ - out32(REG(CPC0, PCIENB), 0x80000000); - iobarrier_rw(); - - /* Select the CPCI bridge - */ - out32(REG(CPC0, PCICNFR), 0x80000003); - iobarrier_rw(); - - out32(REG(CPC0, PCIBAR), BRIDGE_CPCI_PHYS); - iobarrier_rw(); - - /* Enable PCI bridge address decoding - */ - out32(REG(CPC0, PCIENB), 0x80000000); - iobarrier_rw(); - - /* Disable configuration accesses - */ - out32(REG(CPC0, PCICNFR), 0x80000000); - iobarrier_rw(); - - /* Initialise the local PCI - */ - out32(BRIDGE(LOCAL, CRR), 0x7c000000); - iobarrier_rw(); - out32(BRIDGE(LOCAL, PCIDG), 0x40000000); - iobarrier_rw(); - out32(BRIDGE(LOCAL, PIBAR), BRIDGE_LOCAL_IO_BUS); - out32(BRIDGE(LOCAL, SIBAR), BRIDGE_LOCAL_IO_PHYS); - out32(BRIDGE(LOCAL, IOSIZE), -BRIDGE_LOCAL_IO_SIZE); - iobarrier_rw(); - out32(BRIDGE(LOCAL, PMBAR), BRIDGE_LOCAL_MEM_BUS); - out32(BRIDGE(LOCAL, SMBAR), BRIDGE_LOCAL_MEM_PHYS); - out32(BRIDGE(LOCAL, MSIZE), -BRIDGE_LOCAL_MEM_SIZE); - iobarrier_rw(); - out32(BRIDGE(LOCAL, PR), 0x00ffe000); - iobarrier_rw(); - out32(BRIDGE(LOCAL, ACR), 0xfe000000); - iobarrier_rw(); - out32(BRIDGE(LOCAL, PSBAR), PCI_MEMORY_BUS >> 24); - out32(BRIDGE(LOCAL, BARPS), PCI_MEMORY_PHYS >> 24); - out32(BRIDGE(LOCAL, PSSIZE), 256 - (cpc710_mapped_ram >> 24)); - iobarrier_rw(); - - /* Initialise the CPCI bridge - */ - out32(BRIDGE(CPCI, CRR), 0x7c000000); - iobarrier_rw(); - out32(BRIDGE(CPCI, PCIDG), 0xC0000000); - iobarrier_rw(); - out32(BRIDGE(CPCI, PIBAR), BRIDGE_CPCI_IO_BUS); - out32(BRIDGE(CPCI, SIBAR), BRIDGE_CPCI_IO_PHYS); - out32(BRIDGE(CPCI, IOSIZE), -BRIDGE_CPCI_IO_SIZE); - iobarrier_rw(); - out32(BRIDGE(CPCI, PMBAR), BRIDGE_CPCI_MEM_BUS); - out32(BRIDGE(CPCI, SMBAR), BRIDGE_CPCI_MEM_PHYS); - out32(BRIDGE(CPCI, MSIZE), -BRIDGE_CPCI_MEM_SIZE); - iobarrier_rw(); - out32(BRIDGE(CPCI, PR), 0x80ffe000); - iobarrier_rw(); - out32(BRIDGE(CPCI, ACR), 0xdf000000); - iobarrier_rw(); - out32(BRIDGE(CPCI, PSBAR), PCI_MEMORY_BUS >> 24); - out32(BRIDGE(CPCI, BARPS), PCI_MEMORY_PHYS >> 24); - out32(BRIDGE(CPCI, PSSIZE), 256 - (cpc710_mapped_ram >> 24)); - iobarrier_rw(); - - /* Local PCI - */ - - out32(BRIDGE(LOCAL, CFGADDR), 0x04000080); - iobarrier_rw(); - out32(BRIDGE(LOCAL, CFGDATA), 0x56010000); - iobarrier_rw(); - - out32(BRIDGE(LOCAL, CFGADDR), 0x0c000080); - iobarrier_rw(); - out32(BRIDGE(LOCAL, CFGDATA), PCI_LATENCY_TIMER_VAL << 16); - iobarrier_rw(); - - /* Set bus and subbus numbers - */ - out32(BRIDGE(LOCAL, CFGADDR), 0x40000080); - iobarrier_rw(); - out32(BRIDGE(LOCAL, CFGDATA), 0x00000000); - iobarrier_rw(); - - out32(BRIDGE(LOCAL, CFGADDR), 0x50000080); - iobarrier_rw(); - /* PCI retry timeouts will be enabled later - */ - out32(BRIDGE(LOCAL, CFGDATA), 0x00000000); - iobarrier_rw(); - - /* CPCI - */ - - /* Set bus and subbus numbers - */ - out32(BRIDGE(CPCI, CFGADDR), 0x40000080); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), 0x01010000); - iobarrier_rw(); - - out32(BRIDGE(CPCI, CFGADDR), 0x04000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), 0x56010000); - iobarrier_rw(); - - out32(BRIDGE(CPCI, CFGADDR), 0x0c000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), PCI_LATENCY_TIMER_VAL << 16); - iobarrier_rw(); - - /* Write to the PSBAR */ - out32(BRIDGE(CPCI, CFGADDR), 0x10000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), cpu_to_le32(PCI_MEMORY_BUS)); - iobarrier_rw(); - - /* Set bus and subbus numbers - */ - out32(BRIDGE(CPCI, CFGADDR), 0x40000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), 0x01ff0000); - iobarrier_rw(); - - out32(BRIDGE(CPCI, CFGADDR), 0x50000180); - iobarrier_rw(); - out32(BRIDGE(CPCI, CFGDATA), 0x32000000); - /* PCI retry timeouts will be enabled later - */ - out32(BRIDGE(CPCI, CFGDATA), 0x00000000); - iobarrier_rw(); - - /* Remove reset on the PCI buses - */ - out32(BRIDGE(LOCAL, CRR), 0xfc000000); - iobarrier_rw(); - out32(BRIDGE(CPCI, CRR), 0xfc000000); - iobarrier_rw(); - - local_hose.first_busno = 0; - local_hose.last_busno = 0xff; - - /* System memory space */ - pci_set_region(local_hose.regions + 0, - PCI_MEMORY_BUS, - PCI_MEMORY_PHYS, - PCI_MEMORY_MAXSIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - /* PCI memory space */ - pci_set_region(local_hose.regions + 1, - BRIDGE_LOCAL_MEM_BUS, - BRIDGE_LOCAL_MEM_PHYS, - BRIDGE_LOCAL_MEM_SIZE, - PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region(local_hose.regions + 2, - BRIDGE_LOCAL_IO_BUS, - BRIDGE_LOCAL_IO_PHYS, - BRIDGE_LOCAL_IO_SIZE, - PCI_REGION_IO); - - local_hose.region_count = 3; - - pci_setup_indirect(&local_hose, - BRIDGE_LOCAL_PHYS + HW_BRIDGE_CFGADDR, - BRIDGE_LOCAL_PHYS + HW_BRIDGE_CFGDATA); - - pci_register_hose(&local_hose); - - /* Initialize PCI32 bus registers */ - pci_hose_write_config_byte(&local_hose, - PCI_BDF(local_hose.first_busno,0,0), - CPC710_BUS_NUMBER, - local_hose.first_busno); - pci_hose_write_config_byte(&local_hose, - PCI_BDF(local_hose.first_busno,0,0), - CPC710_SUB_BUS_NUMBER, - local_hose.last_busno); - - local_hose.last_busno = pci_hose_scan(&local_hose); - - /* Write out correct max subordinate bus number for local hose */ - pci_hose_write_config_byte(&local_hose, - PCI_BDF(local_hose.first_busno,0,0), - CPC710_SUB_BUS_NUMBER, - local_hose.last_busno); - - cpci_hose.first_busno = local_hose.last_busno + 1; - cpci_hose.last_busno = 0xff; - - /* System memory space */ - pci_set_region(cpci_hose.regions + 0, - PCI_MEMORY_BUS, - PCI_MEMORY_PHYS, - PCI_MEMORY_MAXSIZE, - PCI_REGION_SYS_MEMORY); - - /* PCI memory space */ - pci_set_region(cpci_hose.regions + 1, - BRIDGE_CPCI_MEM_BUS, - BRIDGE_CPCI_MEM_PHYS, - BRIDGE_CPCI_MEM_SIZE, - PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region(cpci_hose.regions + 2, - BRIDGE_CPCI_IO_BUS, - BRIDGE_CPCI_IO_PHYS, - BRIDGE_CPCI_IO_SIZE, - PCI_REGION_IO); - - cpci_hose.region_count = 3; - - pci_setup_indirect(&cpci_hose, - BRIDGE_CPCI_PHYS + HW_BRIDGE_CFGADDR, - BRIDGE_CPCI_PHYS + HW_BRIDGE_CFGDATA); - - pci_register_hose(&cpci_hose); - - /* Initialize PCI64 bus registers */ - pci_hose_write_config_byte(&cpci_hose, - PCI_BDF(cpci_hose.first_busno,0,0), - CPC710_BUS_NUMBER, - cpci_hose.first_busno); - pci_hose_write_config_byte(&cpci_hose, - PCI_BDF(cpci_hose.first_busno,0,0), - CPC710_SUB_BUS_NUMBER, - cpci_hose.last_busno); - - cpci_hose.last_busno = pci_hose_scan(&cpci_hose); - - /* Write out correct max subordinate bus number for cpci hose */ - pci_hose_write_config_byte(&cpci_hose, - PCI_BDF(cpci_hose.first_busno,0,0), - CPC710_SUB_BUS_NUMBER, - cpci_hose.last_busno); -} diff --git a/board/pcippc2/cpc710_pci.h b/board/pcippc2/cpc710_pci.h deleted file mode 100644 index 24d0db6..0000000 --- a/board/pcippc2/cpc710_pci.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CPC710_PCI_H_ -#define _CPC710_PCI_H_ - -#define PCI_MEMORY_PHYS 0x00000000 -#define PCI_MEMORY_BUS 0x80000000 -#define PCI_MEMORY_MAXSIZE 0x20000000 - -#define BRIDGE_CPCI_PHYS 0xff500000 -#define BRIDGE_CPCI_MEM_SIZE 0x08000000 -#define BRIDGE_CPCI_MEM_PHYS 0xf0000000 -#define BRIDGE_CPCI_MEM_BUS 0x00000000 -#define BRIDGE_CPCI_IO_SIZE 0x02000000 -#define BRIDGE_CPCI_IO_PHYS 0xfc000000 -#define BRIDGE_CPCI_IO_BUS 0x00000000 - -#define BRIDGE_LOCAL_PHYS 0xff400000 -#define BRIDGE_LOCAL_MEM_SIZE 0x04000000 -#define BRIDGE_LOCAL_MEM_PHYS 0xf8000000 -#define BRIDGE_LOCAL_MEM_BUS 0x40000000 -#define BRIDGE_LOCAL_IO_SIZE 0x01000000 -#define BRIDGE_LOCAL_IO_PHYS 0xfe000000 -#define BRIDGE_LOCAL_IO_BUS 0x04000000 - -#define BRIDGE(r, x) (BRIDGE_##r##_PHYS + HW_BRIDGE_##x) - -#define PCI_LATENCY_TIMER_VAL 0xff - -#endif diff --git a/board/pcippc2/flash.c b/board/pcippc2/flash.c deleted file mode 100644 index ec604e0..0000000 --- a/board/pcippc2/flash.c +++ /dev/null @@ -1,573 +0,0 @@ -/* - * (C) Copyright 2001 - * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc. - * - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <flash.h> -#include <asm/io.h> - -/*---------------------------------------------------------------------*/ -#undef DEBUG_FLASH - -#ifdef DEBUG_FLASH -#define DEBUGF(fmt,args...) printf(fmt ,##args) -#else -#define DEBUGF(fmt,args...) -#endif -/*---------------------------------------------------------------------*/ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -static ulong flash_get_size (ulong addr, flash_info_t *info); -static int flash_get_offsets (ulong base, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); -static void flash_reset (ulong addr); - -unsigned long flash_init (void) -{ - unsigned int i; - unsigned long flash_size = 0; - - /* Init: no FLASHes known */ - for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - flash_info[i].sector_count = 0; - flash_info[i].size = 0; - } - - DEBUGF("\n## Get flash size @ 0x%08x\n", CONFIG_SYS_FLASH_BASE); - - flash_size = flash_get_size (CONFIG_SYS_FLASH_BASE, flash_info); - - DEBUGF("## Flash bank size: %08lx\n", flash_size); - - if (flash_size) { -#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE && \ - CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_MAX_SIZE - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH - /* ENV protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); -#endif - - } else { - puts ("Warning: the BOOT Flash is not initialised !"); - } - - return flash_size; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (ulong addr, flash_info_t *info) -{ - short i; - uchar value; - - /* Write auto select command: read Manufacturer ID */ - out8(addr + 0x0555, 0xAA); - iobarrier_rw(); - out8(addr + 0x02AA, 0x55); - iobarrier_rw(); - out8(addr + 0x0555, 0x90); - iobarrier_rw(); - - value = in8(addr); - iobarrier_rw(); - - DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value); - - switch (value | (value << 16)) { - case AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - - case FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - - case STM_MANUFACT: - info->flash_id = FLASH_MAN_STM; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - flash_reset (addr); - return 0; - } - - value = in8(addr + 1); /* device ID */ - iobarrier_rw(); - - DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", addr+1, value); - - switch ((ulong)value) { - case AMD_ID_F040B: - DEBUGF("Am29F040B\n"); - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512 kB */ - - case AMD_ID_LV040B: - DEBUGF("Am29LV040B\n"); - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512 kB */ - - case AMD_ID_LV400T: - DEBUGF("Am29LV400T\n"); - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV400B: - DEBUGF("Am29LV400B\n"); - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV800T: - DEBUGF("Am29LV800T\n"); - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV800B: - DEBUGF("Am29LV400B\n"); - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV160T: - DEBUGF("Am29LV160T\n"); - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV160B: - DEBUGF("Am29LV160B\n"); - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV320T: - DEBUGF("Am29LV320T\n"); - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ - -#if 0 - /* Has the same ID as AMD_ID_LV320T, to be fixed */ - case AMD_ID_LV320B: - DEBUGF("Am29LV320B\n"); - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ -#endif - - case AMD_ID_LV033C: - DEBUGF("Am29LV033C\n"); - info->flash_id += FLASH_AM033C; - info->sector_count = 64; - info->size = 0x01000000; - break; /* => 16Mb */ - - case STM_ID_F040B: - DEBUGF("M29F040B\n"); - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512 kB */ - - default: - info->flash_id = FLASH_UNKNOWN; - flash_reset (addr); - return (0); /* => no or unknown flash */ - - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - if (! flash_get_offsets (addr, info)) { - flash_reset (addr); - return 0; - } - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - value = in8(info->start[i] + 2); - iobarrier_rw(); - info->protect[i] = (value & 1) != 0; - } - - /* - * Reset bank to read mode - */ - flash_reset (addr); - - return (info->size); -} - -static int flash_get_offsets (ulong base, flash_info_t *info) -{ - unsigned int i; - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: - /* set sector offsets for uniform sector type */ - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + i * info->size / - info->sector_count; - } - break; - default: - return 0; - } - - return 1; -} - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - volatile ulong addr = info->start[0]; - int flag, prot, sect, l_sect; - ulong start, now, last; - - if (s_first < 0 || s_first > s_last) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - out8(addr + 0x555, 0xAA); - iobarrier_rw(); - out8(addr + 0x2AA, 0x55); - iobarrier_rw(); - out8(addr + 0x555, 0x80); - iobarrier_rw(); - out8(addr + 0x555, 0xAA); - iobarrier_rw(); - out8(addr + 0x2AA, 0x55); - iobarrier_rw(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = info->start[sect]; - out8(addr, 0x30); - iobarrier_rw(); - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = info->start[l_sect]; - - DEBUGF ("Start erase timeout: %d\n", CONFIG_SYS_FLASH_ERASE_TOUT); - - while ((in8(addr) & 0x80) != 0x80) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - flash_reset (info->start[0]); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } - iobarrier_rw(); - } - -DONE: - /* reset to read mode */ - flash_reset (info->start[0]); - - printf (" done\n"); - return 0; -} - -/* - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int i, l, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - for (; i<4 && cnt>0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - return (write_word(info, wp, data)); -} - -/* - * Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word (flash_info_t *info, ulong dest, ulong data) -{ - volatile ulong addr = info->start[0]; - ulong start; - int i; - - /* Check if Flash is (sufficiently) erased */ - if ((in32(dest) & data) != data) { - return (2); - } - - /* write each byte out */ - for (i = 0; i < 4; i++) { - char *data_ch = (char *)&data; - int flag = disable_interrupts(); - - out8(addr + 0x555, 0xAA); - iobarrier_rw(); - out8(addr + 0x2AA, 0x55); - iobarrier_rw(); - out8(addr + 0x555, 0xA0); - iobarrier_rw(); - out8(dest+i, data_ch[i]); - iobarrier_rw(); - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer (0); - while ((in8(dest+i) & 0x80) != (data_ch[i] & 0x80)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - flash_reset (addr); - return (1); - } - iobarrier_rw(); - } - } - - flash_reset (addr); - return (0); -} - -/* - * Reset bank to read mode - */ -static void flash_reset (ulong addr) -{ - out8(addr, 0xF0); /* reset bank */ - iobarrier_rw(); -} - -void flash_print_info (flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - case FLASH_MAN_STM: printf ("SGS THOMSON "); break; - default: printf ("Unknown Vendor "); break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); - break; - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; - } - - if (info->size % 0x100000 == 0) { - printf (" Size: %ld MB in %d Sectors\n", - info->size / 0x100000, info->sector_count); - } else if (info->size % 0x400 == 0) { - printf (" Size: %ld KB in %d Sectors\n", - info->size / 0x400, info->sector_count); - } else { - printf (" Size: %ld B in %d Sectors\n", - info->size, info->sector_count); - } - - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " " - ); - } - printf ("\n"); -} diff --git a/board/pcippc2/fpga_serial.c b/board/pcippc2/fpga_serial.c deleted file mode 100644 index de61ca0..0000000 --- a/board/pcippc2/fpga_serial.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> - -#include "fpga_serial.h" -#include "hardware.h" -#include "pcippc2.h" - -DECLARE_GLOBAL_DATA_PTR; - - /* 8 data, 1 stop, no parity - */ -#define LCRVAL 0x03 - /* RTS/DTR - */ -#define MCRVAL 0x03 - /* Clear & enable FIFOs - */ -#define FCRVAL 0x07 - -static void fpga_serial_wait (void); -static void fpga_serial_print (char c); - -void fpga_serial_init (int baudrate) -{ - int clock_divisor = 115200 / baudrate; - - out8 (FPGA (INT, SERIAL_CONFIG), 0x24); - iobarrier_rw (); - - fpga_serial_wait (); - - out8 (UART (IER), 0); - out8 (UART (LCR), LCRVAL | 0x80); - iobarrier_rw (); - out8 (UART (DLL), clock_divisor & 0xff); - out8 (UART (DLM), clock_divisor >> 8); - iobarrier_rw (); - out8 (UART (LCR), LCRVAL); - iobarrier_rw (); - out8 (UART (MCR), MCRVAL); - out8 (UART (FCR), FCRVAL); - iobarrier_rw (); -} - -void fpga_serial_putc (char c) -{ - if (c) { - fpga_serial_print (c); - } -} - -int fpga_serial_getc (void) -{ - while ((in8 (UART (LSR)) & 0x01) == 0); - - return in8 (UART (RBR)); -} - -int fpga_serial_tstc (void) -{ - return (in8 (UART (LSR)) & 0x01) != 0; -} - -void fpga_serial_setbrg (void) -{ - int clock_divisor = 115200 / gd->baudrate; - - fpga_serial_wait (); - - out8 (UART (LCR), LCRVAL | 0x80); - iobarrier_rw (); - out8 (UART (DLL), clock_divisor & 0xff); - out8 (UART (DLM), clock_divisor >> 8); - iobarrier_rw (); - out8 (UART (LCR), LCRVAL); - iobarrier_rw (); -} - -static void fpga_serial_wait (void) -{ - while ((in8 (UART (LSR)) & 0x40) == 0); -} - -static void fpga_serial_print (char c) -{ - if (c == '\n') { - while ((in8 (UART (LSR)) & 0x20) == 0); - - out8 (UART (THR), '\r'); - iobarrier_rw (); - } - - while ((in8 (UART (LSR)) & 0x20) == 0); - - out8 (UART (THR), c); - iobarrier_rw (); - - if (c == '\n') { - fpga_serial_wait (); - } -} diff --git a/board/pcippc2/fpga_serial.h b/board/pcippc2/fpga_serial.h deleted file mode 100644 index 106fbf7..0000000 --- a/board/pcippc2/fpga_serial.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _FPGA_SERIAL_H_ -#define _FPGA_SERIAL_H_ - -extern void fpga_serial_init (int); -extern void fpga_serial_putc (char); -extern int fpga_serial_getc (void); -extern int fpga_serial_tstc (void); -extern void fpga_serial_setbrg (void); - -#endif diff --git a/board/pcippc2/hardware.h b/board/pcippc2/hardware.h deleted file mode 100644 index 489929d..0000000 --- a/board/pcippc2/hardware.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _HARDWARE_H_ -#define _HARDWARE_H_ - -#include "cpc710.h" -#include "cpc710_pci.h" -#include "pcippc2_fpga.h" -#include "ns16550.h" - -#define REG(r, x) (HW_PHYS_##r + HW_##r##_##x) - - /* Address map: - * - * 0x00000000-0x20000000 SDRAM - * 0x40000000-0x00008000 Init RAM in the CPU DCache - * 0xf0000000-0xf8000000 CPCI MEM - * 0xf8000000-0xfc000000 Local PCI MEM - * 0xfc000000-0xfe000000 CPCI I/O - * 0xfe000000-0xff000000 Local PCI I/O - * 0xff000000-0xff201000 System configuration space - * 0xff400000-0xff500000 Local PCI bridge space - * 0xff500000-0xff600000 CPCI bridge space - * 0xfff00000-0xfff80000 Boot Flash - */ - -#endif diff --git a/board/pcippc2/i2c.c b/board/pcippc2/i2c.c deleted file mode 100644 index ab52562..0000000 --- a/board/pcippc2/i2c.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> - -#include "hardware.h" -#include "i2c.h" - -static void i2c_start (void); -static void i2c_stop (void); -static int i2c_write (u8 data); -static void i2c_read (u8 * data); - -static inline void i2c_port_start (void); -static inline void i2c_clock (unsigned int val); -static inline void i2c_data (unsigned int val); -static inline unsigned int - i2c_in (void); -static inline void i2c_write_bit (unsigned int val); -static inline unsigned int - i2c_read_bit (void); - -static inline void i2c_udelay (unsigned int time); - -int i2c_read_byte ( - u8 * data, - u8 dev, - u8 offset) -{ - int err = 0; - - i2c_start(); - - err = ! i2c_write(dev); - - if (! err) - { - err = ! i2c_write(offset); - } - - if (! err) - { - i2c_start(); - } - - if (! err) - { - err = ! i2c_write(dev | 0x01); - } - - if (! err) - { - i2c_read(data); - } - - i2c_stop(); - - return ! err; -} - -static inline void i2c_udelay ( - unsigned int time) -{ - int v; - - asm volatile("mtdec %0" : : "r" (time * ((CONFIG_SYS_BUS_CLK / 4) / 1000000))); - - do - { - asm volatile("isync; mfdec %0" : "=r" (v)); - } while (v >= 0); -} - - /* Low-level hardware access - */ - -#define BIT_GPDATA 0x80000000 -#define BIT_GPCLK 0x40000000 - -static inline void i2c_port_start (void) -{ - out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~(BIT_GPCLK | BIT_GPDATA)); - out32(REG(CPC0, GPOUT), in32(REG(CPC0, GPOUT)) & ~(BIT_GPCLK | BIT_GPDATA)); - iobarrier_rw(); - - i2c_udelay(1); -} - -static inline void i2c_clock ( - unsigned int val) -{ - if (val) - { - out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~BIT_GPCLK); - } - else - { - out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) | BIT_GPCLK); - } - - iobarrier_rw(); - - i2c_udelay(1); -} - -static inline void i2c_data ( - unsigned int val) -{ - if (val) - { - out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) & ~BIT_GPDATA); - } - else - { - out32(REG(CPC0, GPDIR), in32(REG(CPC0, GPDIR)) | BIT_GPDATA); - } - - iobarrier_rw(); - - i2c_udelay(1); -} - -static inline unsigned int i2c_in (void) -{ - unsigned int val = ((in32(REG(CPC0, GPIN)) & BIT_GPDATA) != 0)?1:0; - - iobarrier_rw(); - - return val; -} - - - /* Protocol implementation - */ - -static inline void i2c_write_bit ( - unsigned int val) -{ - i2c_data(val); - i2c_udelay(10); - i2c_clock(1); - i2c_udelay(10); - i2c_clock(0); - i2c_udelay(10); -} - -static inline unsigned int i2c_read_bit (void) -{ - unsigned int val; - - i2c_data(1); - i2c_udelay(10); - - i2c_clock(1); - i2c_udelay(10); - - val = i2c_in(); - - i2c_clock(0); - i2c_udelay(10); - - return val; -} - -unsigned int i2c_reset (void) -{ - unsigned int val; - int i; - - i2c_port_start(); - - i=0; - do { - i2c_udelay(10); - i2c_clock(0); - i2c_udelay(10); - i2c_clock(1); - i2c_udelay(10); - val = i2c_in(); - i++; - } while ((i<9)&&(val==0)); - return (val); -} - - -static void i2c_start (void) -{ - i2c_data(1); - i2c_clock(1); - i2c_udelay(10); - i2c_data(0); - i2c_udelay(10); - i2c_clock(0); - i2c_udelay(10); -} - -static void i2c_stop (void) -{ - i2c_data(0); - i2c_udelay(10); - i2c_clock(1); - i2c_udelay(10); - i2c_data(1); - i2c_udelay(10); -} - -static int i2c_write ( - u8 data) -{ - unsigned int i; - - for (i = 0; i < 8; i++) - { - i2c_write_bit(data >> 7); - data <<= 1; - } - - return i2c_read_bit() == 0; -} - -static void i2c_read ( - u8 * data) -{ - unsigned int i; - u8 val = 0; - - for (i = 0; i < 8; i++) - { - val <<= 1; - val |= i2c_read_bit(); - } - - *data = val; - i2c_write_bit(1); /* NoAck */ -} diff --git a/board/pcippc2/i2c.h b/board/pcippc2/i2c.h deleted file mode 100644 index 1224b42..0000000 --- a/board/pcippc2/i2c.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _I2C_H_ -#define _I2C_H_ - -#include <common.h> - -extern int i2c_read_byte (u8 * data, - u8 dev, - u8 offset); - -extern unsigned int i2c_reset (void); - - -#endif diff --git a/board/pcippc2/ns16550.h b/board/pcippc2/ns16550.h deleted file mode 100644 index 7023f13..0000000 --- a/board/pcippc2/ns16550.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _NS16550_H_ -#define _NS16550_H_ - -#define NS16550_RBR 0x00 -#define NS16550_IER 0x01 -#define NS16550_FCR 0x02 -#define NS16550_LCR 0x03 -#define NS16550_MCR 0x04 -#define NS16550_LSR 0x05 -#define NS16550_MSR 0x06 -#define NS16550_SCR 0x07 - -#define NS16550_THR NS16550_RBR -#define NS16550_IIR NS16550_FCR -#define NS16550_DLL NS16550_RBR -#define NS16550_DLM NS16550_IER - -#endif diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c deleted file mode 100644 index 5e6fc58..0000000 --- a/board/pcippc2/pcippc2.c +++ /dev/null @@ -1,253 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <command.h> -#include <asm/io.h> -#include <linux/mtd/doc2000.h> -#include <watchdog.h> -#include <pci.h> -#include <netdev.h> -#include <serial.h> - -#include "hardware.h" -#include "pcippc2.h" -#include "sconsole.h" -#include "fpga_serial.h" - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_WATCHDOG) - -static int pcippc2_wdt_init_done = 0; - -void pcippc2_wdt_init (void); - -#endif - - /* Check board identity - */ -int checkboard (void) -{ -#ifdef CONFIG_PCIPPC2 - puts ("Board: Gespac PCIPPC-2\n"); -#else - puts ("Board: Gespac PCIPPC-6\n"); -#endif - return 0; -} - - /* RAM size is stored in CPC0_RGBAN1 - */ -u32 pcippc2_sdram_size (void) -{ - return in32 (REG (CPC0, RGBAN1)); -} - -phys_size_t initdram (int board_type) -{ - return cpc710_ram_init (); -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - out32 (REG (CPC0, SPOR), 0); - iobarrier_rw (); - while (1); - /* notreached */ - return (-1); -} - -int board_early_init_f (void) -{ - out32 (REG (CPC0, RSTR), 0xC0000000); - iobarrier_rw (); - - out32 (REG (CPC0, RSTR), 0xF0000000); - iobarrier_rw (); - - out32 (REG (CPC0, UCTL), 0x00F80000); - - out32 (REG (CPC0, SIOC0), 0x30000000); - - out32 (REG (CPC0, ABCNTL), 0x00000000); - - out32 (REG (CPC0, SESR), 0x00000000); - out32 (REG (CPC0, SEAR), 0x00000000); - - /* Detect IBM Avignon CPC710 Revision */ - if ((in32 (REG (CPC0, UCTL)) & 0x000000F0) == CPC710_TYPE_100P) - out32 (REG (CPC0, PGCHP), 0xA0000040); - else - out32 (REG (CPC0, PGCHP), 0x80800040); - - - out32 (REG (CPC0, ATAS), 0x709C2508); - - iobarrier_rw (); - - return 0; -} - -void after_reloc (ulong dest_addr) -{ - /* Jump to the main U-Boot board init code - */ - board_init_r ((gd_t *)gd, dest_addr); -} - -int misc_init_r (void) -{ - pcippc2_fpga_init (); - - pcippc2_cpci3264_init (); - -#if defined(CONFIG_WATCHDOG) - pcippc2_wdt_init (); -#endif - - fpga_serial_init (sconsole_get_baudrate ()); - - sconsole_putc = fpga_serial_putc; - sconsole_puts = default_serial_puts; - sconsole_getc = fpga_serial_getc; - sconsole_tstc = fpga_serial_tstc; - sconsole_setbrg = fpga_serial_setbrg; - - sconsole_flush (); - return (0); -} - -void pci_init_board (void) -{ - cpc710_pci_init (); - - /* FPGA requires no retry timeouts to be enabled - */ - cpc710_pci_enable_timeout (); -} - -#ifdef CONFIG_CMD_DOC -void doc_init (void) -{ - doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC); -} -#endif - -void pcippc2_cpci3264_init (void) -{ - pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0); - - if (bdf == -1) - { - puts("Unable to find FPGA !\n"); - hang(); - } - - if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000) - /* 32-bits Compact PCI bus - LSB bit */ - { - iobarrier_rw(); - out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */ - iobarrier_rw(); - } -} - -#if defined(CONFIG_WATCHDOG) - -void pcippc2_wdt_init (void) -{ - out16r (FPGA (WDT, PROG), 0xffff); - out8 (FPGA (WDT, CTRL), 0x1); - - pcippc2_wdt_init_done = 1; -} - -void pcippc2_wdt_done (void) -{ - out8 (FPGA (WDT, CTRL), 0x0); - - pcippc2_wdt_init_done = 0; -} - -void pcippc2_wdt_reset (void) -{ - if (pcippc2_wdt_init_done == 1) - out8 (FPGA (WDT, REFRESH), 0x56); -} - -void watchdog_reset (void) -{ - int re_enable = disable_interrupts (); - - pcippc2_wdt_reset (); - if (re_enable) - enable_interrupts (); -} - -#if defined(CONFIG_CMD_BSP) -int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - switch (argc) { - case 1: - printf ("Watchdog timer status is %s\n", - pcippc2_wdt_init_done == 1 ? "on" : "off"); - - return 0; - case 2: - if (!strcmp(argv[1],"on")) { - pcippc2_wdt_init(); - printf("Watchdog timer now is on\n"); - - return 0; - - } else if (!strcmp(argv[1],"off")) { - pcippc2_wdt_done(); - printf("Watchdog timer now is off\n"); - - return 0; - - } else - break; - default: - break; - } - return cmd_usage(cmdtp); -} - -U_BOOT_CMD( - wd, 2, 1, do_wd, - "check and set watchdog", - "on - switch watchDog on\n" - "wd off - switch watchdog off\n" - "wd - print current status" -); - -#endif -#endif /* CONFIG_WATCHDOG */ - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} diff --git a/board/pcippc2/pcippc2.h b/board/pcippc2/pcippc2.h deleted file mode 100644 index a1366ef..0000000 --- a/board/pcippc2/pcippc2.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _PCIPPC2_H_ -#define _PCIPPC2_H_ - -#include <config.h> -#include <common.h> - -#include "hardware.h" - -#define FPGA(r, p) (pcippc2_fpga0_phys + HW_FPGA0_##r##_##p) -#define UART(r) (pcippc2_fpga0_phys + HW_FPGA0_UART1 + NS16550_##r * 4) -#define RTC(r) (pcippc2_fpga1_phys + HW_FPGA1_RTC + r) - -extern u32 pcippc2_fpga0_phys; -extern u32 pcippc2_fpga1_phys; - -extern u32 pcippc2_sdram_size (void); - -extern void pcippc2_fpga_init (void); - -extern void pcippc2_cpci3264_init (void); - -extern void cpc710_pci_init (void); -extern void cpc710_pci_enable_timeout (void); - -extern unsigned long - cpc710_ram_init (void); - -#endif diff --git a/board/pcippc2/pcippc2_fpga.c b/board/pcippc2/pcippc2_fpga.c deleted file mode 100644 index 7f6739d..0000000 --- a/board/pcippc2/pcippc2_fpga.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> - -#include "pci.h" - -#include "hardware.h" -#include "pcippc2.h" - -u32 pcippc2_fpga0_phys; -u32 pcippc2_fpga1_phys; - -void pcippc2_fpga_init (void) -{ - pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0); - unsigned int addr; - u16 cmd; - - if (bdf == -1) - { - puts("Unable to find FPGA !\n"); - hang(); - } - - pci_read_config_word(bdf, PCI_COMMAND, &cmd); - if ((cmd & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)) != (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)) - { - puts("FPGA is not configured !\n"); - hang(); - } - - pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, &addr); - if (addr & 0x1) - { - /* IO space - */ - pcippc2_fpga0_phys = pci_io_to_phys(bdf, addr & 0xfffffffc); - } - else - { - /* Memory space - */ - pcippc2_fpga0_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0); - } - - pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr); - if (addr & 0x1) - { - /* IO space - */ - pcippc2_fpga1_phys = pci_io_to_phys(bdf, addr & 0xfffffffc); - } - else - { - /* Memory space - */ - pcippc2_fpga1_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0); - } - - /* Interrupts are not used - */ - out32(FPGA(INT, INTR_MASK), 0xffffffff); - iobarrier_rw(); -} diff --git a/board/pcippc2/pcippc2_fpga.h b/board/pcippc2/pcippc2_fpga.h deleted file mode 100644 index 850c331..0000000 --- a/board/pcippc2/pcippc2_fpga.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _PCIPPC2_FPGA_H_ -#define _PCIPPC2_FPGA_H_ - -#define FPGA_VENDOR_ID 0x1310 -#define FPGA_DEVICE_ID 0x000d - -#define HW_FPGA0_INT 0x0000 -#define HW_FPGA0_BOARD 0x0060 -#define HW_FPGA0_UART1 0x0080 -#define HW_FPGA0_UART2 0x0100 -#define HW_FPGA0_RTC 0x2000 -#define HW_FPGA0_DOC 0x4000 -#define HW_FPGA1_RTC 0x0000 -#define HW_FPGA1_DOC 0x4000 - -#define HW_FPGA0_INT_INTR_MASK 0x30 -#define HW_FPGA0_INT_INTR_STATUS 0x34 -#define HW_FPGA0_INT_INTR_EOI 0x40 -#define HW_FPGA0_INT_SERIAL_CONFIG 0x5c - -#define HW_FPGA0_WDT_CTRL 0x44 -#define HW_FPGA0_WDT_PROG 0x48 -#define HW_FPGA0_WDT_VAL 0x4c -#define HW_FPGA0_WDT_REFRESH 0x50 - -#endif diff --git a/board/pcippc2/sconsole.c b/board/pcippc2/sconsole.c deleted file mode 100644 index aa3c908..0000000 --- a/board/pcippc2/sconsole.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <common.h> -#include <serial.h> -#include <linux/compiler.h> - -#include "sconsole.h" - -DECLARE_GLOBAL_DATA_PTR; - -void (*sconsole_putc) (char) = 0; -void (*sconsole_puts) (const char *) = 0; -int (*sconsole_getc) (void) = 0; -int (*sconsole_tstc) (void) = 0; -void (*sconsole_setbrg) (void) = 0; - -static int sconsole_serial_init(void) -{ - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - sb->pos = 0; - sb->size = 0; - sb->baud = gd->baudrate; - sb->max_size = CONFIG_SYS_SCONSOLE_SIZE - sizeof (sconsole_buffer_t); - - return (0); -} - -static void sconsole_serial_putc(char c) -{ - if (sconsole_putc) { - (*sconsole_putc) (c); - } else { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - if (c) { - sb->data[sb->pos++] = c; - if (sb->pos == sb->max_size) { - sb->pos = 0; - } - if (sb->size < sb->max_size) { - sb->size++; - } - } - } -} - -static void sconsole_serial_puts(const char *s) -{ - if (sconsole_puts) { - (*sconsole_puts) (s); - } else { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - while (*s) { - sb->data[sb->pos++] = *s++; - if (sb->pos == sb->max_size) { - sb->pos = 0; - } - if (sb->size < sb->max_size) { - sb->size++; - } - } - } -} - -static int sconsole_serial_getc(void) -{ - if (sconsole_getc) { - return (*sconsole_getc) (); - } else { - return 0; - } -} - -static int sconsole_serial_tstc(void) -{ - if (sconsole_tstc) { - return (*sconsole_tstc) (); - } else { - return 0; - } -} - -static void sconsole_serial_setbrg(void) -{ - if (sconsole_setbrg) { - (*sconsole_setbrg) (); - } else { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - sb->baud = gd->baudrate; - } -} - -static struct serial_device sconsole_serial_drv = { - .name = "sconsole_serial", - .start = sconsole_serial_init, - .stop = NULL, - .setbrg = sconsole_serial_setbrg, - .putc = sconsole_serial_putc, - .puts = sconsole_serial_puts, - .getc = sconsole_serial_getc, - .tstc = sconsole_serial_tstc, -}; - -void sconsole_serial_initialize(void) -{ - serial_register(&sconsole_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &sconsole_serial_drv; -} - -int sconsole_get_baudrate (void) -{ - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - - return sb->baud; -} - -void sconsole_flush (void) -{ - if (sconsole_putc) { - sconsole_buffer_t *sb = SCONSOLE_BUFFER; - unsigned int end = sb->pos < sb->size - ? sb->pos + sb->max_size - sb->size - : sb->pos - sb->size; - - while (sb->size) { - (*sconsole_putc) (sb->data[end++]); - if (end == sb->max_size) { - end = 0; - } - sb->size--; - } - } -} diff --git a/board/pcippc2/sconsole.h b/board/pcippc2/sconsole.h deleted file mode 100644 index ff0ccab..0000000 --- a/board/pcippc2/sconsole.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SCONSOLE_H_ -#define _SCONSOLE_H_ - -#include <config.h> - -typedef struct sconsole_buffer_s { - unsigned long size; - unsigned long max_size; - unsigned long pos; - unsigned long baud; - char data[1]; -} sconsole_buffer_t; - -#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CONFIG_SYS_SCONSOLE_ADDR) - -extern void (* sconsole_putc) (char); -extern void (* sconsole_puts) (const char *); -extern int (* sconsole_getc) (void); -extern int (* sconsole_tstc) (void); -extern void (* sconsole_setbrg) (void); - -extern void sconsole_flush (void); -extern int sconsole_get_baudrate (void); - -#endif diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c index a2a1323..3048acd 100644 --- a/board/pdm360ng/pdm360ng.c +++ b/board/pdm360ng/pdm360ng.c @@ -44,63 +44,6 @@ DECLARE_GLOBAL_DATA_PTR; extern flash_info_t flash_info[]; ulong flash_get_size (phys_addr_t base, int banknum); -/* Clocks in use */ -#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ - CLOCK_SCCR1_LPC_EN | \ - CLOCK_SCCR1_NFC_EN | \ - CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ - CLOCK_SCCR1_PSCFIFO_EN | \ - CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN | \ - CLOCK_SCCR1_TPR_EN) - -#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ - CLOCK_SCCR2_SPDIF_EN | \ - CLOCK_SCCR2_DIU_EN | \ - CLOCK_SCCR2_I2C_EN) - -int board_early_init_f(void) -{ - volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - - /* - * Initialize Local Window for FLASH-Bank1 access (CS1) - */ - out_be32(&im->sysconf.lpcs1aw, - CSAW_START(CONFIG_SYS_FLASH1_BASE) | - CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH_SIZE) - ); - out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG); - - /* - * Local Window for MRAM access (CS2) - */ - out_be32(&im->sysconf.lpcs2aw, - CSAW_START(CONFIG_SYS_MRAM_BASE) | - CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE) - ); - out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); - - sync_law(&im->sysconf.lpcs2aw); - - /* - * Configure Flash Speed - */ - out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); - out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); - - /* - * Enable clocks - */ - out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); - out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); -#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) - setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -#endif - - return 0; -} - sdram_conf_t mddrc_config[] = { { (512 << 20), /* 512 MB RAM configuration */ @@ -557,7 +500,6 @@ void ft_board_setup(void *blob, bd_t *bd) int rc, i = 0; ft_cpu_setup(blob, bd); - fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_FDT_FIXUP_PARTITIONS fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); #endif diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c index 55bc018..1708ac2 100644 --- a/board/phytec/pcm051/board.c +++ b/board/phytec/pcm051/board.c @@ -61,7 +61,7 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; static void rtc32k_enable(void) { - struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE; + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; /* * Unlock the RTC's registers. For more details please see the @@ -159,7 +159,7 @@ void s_init(void) enable_board_pin_mux(); config_ddr(DDR_CLK_MHZ, MT41J256M8HX15E_IOCTRL_VALUE, &ddr3_data, - &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data); + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); #endif } @@ -199,8 +199,8 @@ static struct cpsw_slave_data cpsw_slaves[] = { }; static struct cpsw_platform_data cpsw_data = { - .mdio_base = AM335X_CPSW_MDIO_BASE, - .cpsw_base = AM335X_CPSW_BASE, + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, .mdio_div = 0xff, .channels = 8, .cpdma_reg_ofs = 0x800, diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds index c2ec827..3334a44 100644 --- a/board/quantum/u-boot.lds +++ b/board/quantum/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds index 9262aa5..ef3a17f 100644 --- a/board/r360mpi/u-boot.lds +++ b/board/r360mpi/u-boot.lds @@ -95,7 +95,7 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); . = ALIGN(128 * 1024); .ppcenv : diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c index 688b0aa..6b3e095 100644 --- a/board/raspberrypi/rpi_b/rpi_b.c +++ b/board/raspberrypi/rpi_b/rpi_b.c @@ -15,13 +15,39 @@ */ #include <common.h> +#include <asm/arch/mbox.h> +#include <asm/arch/sdhci.h> #include <asm/global_data.h> DECLARE_GLOBAL_DATA_PTR; +struct msg_get_arm_mem { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; + u32 end_tag; +}; + +struct msg_get_clock_rate { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_clock_rate get_clock_rate; + u32 end_tag; +}; + int dram_init(void) { - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); + int ret; + + BCM2835_MBOX_INIT_HDR(msg); + BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY); + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); + if (ret) { + printf("bcm2835: Could not query ARM memory size\n"); + return -1; + } + + gd->ram_size = msg->get_arm_mem.body.resp.mem_size; return 0; } @@ -32,3 +58,22 @@ int board_init(void) return 0; } + +int board_mmc_init(void) +{ + ALLOC_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1, 16); + int ret; + + BCM2835_MBOX_INIT_HDR(msg_clk); + BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE); + msg_clk->get_clock_rate.body.req.clock_id = BCM2835_MBOX_CLOCK_ID_EMMC; + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr); + if (ret) { + printf("bcm2835: Could not query eMMC clock rate\n"); + return -1; + } + + return bcm2835_sdhci_init(BCM2835_SDHCI_BASE, + msg_clk->get_clock_rate.body.resp.rate_hz); +} diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds index c6560c6..b354409 100644 --- a/board/rbc823/u-boot.lds +++ b/board/rbc823/u-boot.lds @@ -103,6 +103,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/renesas/sh7752evb/u-boot.lds b/board/renesas/sh7752evb/u-boot.lds index 5bbb63f..276f525 100644 --- a/board/renesas/sh7752evb/u-boot.lds +++ b/board/renesas/sh7752evb/u-boot.lds @@ -93,5 +93,5 @@ SECTIONS } PROVIDE (bss_end = .); - PROVIDE (__bss_end__ = .); + PROVIDE (__bss_end = .); } diff --git a/board/renesas/sh7757lcr/u-boot.lds b/board/renesas/sh7757lcr/u-boot.lds index 0717d04..5882427 100644 --- a/board/renesas/sh7757lcr/u-boot.lds +++ b/board/renesas/sh7757lcr/u-boot.lds @@ -94,5 +94,5 @@ SECTIONS } PROVIDE (bss_end = .); - PROVIDE (__bss_end__ = .); + PROVIDE (__bss_end = .); } diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 4662546..240b936 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -125,6 +125,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts index cbfab6f..1c2d52d 100644 --- a/board/samsung/dts/exynos5250-smdk5250.dts +++ b/board/samsung/dts/exynos5250-smdk5250.dts @@ -66,4 +66,17 @@ compatible = "maxim,max77686_pmic"; }; }; + + tmu@10060000 { + samsung,min-temp = <25>; + samsung,max-temp = <125>; + samsung,start-warning = <95>; + samsung,start-tripping = <105>; + samsung,hw-tripping = <110>; + samsung,efuse-min-value = <40>; + samsung,efuse-value = <55>; + samsung,efuse-max-value = <100>; + samsung,slope = <274761730>; + samsung,dc-value = <25>; + }; }; diff --git a/board/samsung/dts/exynos5250-snow.dts b/board/samsung/dts/exynos5250-snow.dts new file mode 100644 index 0000000..8b303bf --- /dev/null +++ b/board/samsung/dts/exynos5250-snow.dts @@ -0,0 +1,58 @@ +/* + * SAMSUNG Snow board device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ ARCH_CPU_DTS + +/ { + model = "Google Snow"; + compatible = "google,snow", "samsung,exynos5250"; + + aliases { + i2c0 = "/i2c@12c60000"; + i2c1 = "/i2c@12c70000"; + i2c2 = "/i2c@12c80000"; + i2c3 = "/i2c@12c90000"; + i2c4 = "/i2c@12ca0000"; + i2c5 = "/i2c@12cb0000"; + i2c6 = "/i2c@12cc0000"; + i2c7 = "/i2c@12cd0000"; + spi0 = "/spi@12d20000"; + spi1 = "/spi@12d30000"; + spi2 = "/spi@12d40000"; + spi3 = "/spi@131a0000"; + spi4 = "/spi@131b0000"; + }; + + sound@12d60000 { + samsung,i2s-epll-clock-frequency = <192000000>; + samsung,i2s-sampling-rate = <48000>; + samsung,i2s-bits-per-sample = <16>; + samsung,i2s-channels = <2>; + samsung,i2s-lr-clk-framesize = <256>; + samsung,i2s-bit-clk-framesize = <32>; + samsung,codec-type = "max98095"; + }; + + i2c@12cd0000 { + soundcodec@22 { + reg = <0x22>; + compatible = "maxim,max98095-codec"; + }; + }; + + i2c@12c60000 { + pmic@9 { + reg = <0x9>; + compatible = "maxim,max77686_pmic"; + }; + }; +}; diff --git a/board/samsung/smdk5250/smdk5250-uboot-spl.lds b/board/samsung/smdk5250/smdk5250-uboot-spl.lds index 4ef6a51..4c8baaa 100644 --- a/board/samsung/smdk5250/smdk5250-uboot-spl.lds +++ b/board/samsung/smdk5250/smdk5250-uboot-spl.lds @@ -66,6 +66,6 @@ SECTIONS __bss_start = .; *(.bss*) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } >.sram } diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 7a5f132..217c6df 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -23,6 +23,7 @@ #include <common.h> #include <fdtdec.h> #include <asm/io.h> +#include <errno.h> #include <i2c.h> #include <lcd.h> #include <netdev.h> @@ -35,9 +36,40 @@ #include <asm/arch/sromc.h> #include <asm/arch/dp_info.h> #include <power/pmic.h> +#include <power/max77686_pmic.h> +#include <tmu.h> DECLARE_GLOBAL_DATA_PTR; +#if defined CONFIG_EXYNOS_TMU +/* + * Boot Time Thermal Analysis for SoC temperature threshold breach + */ +static void boot_temp_check(void) +{ + int temp; + + switch (tmu_monitor(&temp)) { + /* Status TRIPPED ans WARNING means corresponding threshold breach */ + case TMU_STATUS_TRIPPED: + puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); + set_ps_hold_ctrl(); + hang(); + break; + case TMU_STATUS_WARNING: + puts("EXYNOS_TMU: WARNING! Temperature very high\n"); + break; + /* + * TMU_STATUS_INIT means something is wrong with temperature sensing + * and TMU status was changed back from NORMAL to INIT. + */ + case TMU_STATUS_INIT: + default: + debug("EXYNOS_TMU: Unknown TMU state\n"); + } +} +#endif + #ifdef CONFIG_USB_EHCI_EXYNOS int board_usb_vbus_init(void) { @@ -54,15 +86,39 @@ int board_usb_vbus_init(void) } #endif +#ifdef CONFIG_SOUND_MAX98095 +static void board_enable_audio_codec(void) +{ + struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) + samsung_get_base_gpio_part1(); + + /* Enable MAX98095 Codec */ + s5p_gpio_direction_output(&gpio1->x1, 7, 1); + s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); +} +#endif + int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + +#if defined CONFIG_EXYNOS_TMU + if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { + debug("%s: Failed to init TMU\n", __func__); + return -1; + } + boot_temp_check(); +#endif + #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif #ifdef CONFIG_USB_EHCI_EXYNOS board_usb_vbus_init(); #endif +#ifdef CONFIG_SOUND_MAX98095 + board_enable_audio_codec(); +#endif return 0; } @@ -80,12 +136,119 @@ int dram_init(void) } #if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + int power_init_board(void) { + struct pmic *p; + + set_ps_hold_ctrl(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (pmic_init(I2C_PMIC)) return -1; - else - return 0; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; } #endif @@ -212,8 +375,17 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { - printf("\nBoard: SMDK5250\n"); +#ifdef CONFIG_OF_CONTROL + const char *board_name; + board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (board_name == NULL) + printf("\nUnknown Board\n"); + else + printf("\nBoard: %s\n", board_name); +#else + printf("\nBoard: SMDK5250\n"); +#endif return 0; } #endif diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds index ae32b16..64c650d 100644 --- a/board/samsung/smdk6400/u-boot-nand.lds +++ b/board/samsung/smdk6400/u-boot-nand.lds @@ -75,7 +75,7 @@ SECTIONS __bss_start = .; *(.bss) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } /DISCARD/ : { *(.dynstr*) } diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 88d193d..9207646 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -42,6 +42,7 @@ #include <power/max8997_muic.h> #include <power/battery.h> #include <power/max17042_fg.h> +#include <usb_mass_storage.h> #include "setup.h" @@ -791,3 +792,65 @@ void init_panel_info(vidinfo_t *vid) setenv("lcdinfo", "lcd=s6e8ax0"); } + +#ifdef CONFIG_USB_GADGET_MASS_STORAGE +static int ums_read_sector(struct ums_device *ums_dev, + ulong start, lbaint_t blkcnt, void *buf) +{ + if (ums_dev->mmc->block_dev.block_read(ums_dev->dev_num, + start + ums_dev->offset, blkcnt, buf) != blkcnt) + return -1; + + return 0; +} + +static int ums_write_sector(struct ums_device *ums_dev, + ulong start, lbaint_t blkcnt, const void *buf) +{ + if (ums_dev->mmc->block_dev.block_write(ums_dev->dev_num, + start + ums_dev->offset, blkcnt, buf) != blkcnt) + return -1; + + return 0; +} + +static void ums_get_capacity(struct ums_device *ums_dev, + long long int *capacity) +{ + long long int tmp_capacity; + + tmp_capacity = (long long int) ((ums_dev->offset + ums_dev->part_size) + * SECTOR_SIZE); + *capacity = ums_dev->mmc->capacity - tmp_capacity; +} + +static struct ums_board_info ums_board = { + .read_sector = ums_read_sector, + .write_sector = ums_write_sector, + .get_capacity = ums_get_capacity, + .name = "TRATS UMS disk", + .ums_dev = { + .mmc = NULL, + .dev_num = 0, + .offset = 0, + .part_size = 0. + }, +}; + +struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int offset, + unsigned int part_size) +{ + struct mmc *mmc; + + mmc = find_mmc_device(dev_num); + if (!mmc) + return NULL; + + ums_board.ums_dev.mmc = mmc; + ums_board.ums_dev.dev_num = dev_num; + ums_board.ums_dev.offset = offset; + ums_board.ums_dev.part_size = part_size; + + return &ums_board; +} +#endif diff --git a/board/sandpoint/u-boot.lds b/board/sandpoint/u-boot.lds index ca13619..95e13c4 100644 --- a/board/sandpoint/u-boot.lds +++ b/board/sandpoint/u-boot.lds @@ -95,6 +95,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds index fa4de9d..66c5fba 100644 --- a/board/sixnet/u-boot.lds +++ b/board/sixnet/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds index 5929335..285e897 100644 --- a/board/snmc/qs850/u-boot.lds +++ b/board/snmc/qs850/u-boot.lds @@ -96,6 +96,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds index c2ec827..3334a44 100644 --- a/board/snmc/qs860t/u-boot.lds +++ b/board/snmc/qs860t/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/spc1920/u-boot.lds b/board/spc1920/u-boot.lds index c2ec827..3334a44 100644 --- a/board/spc1920/u-boot.lds +++ b/board/spc1920/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds index b2ad343..58f2565 100644 --- a/board/spd8xx/u-boot.lds +++ b/board/spd8xx/u-boot.lds @@ -102,6 +102,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds index ddb5a72..03891e9 100644 --- a/board/stx/stxxtc/u-boot.lds +++ b/board/stx/stxxtc/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds index ebfa890..99b8bfa 100644 --- a/board/svm_sc8xx/u-boot.lds +++ b/board/svm_sc8xx/u-boot.lds @@ -110,6 +110,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index f4b972b..12620bb 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -134,7 +134,7 @@ static int read_eeprom(void) static void rtc32k_enable(void) { - struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE; + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; /* * Unlock the RTC's registers. For more details please see the @@ -208,6 +208,14 @@ static const struct ddr_data ddr3_data = { .datadldiff0 = PHY_DLL_LOCK_DIFF, }; +static const struct ddr_data ddr3_beagleblack_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, + .datadldiff0 = PHY_DLL_LOCK_DIFF, +}; + static const struct ddr_data ddr3_evm_data = { .datardsratio0 = MT41J512M8RH125_RD_DQS, .datawdsratio0 = MT41J512M8RH125_WR_DQS, @@ -230,6 +238,20 @@ static const struct cmd_control ddr3_cmd_ctrl_data = { .cmd2iclkout = MT41J128MJT125_INVERT_CLKOUT, }; +static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + static const struct cmd_control ddr3_evm_cmd_ctrl_data = { .cmd0csratio = MT41J512M8RH125_RATIO, .cmd0dldiff = MT41J512M8RH125_DLL_LOCK_DIFF, @@ -251,7 +273,18 @@ static struct emif_regs ddr3_emif_reg_data = { .sdram_tim2 = MT41J128MJT125_EMIF_TIM2, .sdram_tim3 = MT41J128MJT125_EMIF_TIM3, .zq_config = MT41J128MJT125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, +}; + +static struct emif_regs ddr3_beagleblack_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, }; static struct emif_regs ddr3_evm_emif_reg_data = { @@ -261,7 +294,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = { .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2, .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3, .zq_config = MT41J512M8RH125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, }; #endif @@ -341,15 +375,20 @@ void s_init(void) gpio_direction_output(GPIO_DDR_VTT_EN, 1); } - if (board_is_evm_sk() || board_is_bone_lt()) + if (board_is_evm_sk()) config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, - &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data); + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); + else if (board_is_bone_lt()) + config_ddr(303, MT41K256M16HA125E_IOCTRL_VALUE, + &ddr3_beagleblack_data, + &ddr3_beagleblack_cmd_ctrl_data, + &ddr3_beagleblack_emif_reg_data, 0); else if (board_is_evm_15_or_later()) config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, - &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data); + &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0); else config_ddr(266, MT47H128M16RT25E_IOCTRL_VALUE, &ddr2_data, - &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data); + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); #endif } @@ -412,8 +451,8 @@ static struct cpsw_slave_data cpsw_slaves[] = { }; static struct cpsw_platform_data cpsw_data = { - .mdio_base = AM335X_CPSW_MDIO_BASE, - .cpsw_base = AM335X_CPSW_BASE, + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, .mdio_div = 0xff, .channels = 8, .cpdma_reg_ofs = 0x800, diff --git a/board/pcippc2/Makefile b/board/ti/ti814x/Makefile index 6f0a928..09d2422 100644 --- a/board/pcippc2/Makefile +++ b/board/ti/ti814x/Makefile @@ -1,35 +1,28 @@ # -# (C) Copyright 2002-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# Makefile # -# See file CREDITS for list of people who contributed to this -# project. +# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License as # published by the Free Software Foundation; either version 2 of # the License, or (at your option) any later version. # -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# This program is distributed "as is" WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o cpc710_pci.o flash.o sconsole.o \ - fpga_serial.o pcippc2_fpga.o cpc710_init_ram.o i2c.o - -SOBJS = +ifdef CONFIG_SPL_BUILD +COBJS := mux.o +endif +COBJS += evm.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) @@ -37,6 +30,12 @@ SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) $(SOBJS) $(call cmd_link_o_target, $(OBJS) $(SOBJS)) +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + ######################################################################### # defines $(obj).depend target diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c new file mode 100644 index 0000000..446e36b --- /dev/null +++ b/board/ti/ti814x/evm.c @@ -0,0 +1,198 @@ +/* + * evm.c + * + * Board functions for TI814x EVM + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include "evm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD +static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; +static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; +#endif + +/* UART Defines */ +#ifdef CONFIG_SPL_BUILD +#define UART_RESET (0x1 << 1) +#define UART_CLK_RUNNING_MASK 0x1 +#define UART_SMART_IDLE_EN (0x1 << 0x3) + +static void rtc32k_enable(void) +{ + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; + + /* + * Unlock the RTC's registers. For more details please see the + * RTC_SS section of the TRM. In order to unlock we need to + * write these specific values (keys) in this order. + */ + writel(0x83e70b13, &rtc->kick0r); + writel(0x95a4f1e0, &rtc->kick1r); + + /* Enable the RTC 32K OSC by setting bits 3 and 6. */ + writel((1 << 3) | (1 << 6), &rtc->osc); +} + +static void uart_enable(void) +{ + u32 regVal; + + /* UART softreset */ + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_RESET; + writel(regVal, &uart_base->uartsyscfg); + while ((readl(&uart_base->uartsyssts) & + UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) + ; + + /* Disable smart idle */ + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_SMART_IDLE_EN; + writel(regVal, &uart_base->uartsyscfg); +} + +static void wdt_disable(void) +{ + writel(0xAAAA, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + writel(0x5555, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; +} + +static const struct cmd_control evm_ddr2_cctrl_data = { + .cmd0csratio = 0x80, + .cmd0dldiff = 0x04, + .cmd0iclkout = 0x00, + + .cmd1csratio = 0x80, + .cmd1dldiff = 0x04, + .cmd1iclkout = 0x00, + + .cmd2csratio = 0x80, + .cmd2dldiff = 0x04, + .cmd2iclkout = 0x00, +}; + +static const struct emif_regs evm_ddr2_emif0_regs = { + .sdram_config = 0x40801ab2, + .ref_ctrl = 0x10000c30, + .sdram_tim1 = 0x0aaaf552, + .sdram_tim2 = 0x043631d2, + .sdram_tim3 = 0x00000327, + .emif_ddr_phy_ctlr_1 = 0x00000007 +}; + +static const struct emif_regs evm_ddr2_emif1_regs = { + .sdram_config = 0x40801ab2, + .ref_ctrl = 0x10000c30, + .sdram_tim1 = 0x0aaaf552, + .sdram_tim2 = 0x043631d2, + .sdram_tim3 = 0x00000327, + .emif_ddr_phy_ctlr_1 = 0x00000007 +}; + +const struct dmm_lisa_map_regs evm_lisa_map_regs = { + .dmm_lisa_map_0 = 0x00000000, + .dmm_lisa_map_1 = 0x00000000, + .dmm_lisa_map_2 = 0x806c0300, + .dmm_lisa_map_3 = 0x806c0300, +}; + +static const struct ddr_data evm_ddr2_data = { + .datardsratio0 = ((0x35<<10) | (0x35<<0)), + .datawdsratio0 = ((0x20<<10) | (0x20<<0)), + .datawiratio0 = ((0<<10) | (0<<0)), + .datagiratio0 = ((0<<10) | (0<<0)), + .datafwsratio0 = ((0x90<<10) | (0x90<<0)), + .datawrsratio0 = ((0x50<<10) | (0x50<<0)), + .datauserank0delay = 1, + .datadldiff0 = 0x4, +}; +#endif + +/* + * early system init of muxing and clocks. + */ +void s_init(void) +{ +#ifdef CONFIG_SPL_BUILD + /* WDT1 is already running when the bootloader gets control + * Disable it to avoid "random" resets + */ + wdt_disable(); + + /* Setup the PLLs and the clocks for the peripherals */ + pll_init(); + + /* Enable RTC32K clock */ + rtc32k_enable(); + + /* Set UART pins */ + enable_uart0_pin_mux(); + + /* Set MMC pins */ + enable_mmc1_pin_mux(); + + /* Enable UART */ + uart_enable(); + + gd = &gdata; + + preloader_console_init(); + + config_dmm(&evm_lisa_map_regs); + + config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + &evm_ddr2_emif0_regs, 0); + config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + &evm_ddr2_emif1_regs, 1); +#endif +} + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; + return 0; +} + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(1, 0, 0, -1, -1); + + return 0; +} +#endif diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h new file mode 100644 index 0000000..40f8710 --- /dev/null +++ b/board/ti/ti814x/evm.h @@ -0,0 +1,7 @@ +#ifndef _EVM_H +#define _EVM_H + +void enable_uart0_pin_mux(void); +void enable_mmc1_pin_mux(void); + +#endif /* _EVM_H */ diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c new file mode 100644 index 0000000..137acb4 --- /dev/null +++ b/board/ti/ti814x/mux.c @@ -0,0 +1,51 @@ +/* + * mux.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "evm.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(pincntl70), PULLUP_EN | MODE(0x01)}, /* UART0_RXD */ + {OFFSET(pincntl71), PULLUP_EN | MODE(0x01)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc1_pin_mux[] = { + {OFFSET(pincntl1), PULLUP_EN | MODE(0x01)}, /* SD1_CLK */ + {OFFSET(pincntl2), PULLUP_EN | MODE(0x01)}, /* SD1_CMD */ + {OFFSET(pincntl3), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[0] */ + {OFFSET(pincntl4), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[1] */ + {OFFSET(pincntl5), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[2] */ + {OFFSET(pincntl6), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[3] */ + {OFFSET(pincntl74), PULLUP_EN | MODE(0x40)}, /* SD1_POW */ + {OFFSET(pincntl75), MODE(0x40)}, /* SD1_SDWP */ + {OFFSET(pincntl80), PULLUP_EN | MODE(0x02)}, /* SD1_SDCD */ + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_mmc1_pin_mux(void) +{ + configure_module_pin_mux(mmc1_pin_mux); +} diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index bab452c..fbf321d 100644 --- a/board/tqc/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds @@ -106,6 +106,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds index 9504fcd..f25a01b 100644 --- a/board/v37/u-boot.lds +++ b/board/v37/u-boot.lds @@ -93,6 +93,6 @@ SECTIONS *(COMMON) . = ALIGN(4); } - __bss_end__ = . ; + __bss_end = . ; PROVIDE (end = .); } diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds index 1958c2f..dc437d1 100644 --- a/board/vpac270/u-boot-spl.lds +++ b/board/vpac270/u-boot-spl.lds @@ -78,7 +78,7 @@ SECTIONS __bss_start = .; *(.bss) . = ALIGN(4); - __bss_end__ = .; + __bss_end = .; } /DISCARD/ : { *(.bss*) } diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 5b044a9..7c36af0 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -148,7 +148,7 @@ void board_init_f(ulong dummy) woodburn_init(); /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end__ - __bss_start); + memset(__bss_start, 0, __bss_end - __bss_start); /* Set global data pointer. */ gd = &gdata; |